| Ohad Ben-Cohen | bd9a4c7 | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 1 | # |
| 2 | # Generic HWSPINLOCK framework |
| 3 | # |
| 4 | |
| Vincent Legoll | 35fc8a0 | 2017-04-11 16:21:02 +0200 | [diff] [blame^] | 5 | menuconfig HWSPINLOCK |
| 6 | tristate "Hardware Spinlock drivers" |
| Simon Que | 70ba4cc | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 7 | |
| 8 | config HWSPINLOCK_OMAP |
| 9 | tristate "OMAP Hardware Spinlock device" |
| Vincent Legoll | 35fc8a0 | 2017-04-11 16:21:02 +0200 | [diff] [blame^] | 10 | depends on HWSPINLOCK |
| Suman Anna | ceca89e | 2014-07-02 18:01:00 -0500 | [diff] [blame] | 11 | depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX |
| Simon Que | 70ba4cc | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 12 | help |
| 13 | Say y here to support the OMAP Hardware Spinlock device (firstly |
| 14 | introduced in OMAP4). |
| 15 | |
| 16 | If unsure, say N. |
| Ohad Ben-Cohen | 315d8f5 | 2011-09-04 23:19:51 +0300 | [diff] [blame] | 17 | |
| Bjorn Andersson | 19a0f61 | 2015-03-24 10:11:05 -0700 | [diff] [blame] | 18 | config HWSPINLOCK_QCOM |
| 19 | tristate "Qualcomm Hardware Spinlock device" |
| Vincent Legoll | 35fc8a0 | 2017-04-11 16:21:02 +0200 | [diff] [blame^] | 20 | depends on HWSPINLOCK |
| Bjorn Andersson | 19a0f61 | 2015-03-24 10:11:05 -0700 | [diff] [blame] | 21 | depends on ARCH_QCOM |
| Bjorn Andersson | 19a0f61 | 2015-03-24 10:11:05 -0700 | [diff] [blame] | 22 | select MFD_SYSCON |
| 23 | help |
| 24 | Say y here to support the Qualcomm Hardware Mutex functionality, which |
| 25 | provides a synchronisation mechanism for the various processors on |
| 26 | the SoC. |
| 27 | |
| 28 | If unsure, say N. |
| 29 | |
| Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 30 | config HWSPINLOCK_SIRF |
| 31 | tristate "SIRF Hardware Spinlock device" |
| Vincent Legoll | 35fc8a0 | 2017-04-11 16:21:02 +0200 | [diff] [blame^] | 32 | depends on HWSPINLOCK |
| Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 33 | depends on ARCH_SIRF |
| Wei Chen | cc16d66 | 2015-05-26 08:28:29 +0000 | [diff] [blame] | 34 | help |
| 35 | Say y here to support the SIRF Hardware Spinlock device, which |
| 36 | provides a synchronisation mechanism for the various processors |
| 37 | on the SoC. |
| 38 | |
| 39 | It's safe to say n here if you're not interested in SIRF hardware |
| 40 | spinlock or just want a bare minimum kernel. |
| 41 | |
| Mathieu J. Poirier | f84a8ec | 2011-09-08 22:47:40 +0300 | [diff] [blame] | 42 | config HSEM_U8500 |
| 43 | tristate "STE Hardware Semaphore functionality" |
| Vincent Legoll | 35fc8a0 | 2017-04-11 16:21:02 +0200 | [diff] [blame^] | 44 | depends on HWSPINLOCK |
| Mathieu J. Poirier | f84a8ec | 2011-09-08 22:47:40 +0300 | [diff] [blame] | 45 | depends on ARCH_U8500 |
| Mathieu J. Poirier | f84a8ec | 2011-09-08 22:47:40 +0300 | [diff] [blame] | 46 | help |
| 47 | Say y here to support the STE Hardware Semaphore functionality, which |
| 48 | provides a synchronisation mechanism for the various processor on the |
| 49 | SoC. |
| 50 | |
| 51 | If unsure, say N. |