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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 3593030761630e09200072a4bd06468892c27be3 / . / drivers / mfd / da9052-core.c
blob: 8b42d2f7024f51ad23b0e5e8b4eef7c7ac766d90 [file] [log] [blame]
Thomas Gleixner2874c5f2019-05-27 08:55:01 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]2/*
3 * Device access for Dialog DA9052 PMICs.
4 *
5 * Copyright(c) 2011 Dialog Semiconductor Ltd.
6 *
7 * Author: David Dajun Chen <dchen@diasemi.com>
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]8 */
9
10#include <linux/device.h>
11#include <linux/delay.h>
12#include <linux/input.h>
13#include <linux/interrupt.h>
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]14#include <linux/mfd/core.h>
15#include <linux/slab.h>
16#include <linux/module.h>
Sebastian Reichelebf55512017-08-21 16:54:02 +0200[diff] [blame]17#include <linux/property.h>
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]18
19#include <linux/mfd/da9052/da9052.h>
20#include <linux/mfd/da9052/pdata.h>
21#include <linux/mfd/da9052/reg.h>
22
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]23static bool da9052_reg_readable(struct device *dev, unsigned int reg)
24{
25 switch (reg) {
26 case DA9052_PAGE0_CON_REG:
27 case DA9052_STATUS_A_REG:
28 case DA9052_STATUS_B_REG:
29 case DA9052_STATUS_C_REG:
30 case DA9052_STATUS_D_REG:
31 case DA9052_EVENT_A_REG:
32 case DA9052_EVENT_B_REG:
33 case DA9052_EVENT_C_REG:
34 case DA9052_EVENT_D_REG:
35 case DA9052_FAULTLOG_REG:
36 case DA9052_IRQ_MASK_A_REG:
37 case DA9052_IRQ_MASK_B_REG:
38 case DA9052_IRQ_MASK_C_REG:
39 case DA9052_IRQ_MASK_D_REG:
40 case DA9052_CONTROL_A_REG:
41 case DA9052_CONTROL_B_REG:
42 case DA9052_CONTROL_C_REG:
43 case DA9052_CONTROL_D_REG:
44 case DA9052_PDDIS_REG:
45 case DA9052_INTERFACE_REG:
46 case DA9052_RESET_REG:
47 case DA9052_GPIO_0_1_REG:
48 case DA9052_GPIO_2_3_REG:
49 case DA9052_GPIO_4_5_REG:
50 case DA9052_GPIO_6_7_REG:
Steve Twiss0386af32015-10-08 16:17:51 +0100[diff] [blame]51 case DA9052_GPIO_8_9_REG:
52 case DA9052_GPIO_10_11_REG:
53 case DA9052_GPIO_12_13_REG:
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]54 case DA9052_GPIO_14_15_REG:
55 case DA9052_ID_0_1_REG:
56 case DA9052_ID_2_3_REG:
57 case DA9052_ID_4_5_REG:
58 case DA9052_ID_6_7_REG:
59 case DA9052_ID_8_9_REG:
60 case DA9052_ID_10_11_REG:
61 case DA9052_ID_12_13_REG:
62 case DA9052_ID_14_15_REG:
63 case DA9052_ID_16_17_REG:
64 case DA9052_ID_18_19_REG:
65 case DA9052_ID_20_21_REG:
66 case DA9052_SEQ_STATUS_REG:
67 case DA9052_SEQ_A_REG:
68 case DA9052_SEQ_B_REG:
69 case DA9052_SEQ_TIMER_REG:
70 case DA9052_BUCKA_REG:
71 case DA9052_BUCKB_REG:
72 case DA9052_BUCKCORE_REG:
73 case DA9052_BUCKPRO_REG:
74 case DA9052_BUCKMEM_REG:
75 case DA9052_BUCKPERI_REG:
76 case DA9052_LDO1_REG:
77 case DA9052_LDO2_REG:
78 case DA9052_LDO3_REG:
79 case DA9052_LDO4_REG:
80 case DA9052_LDO5_REG:
81 case DA9052_LDO6_REG:
82 case DA9052_LDO7_REG:
83 case DA9052_LDO8_REG:
84 case DA9052_LDO9_REG:
85 case DA9052_LDO10_REG:
86 case DA9052_SUPPLY_REG:
87 case DA9052_PULLDOWN_REG:
88 case DA9052_CHGBUCK_REG:
89 case DA9052_WAITCONT_REG:
90 case DA9052_ISET_REG:
91 case DA9052_BATCHG_REG:
92 case DA9052_CHG_CONT_REG:
93 case DA9052_INPUT_CONT_REG:
94 case DA9052_CHG_TIME_REG:
95 case DA9052_BBAT_CONT_REG:
96 case DA9052_BOOST_REG:
97 case DA9052_LED_CONT_REG:
98 case DA9052_LEDMIN123_REG:
99 case DA9052_LED1_CONF_REG:
100 case DA9052_LED2_CONF_REG:
101 case DA9052_LED3_CONF_REG:
102 case DA9052_LED1CONT_REG:
103 case DA9052_LED2CONT_REG:
104 case DA9052_LED3CONT_REG:
105 case DA9052_LED_CONT_4_REG:
106 case DA9052_LED_CONT_5_REG:
107 case DA9052_ADC_MAN_REG:
108 case DA9052_ADC_CONT_REG:
109 case DA9052_ADC_RES_L_REG:
110 case DA9052_ADC_RES_H_REG:
111 case DA9052_VDD_RES_REG:
112 case DA9052_VDD_MON_REG:
113 case DA9052_ICHG_AV_REG:
114 case DA9052_ICHG_THD_REG:
115 case DA9052_ICHG_END_REG:
116 case DA9052_TBAT_RES_REG:
117 case DA9052_TBAT_HIGHP_REG:
118 case DA9052_TBAT_HIGHN_REG:
119 case DA9052_TBAT_LOW_REG:
120 case DA9052_T_OFFSET_REG:
121 case DA9052_ADCIN4_RES_REG:
122 case DA9052_AUTO4_HIGH_REG:
123 case DA9052_AUTO4_LOW_REG:
124 case DA9052_ADCIN5_RES_REG:
125 case DA9052_AUTO5_HIGH_REG:
126 case DA9052_AUTO5_LOW_REG:
127 case DA9052_ADCIN6_RES_REG:
128 case DA9052_AUTO6_HIGH_REG:
129 case DA9052_AUTO6_LOW_REG:
130 case DA9052_TJUNC_RES_REG:
131 case DA9052_TSI_CONT_A_REG:
132 case DA9052_TSI_CONT_B_REG:
133 case DA9052_TSI_X_MSB_REG:
134 case DA9052_TSI_Y_MSB_REG:
135 case DA9052_TSI_LSB_REG:
136 case DA9052_TSI_Z_MSB_REG:
137 case DA9052_COUNT_S_REG:
138 case DA9052_COUNT_MI_REG:
139 case DA9052_COUNT_H_REG:
140 case DA9052_COUNT_D_REG:
141 case DA9052_COUNT_MO_REG:
142 case DA9052_COUNT_Y_REG:
143 case DA9052_ALARM_MI_REG:
144 case DA9052_ALARM_H_REG:
145 case DA9052_ALARM_D_REG:
146 case DA9052_ALARM_MO_REG:
147 case DA9052_ALARM_Y_REG:
148 case DA9052_SECOND_A_REG:
149 case DA9052_SECOND_B_REG:
150 case DA9052_SECOND_C_REG:
151 case DA9052_SECOND_D_REG:
152 case DA9052_PAGE1_CON_REG:
153 return true;
154 default:
155 return false;
156 }
157}
158
159static bool da9052_reg_writeable(struct device *dev, unsigned int reg)
160{
161 switch (reg) {
162 case DA9052_PAGE0_CON_REG:
Ashish Jangam0a928152012-01-03 12:33:26 +0530[diff] [blame]163 case DA9052_EVENT_A_REG:
164 case DA9052_EVENT_B_REG:
165 case DA9052_EVENT_C_REG:
166 case DA9052_EVENT_D_REG:
Steve Twiss547120e2016-07-06 16:12:03 +0100[diff] [blame]167 case DA9052_FAULTLOG_REG:
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]168 case DA9052_IRQ_MASK_A_REG:
169 case DA9052_IRQ_MASK_B_REG:
170 case DA9052_IRQ_MASK_C_REG:
171 case DA9052_IRQ_MASK_D_REG:
172 case DA9052_CONTROL_A_REG:
173 case DA9052_CONTROL_B_REG:
174 case DA9052_CONTROL_C_REG:
175 case DA9052_CONTROL_D_REG:
176 case DA9052_PDDIS_REG:
177 case DA9052_RESET_REG:
178 case DA9052_GPIO_0_1_REG:
179 case DA9052_GPIO_2_3_REG:
180 case DA9052_GPIO_4_5_REG:
181 case DA9052_GPIO_6_7_REG:
Steve Twiss0386af32015-10-08 16:17:51 +0100[diff] [blame]182 case DA9052_GPIO_8_9_REG:
183 case DA9052_GPIO_10_11_REG:
184 case DA9052_GPIO_12_13_REG:
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]185 case DA9052_GPIO_14_15_REG:
186 case DA9052_ID_0_1_REG:
187 case DA9052_ID_2_3_REG:
188 case DA9052_ID_4_5_REG:
189 case DA9052_ID_6_7_REG:
190 case DA9052_ID_8_9_REG:
191 case DA9052_ID_10_11_REG:
192 case DA9052_ID_12_13_REG:
193 case DA9052_ID_14_15_REG:
194 case DA9052_ID_16_17_REG:
195 case DA9052_ID_18_19_REG:
196 case DA9052_ID_20_21_REG:
197 case DA9052_SEQ_STATUS_REG:
198 case DA9052_SEQ_A_REG:
199 case DA9052_SEQ_B_REG:
200 case DA9052_SEQ_TIMER_REG:
201 case DA9052_BUCKA_REG:
202 case DA9052_BUCKB_REG:
203 case DA9052_BUCKCORE_REG:
204 case DA9052_BUCKPRO_REG:
205 case DA9052_BUCKMEM_REG:
206 case DA9052_BUCKPERI_REG:
207 case DA9052_LDO1_REG:
208 case DA9052_LDO2_REG:
209 case DA9052_LDO3_REG:
210 case DA9052_LDO4_REG:
211 case DA9052_LDO5_REG:
212 case DA9052_LDO6_REG:
213 case DA9052_LDO7_REG:
214 case DA9052_LDO8_REG:
215 case DA9052_LDO9_REG:
216 case DA9052_LDO10_REG:
217 case DA9052_SUPPLY_REG:
218 case DA9052_PULLDOWN_REG:
219 case DA9052_CHGBUCK_REG:
220 case DA9052_WAITCONT_REG:
221 case DA9052_ISET_REG:
222 case DA9052_BATCHG_REG:
223 case DA9052_CHG_CONT_REG:
224 case DA9052_INPUT_CONT_REG:
225 case DA9052_BBAT_CONT_REG:
226 case DA9052_BOOST_REG:
227 case DA9052_LED_CONT_REG:
228 case DA9052_LEDMIN123_REG:
229 case DA9052_LED1_CONF_REG:
230 case DA9052_LED2_CONF_REG:
231 case DA9052_LED3_CONF_REG:
232 case DA9052_LED1CONT_REG:
233 case DA9052_LED2CONT_REG:
234 case DA9052_LED3CONT_REG:
235 case DA9052_LED_CONT_4_REG:
236 case DA9052_LED_CONT_5_REG:
237 case DA9052_ADC_MAN_REG:
238 case DA9052_ADC_CONT_REG:
239 case DA9052_ADC_RES_L_REG:
240 case DA9052_ADC_RES_H_REG:
241 case DA9052_VDD_RES_REG:
242 case DA9052_VDD_MON_REG:
243 case DA9052_ICHG_THD_REG:
244 case DA9052_ICHG_END_REG:
245 case DA9052_TBAT_HIGHP_REG:
246 case DA9052_TBAT_HIGHN_REG:
247 case DA9052_TBAT_LOW_REG:
248 case DA9052_T_OFFSET_REG:
249 case DA9052_AUTO4_HIGH_REG:
250 case DA9052_AUTO4_LOW_REG:
251 case DA9052_AUTO5_HIGH_REG:
252 case DA9052_AUTO5_LOW_REG:
253 case DA9052_AUTO6_HIGH_REG:
254 case DA9052_AUTO6_LOW_REG:
255 case DA9052_TSI_CONT_A_REG:
256 case DA9052_TSI_CONT_B_REG:
257 case DA9052_COUNT_S_REG:
258 case DA9052_COUNT_MI_REG:
259 case DA9052_COUNT_H_REG:
260 case DA9052_COUNT_D_REG:
261 case DA9052_COUNT_MO_REG:
262 case DA9052_COUNT_Y_REG:
263 case DA9052_ALARM_MI_REG:
264 case DA9052_ALARM_H_REG:
265 case DA9052_ALARM_D_REG:
266 case DA9052_ALARM_MO_REG:
267 case DA9052_ALARM_Y_REG:
268 case DA9052_PAGE1_CON_REG:
269 return true;
270 default:
271 return false;
272 }
273}
274
275static bool da9052_reg_volatile(struct device *dev, unsigned int reg)
276{
277 switch (reg) {
278 case DA9052_STATUS_A_REG:
279 case DA9052_STATUS_B_REG:
280 case DA9052_STATUS_C_REG:
281 case DA9052_STATUS_D_REG:
282 case DA9052_EVENT_A_REG:
283 case DA9052_EVENT_B_REG:
284 case DA9052_EVENT_C_REG:
285 case DA9052_EVENT_D_REG:
anthony.olech.opensource@diasemi.combcb5a7d2014-02-06 17:33:24 +0000[diff] [blame]286 case DA9052_CONTROL_B_REG:
287 case DA9052_CONTROL_D_REG:
288 case DA9052_SUPPLY_REG:
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]289 case DA9052_FAULTLOG_REG:
290 case DA9052_CHG_TIME_REG:
291 case DA9052_ADC_RES_L_REG:
292 case DA9052_ADC_RES_H_REG:
293 case DA9052_VDD_RES_REG:
294 case DA9052_ICHG_AV_REG:
295 case DA9052_TBAT_RES_REG:
296 case DA9052_ADCIN4_RES_REG:
297 case DA9052_ADCIN5_RES_REG:
298 case DA9052_ADCIN6_RES_REG:
299 case DA9052_TJUNC_RES_REG:
300 case DA9052_TSI_X_MSB_REG:
301 case DA9052_TSI_Y_MSB_REG:
302 case DA9052_TSI_LSB_REG:
303 case DA9052_TSI_Z_MSB_REG:
304 case DA9052_COUNT_S_REG:
305 case DA9052_COUNT_MI_REG:
306 case DA9052_COUNT_H_REG:
307 case DA9052_COUNT_D_REG:
308 case DA9052_COUNT_MO_REG:
309 case DA9052_COUNT_Y_REG:
310 case DA9052_ALARM_MI_REG:
311 return true;
312 default:
313 return false;
314 }
315}
316
Ashish Jangam16e5e202012-05-18 12:19:18 +0200[diff] [blame]317/*
318 * TBAT look-up table is computed from the R90 reg (8 bit register)
319 * reading as below. The battery temperature is in milliCentigrade
320 * TBAT = (1/(t1+1/298) - 273) * 1000 mC
321 * where t1 = (1/B)* ln(( ADCval * 2.5)/(R25*ITBAT*255))
322 * Default values are R25 = 10e3, B = 3380, ITBAT = 50e-6
323 * Example:
324 * R25=10E3, B=3380, ITBAT=50e-6, ADCVAL=62d calculates
325 * TBAT = 20015 mili degrees Centrigrade
326 *
327*/
328static const int32_t tbat_lookup[255] = {
329 183258, 144221, 124334, 111336, 101826, 94397, 88343, 83257,
330 78889, 75071, 71688, 68656, 65914, 63414, 61120, 59001,
331 570366, 55204, 53490, 51881, 50364, 48931, 47574, 46285,
332 45059, 43889, 42772, 41703, 40678, 39694, 38748, 37838,
333 36961, 36115, 35297, 34507, 33743, 33002, 32284, 31588,
334 30911, 30254, 29615, 28994, 28389, 27799, 27225, 26664,
335 26117, 25584, 25062, 24553, 24054, 23567, 23091, 22624,
336 22167, 21719, 21281, 20851, 20429, 20015, 19610, 19211,
337 18820, 18436, 18058, 17688, 17323, 16965, 16612, 16266,
338 15925, 15589, 15259, 14933, 14613, 14298, 13987, 13681,
339 13379, 13082, 12788, 12499, 12214, 11933, 11655, 11382,
340 11112, 10845, 10582, 10322, 10066, 9812, 9562, 9315,
341 9071, 8830, 8591, 8356, 8123, 7893, 7665, 7440,
342 7218, 6998, 6780, 6565, 6352, 6141, 5933, 5726,
343 5522, 5320, 5120, 4922, 4726, 4532, 4340, 4149,
344 3961, 3774, 3589, 3406, 3225, 3045, 2867, 2690,
345 2516, 2342, 2170, 2000, 1831, 1664, 1498, 1334,
346 1171, 1009, 849, 690, 532, 376, 221, 67,
347 -84, -236, -386, -535, -683, -830, -975, -1119,
348 -1263, -1405, -1546, -1686, -1825, -1964, -2101, -2237,
349 -2372, -2506, -2639, -2771, -2902, -3033, -3162, -3291,
350 -3418, -3545, -3671, -3796, -3920, -4044, -4166, -4288,
351 -4409, -4529, -4649, -4767, -4885, -5002, -5119, -5235,
352 -5349, -5464, -5577, -5690, -5802, -5913, -6024, -6134,
353 -6244, -6352, -6461, -6568, -6675, -6781, -6887, -6992,
354 -7096, -7200, -7303, -7406, -7508, -7609, -7710, -7810,
355 -7910, -8009, -8108, -8206, -8304, -8401, -8497, -8593,
356 -8689, -8784, -8878, -8972, -9066, -9159, -9251, -9343,
357 -9435, -9526, -9617, -9707, -9796, -9886, -9975, -10063,
358 -10151, -10238, -10325, -10412, -10839, -10923, -11007, -11090,
359 -11173, -11256, -11338, -11420, -11501, -11583, -11663, -11744,
360 -11823, -11903, -11982
361};
362
363static const u8 chan_mux[DA9052_ADC_VBBAT + 1] = {
364 [DA9052_ADC_VDDOUT] = DA9052_ADC_MAN_MUXSEL_VDDOUT,
365 [DA9052_ADC_ICH] = DA9052_ADC_MAN_MUXSEL_ICH,
366 [DA9052_ADC_TBAT] = DA9052_ADC_MAN_MUXSEL_TBAT,
367 [DA9052_ADC_VBAT] = DA9052_ADC_MAN_MUXSEL_VBAT,
368 [DA9052_ADC_IN4] = DA9052_ADC_MAN_MUXSEL_AD4,
369 [DA9052_ADC_IN5] = DA9052_ADC_MAN_MUXSEL_AD5,
370 [DA9052_ADC_IN6] = DA9052_ADC_MAN_MUXSEL_AD6,
371 [DA9052_ADC_VBBAT] = DA9052_ADC_MAN_MUXSEL_VBBAT
372};
373
374int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel)
375{
376 int ret;
377 unsigned short calc_data;
378 unsigned short data;
379 unsigned char mux_sel;
380
381 if (channel > DA9052_ADC_VBBAT)
382 return -EINVAL;
383
384 mutex_lock(&da9052->auxadc_lock);
385
Sebastian Reichel45f80a92017-06-30 16:35:03 +0200[diff] [blame]386 reinit_completion(&da9052->done);
387
Ashish Jangam16e5e202012-05-18 12:19:18 +0200[diff] [blame]388 /* Channel gets activated on enabling the Conversion bit */
389 mux_sel = chan_mux[channel] | DA9052_ADC_MAN_MAN_CONV;
390
391 ret = da9052_reg_write(da9052, DA9052_ADC_MAN_REG, mux_sel);
392 if (ret < 0)
393 goto err;
394
395 /* Wait for an interrupt */
396 if (!wait_for_completion_timeout(&da9052->done,
397 msecs_to_jiffies(500))) {
398 dev_err(da9052->dev,
399 "timeout waiting for ADC conversion interrupt\n");
400 ret = -ETIMEDOUT;
401 goto err;
402 }
403
404 ret = da9052_reg_read(da9052, DA9052_ADC_RES_H_REG);
405 if (ret < 0)
406 goto err;
407
408 calc_data = (unsigned short)ret;
409 data = calc_data << 2;
410
411 ret = da9052_reg_read(da9052, DA9052_ADC_RES_L_REG);
412 if (ret < 0)
413 goto err;
414
415 calc_data = (unsigned short)(ret & DA9052_ADC_RES_LSB);
416 data |= calc_data;
417
418 ret = data;
419
420err:
421 mutex_unlock(&da9052->auxadc_lock);
422 return ret;
423}
424EXPORT_SYMBOL_GPL(da9052_adc_manual_read);
425
Ashish Jangam16e5e202012-05-18 12:19:18 +0200[diff] [blame]426int da9052_adc_read_temp(struct da9052 *da9052)
427{
428 int tbat;
429
430 tbat = da9052_reg_read(da9052, DA9052_TBAT_RES_REG);
431 if (tbat <= 0)
432 return tbat;
433
434 /* ARRAY_SIZE check is not needed since TBAT is a 8-bit register */
435 return tbat_lookup[tbat - 1];
436}
437EXPORT_SYMBOL_GPL(da9052_adc_read_temp);
438
Geert Uytterhoevenc8f675f2013-11-18 14:32:57 +0100[diff] [blame]439static const struct mfd_cell da9052_subdev_info[] = {
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]440 {
441 .name = "da9052-regulator",
Johan Hovolde0c21532015-05-15 16:27:40 +0200[diff] [blame]442 .id = 0,
443 },
444 {
445 .name = "da9052-regulator",
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]446 .id = 1,
447 },
448 {
449 .name = "da9052-regulator",
450 .id = 2,
451 },
452 {
453 .name = "da9052-regulator",
454 .id = 3,
455 },
456 {
457 .name = "da9052-regulator",
458 .id = 4,
459 },
460 {
461 .name = "da9052-regulator",
462 .id = 5,
463 },
464 {
465 .name = "da9052-regulator",
466 .id = 6,
467 },
468 {
469 .name = "da9052-regulator",
470 .id = 7,
471 },
472 {
473 .name = "da9052-regulator",
474 .id = 8,
475 },
476 {
477 .name = "da9052-regulator",
478 .id = 9,
479 },
480 {
481 .name = "da9052-regulator",
482 .id = 10,
483 },
484 {
485 .name = "da9052-regulator",
486 .id = 11,
487 },
488 {
489 .name = "da9052-regulator",
490 .id = 12,
491 },
492 {
493 .name = "da9052-regulator",
494 .id = 13,
495 },
496 {
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]497 .name = "da9052-onkey",
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]498 },
499 {
500 .name = "da9052-rtc",
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]501 },
502 {
503 .name = "da9052-gpio",
504 },
505 {
506 .name = "da9052-hwmon",
507 },
508 {
509 .name = "da9052-leds",
510 },
511 {
512 .name = "da9052-wled1",
513 },
514 {
515 .name = "da9052-wled2",
516 },
517 {
518 .name = "da9052-wled3",
519 },
520 {
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]521 .name = "da9052-bat",
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]522 },
523 {
524 .name = "da9052-watchdog",
525 },
526};
527
Sebastian Reichelebf55512017-08-21 16:54:02 +0200[diff] [blame]528static const struct mfd_cell da9052_tsi_subdev_info[] = {
529 { .name = "da9052-tsi" },
530};
531
Axel Line9e9d392014-08-16 21:23:40 +0800[diff] [blame]532const struct regmap_config da9052_regmap_config = {
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]533 .reg_bits = 8,
534 .val_bits = 8,
535
536 .cache_type = REGCACHE_RBTREE,
537
538 .max_register = DA9052_PAGE1_CON_REG,
539 .readable_reg = da9052_reg_readable,
540 .writeable_reg = da9052_reg_writeable,
541 .volatile_reg = da9052_reg_volatile,
542};
543EXPORT_SYMBOL_GPL(da9052_regmap_config);
544
Steve Twiss547120e2016-07-06 16:12:03 +0100[diff] [blame]545static int da9052_clear_fault_log(struct da9052 *da9052)
546{
547 int ret = 0;
548 int fault_log = 0;
549
550 fault_log = da9052_reg_read(da9052, DA9052_FAULTLOG_REG);
551 if (fault_log < 0) {
552 dev_err(da9052->dev,
553 "Cannot read FAULT_LOG %d\n", fault_log);
554 return fault_log;
555 }
556
557 if (fault_log) {
558 if (fault_log & DA9052_FAULTLOG_TWDERROR)
559 dev_dbg(da9052->dev,
560 "Fault log entry detected: TWD_ERROR\n");
561 if (fault_log & DA9052_FAULTLOG_VDDFAULT)
562 dev_dbg(da9052->dev,
563 "Fault log entry detected: VDD_FAULT\n");
564 if (fault_log & DA9052_FAULTLOG_VDDSTART)
565 dev_dbg(da9052->dev,
566 "Fault log entry detected: VDD_START\n");
567 if (fault_log & DA9052_FAULTLOG_TEMPOVER)
568 dev_dbg(da9052->dev,
569 "Fault log entry detected: TEMP_OVER\n");
570 if (fault_log & DA9052_FAULTLOG_KEYSHUT)
571 dev_dbg(da9052->dev,
572 "Fault log entry detected: KEY_SHUT\n");
573 if (fault_log & DA9052_FAULTLOG_NSDSET)
574 dev_dbg(da9052->dev,
575 "Fault log entry detected: nSD_SHUT\n");
576 if (fault_log & DA9052_FAULTLOG_WAITSET)
577 dev_dbg(da9052->dev,
578 "Fault log entry detected: WAIT_SHUT\n");
579
580 ret = da9052_reg_write(da9052,
581 DA9052_FAULTLOG_REG,
582 0xFF);
583 if (ret < 0)
584 dev_err(da9052->dev,
585 "Cannot reset FAULT_LOG values %d\n", ret);
586 }
587
588 return ret;
589}
590
Bill Pembertonf791be42012-11-19 13:23:04 -0500[diff] [blame]591int da9052_device_init(struct da9052 *da9052, u8 chip_id)
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]592{
Jingoo Han334a41ce2013-07-30 17:10:05 +0900[diff] [blame]593 struct da9052_pdata *pdata = dev_get_platdata(da9052->dev);
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]594 int ret;
595
Ashish Jangam16e5e202012-05-18 12:19:18 +0200[diff] [blame]596 mutex_init(&da9052->auxadc_lock);
597 init_completion(&da9052->done);
598
Steve Twiss547120e2016-07-06 16:12:03 +0100[diff] [blame]599 ret = da9052_clear_fault_log(da9052);
600 if (ret < 0)
601 dev_warn(da9052->dev, "Cannot clear FAULT_LOG\n");
602
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]603 if (pdata && pdata->init != NULL)
604 pdata->init(da9052);
605
606 da9052->chip_id = chip_id;
607
Fabio Estevam8bad1ab2012-10-04 00:15:05 -0300[diff] [blame]608 ret = da9052_irq_init(da9052);
609 if (ret != 0) {
610 dev_err(da9052->dev, "da9052_irq_init failed: %d\n", ret);
611 return ret;
Fabio Estevamffe20b62012-10-04 00:15:04 -0300[diff] [blame]612 }
Ashish Jangam16e5e202012-05-18 12:19:18 +0200[diff] [blame]613
Fabio Estevamb3f6c732014-12-09 23:39:53 -0200[diff] [blame]614 ret = mfd_add_devices(da9052->dev, PLATFORM_DEVID_AUTO,
615 da9052_subdev_info,
Mark Brown0848c942012-09-11 15:16:36 +0800[diff] [blame]616 ARRAY_SIZE(da9052_subdev_info), NULL, 0, NULL);
Fabio Estevamffe20b62012-10-04 00:15:04 -0300[diff] [blame]617 if (ret) {
618 dev_err(da9052->dev, "mfd_add_devices failed: %d\n", ret);
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]619 goto err;
Fabio Estevamffe20b62012-10-04 00:15:04 -0300[diff] [blame]620 }
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]621
Sebastian Reichelebf55512017-08-21 16:54:02 +0200[diff] [blame]622 /*
623 * Check if touchscreen pins are used are analogue input instead
624 * of having a touchscreen connected to them. The analogue input
625 * functionality will be provided by hwmon driver (if enabled).
626 */
627 if (!device_property_read_bool(da9052->dev, "dlg,tsi-as-adc")) {
628 ret = mfd_add_devices(da9052->dev, PLATFORM_DEVID_AUTO,
629 da9052_tsi_subdev_info,
630 ARRAY_SIZE(da9052_tsi_subdev_info),
631 NULL, 0, NULL);
632 if (ret) {
633 dev_err(da9052->dev, "failed to add TSI subdev: %d\n",
634 ret);
635 goto err;
636 }
637 }
638
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]639 return 0;
640
641err:
Sebastian Reichelebf55512017-08-21 16:54:02 +0200[diff] [blame]642 mfd_remove_devices(da9052->dev);
Fabio Estevam8bad1ab2012-10-04 00:15:05 -0300[diff] [blame]643 da9052_irq_exit(da9052);
644
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]645 return ret;
646}
647
648void da9052_device_exit(struct da9052 *da9052)
649{
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]650 mfd_remove_devices(da9052->dev);
Fabio Estevam8bad1ab2012-10-04 00:15:05 -0300[diff] [blame]651 da9052_irq_exit(da9052);
Ashish Jangam84c99db2011-12-12 20:06:56 +0530[diff] [blame]652}
653
654MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
655MODULE_DESCRIPTION("DA9052 MFD Core");
656MODULE_LICENSE("GPL");