mtk01761 | 710774e | 2019-08-19 17:21:41 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (c) 2019 MediaTek Inc. |
| 4 | * Author: Wendell Lin <wendell.lin@mediatek.com> |
| 5 | */ |
| 6 | |
| 7 | #include <linux/clk-provider.h> |
| 8 | #include <linux/platform_device.h> |
| 9 | |
| 10 | #include "clk-mtk.h" |
| 11 | #include "clk-gate.h" |
| 12 | |
| 13 | #include <dt-bindings/clock/mt6779-clk.h> |
| 14 | |
| 15 | static const struct mtk_gate_regs mfg_cg_regs = { |
| 16 | .set_ofs = 0x4, |
| 17 | .clr_ofs = 0x8, |
| 18 | .sta_ofs = 0x0, |
| 19 | }; |
| 20 | |
| 21 | #define GATE_MFG(_id, _name, _parent, _shift) \ |
| 22 | GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, \ |
| 23 | &mtk_clk_gate_ops_setclr) |
| 24 | |
| 25 | static const struct mtk_gate mfg_clks[] = { |
| 26 | GATE_MFG(CLK_MFGCFG_BG3D, "mfg_bg3d", "mfg_sel", 0), |
| 27 | }; |
| 28 | |
| 29 | static int clk_mt6779_mfg_probe(struct platform_device *pdev) |
| 30 | { |
| 31 | struct clk_onecell_data *clk_data; |
| 32 | struct device_node *node = pdev->dev.of_node; |
| 33 | |
| 34 | clk_data = mtk_alloc_clk_data(CLK_MFGCFG_NR_CLK); |
| 35 | |
| 36 | mtk_clk_register_gates(node, mfg_clks, ARRAY_SIZE(mfg_clks), |
| 37 | clk_data); |
| 38 | |
| 39 | return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
| 40 | } |
| 41 | |
| 42 | static const struct of_device_id of_match_clk_mt6779_mfg[] = { |
| 43 | { .compatible = "mediatek,mt6779-mfgcfg", }, |
| 44 | {} |
| 45 | }; |
| 46 | |
| 47 | static struct platform_driver clk_mt6779_mfg_drv = { |
| 48 | .probe = clk_mt6779_mfg_probe, |
| 49 | .driver = { |
| 50 | .name = "clk-mt6779-mfg", |
| 51 | .of_match_table = of_match_clk_mt6779_mfg, |
| 52 | }, |
| 53 | }; |
| 54 | |
| 55 | builtin_platform_driver(clk_mt6779_mfg_drv); |