Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 2 | /dts-v1/; |
| 3 | |
| 4 | #include <dt-bindings/input/input.h> |
| 5 | #include "tegra30-apalis.dtsi" |
| 6 | |
| 7 | / { |
| 8 | model = "Toradex Apalis T30 on Apalis Evaluation Board"; |
Marcel Ziswiler | ae171be | 2014-07-25 12:40:03 -0600 | [diff] [blame] | 9 | compatible = "toradex,apalis_t30-eval", "toradex,apalis_t30", "nvidia,tegra30"; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 10 | |
| 11 | aliases { |
| 12 | rtc0 = "/i2c@7000c000/rtc@68"; |
| 13 | rtc1 = "/i2c@7000d000/tps65911@2d"; |
| 14 | rtc2 = "/rtc@7000e000"; |
Olof Johansson | c4574aa | 2014-11-11 12:49:30 -0800 | [diff] [blame] | 15 | serial0 = &uarta; |
| 16 | serial1 = &uartb; |
| 17 | serial2 = &uartc; |
| 18 | serial3 = &uartd; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 19 | }; |
| 20 | |
Jon Hunter | f5bbb32 | 2016-02-09 13:51:59 +0000 | [diff] [blame] | 21 | chosen { |
| 22 | stdout-path = "serial0:115200n8"; |
| 23 | }; |
| 24 | |
Rob Herring | 508d690 | 2017-03-21 21:03:06 -0500 | [diff] [blame] | 25 | pcie@3000 { |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 26 | pci@1,0 { |
| 27 | status = "okay"; |
| 28 | }; |
| 29 | |
| 30 | pci@2,0 { |
| 31 | status = "okay"; |
| 32 | }; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 33 | }; |
| 34 | |
| 35 | host1x@50000000 { |
| 36 | dc@54200000 { |
| 37 | rgb { |
| 38 | status = "okay"; |
| 39 | nvidia,panel = <&panel>; |
| 40 | }; |
| 41 | }; |
| 42 | hdmi@54280000 { |
| 43 | status = "okay"; |
Marcel Ziswiler | 32980cb | 2018-08-31 18:37:50 +0200 | [diff] [blame^] | 44 | hdmi-supply = <®_5v0>; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 45 | }; |
| 46 | }; |
| 47 | |
| 48 | serial@70006000 { |
| 49 | status = "okay"; |
| 50 | }; |
| 51 | |
| 52 | serial@70006040 { |
| 53 | compatible = "nvidia,tegra30-hsuart"; |
| 54 | status = "okay"; |
| 55 | }; |
| 56 | |
| 57 | serial@70006200 { |
| 58 | compatible = "nvidia,tegra30-hsuart"; |
| 59 | status = "okay"; |
| 60 | }; |
| 61 | |
| 62 | serial@70006300 { |
| 63 | compatible = "nvidia,tegra30-hsuart"; |
| 64 | status = "okay"; |
| 65 | }; |
| 66 | |
| 67 | pwm@7000a000 { |
| 68 | status = "okay"; |
| 69 | }; |
| 70 | |
| 71 | /* |
| 72 | * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier |
| 73 | * board) |
| 74 | */ |
| 75 | i2c@7000c000 { |
| 76 | status = "okay"; |
Marcel Ziswiler | 1c3389e | 2018-02-10 02:36:36 +0100 | [diff] [blame] | 77 | clock-frequency = <400000>; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 78 | |
| 79 | pcie-switch@58 { |
| 80 | compatible = "plx,pex8605"; |
| 81 | reg = <0x58>; |
| 82 | }; |
| 83 | |
| 84 | /* M41T0M6 real time clock on carrier board */ |
| 85 | rtc@68 { |
Marcel Ziswiler | 29a6275 | 2018-02-10 02:36:37 +0100 | [diff] [blame] | 86 | compatible = "st,m41t0"; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 87 | reg = <0x68>; |
| 88 | }; |
| 89 | }; |
| 90 | |
| 91 | /* GEN2_I2C: unused */ |
| 92 | |
| 93 | /* |
| 94 | * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on |
| 95 | * carrier board) |
| 96 | */ |
| 97 | cami2c: i2c@7000c500 { |
| 98 | status = "okay"; |
| 99 | clock-frequency = <400000>; |
| 100 | }; |
| 101 | |
| 102 | /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */ |
| 103 | hdmiddc: i2c@7000c700 { |
| 104 | status = "okay"; |
| 105 | }; |
| 106 | |
| 107 | /* SPI1: Apalis SPI1 */ |
| 108 | spi@7000d400 { |
| 109 | status = "okay"; |
| 110 | spi-max-frequency = <25000000>; |
| 111 | spidev0: spidev@1 { |
| 112 | compatible = "spidev"; |
| 113 | reg = <1>; |
| 114 | spi-max-frequency = <25000000>; |
| 115 | }; |
| 116 | }; |
| 117 | |
| 118 | /* SPI5: Apalis SPI2 */ |
| 119 | spi@7000dc00 { |
| 120 | status = "okay"; |
| 121 | spi-max-frequency = <25000000>; |
| 122 | spidev1: spidev@2 { |
| 123 | compatible = "spidev"; |
| 124 | reg = <2>; |
| 125 | spi-max-frequency = <25000000>; |
| 126 | }; |
| 127 | }; |
| 128 | |
Marcel Ziswiler | 26f660d | 2015-08-28 14:42:33 +0200 | [diff] [blame] | 129 | hda@70030000 { |
| 130 | status = "okay"; |
| 131 | }; |
| 132 | |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 133 | sd1: sdhci@78000000 { |
| 134 | status = "okay"; |
| 135 | bus-width = <4>; |
| 136 | /* SD1_CD# */ |
| 137 | cd-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_LOW>; |
| 138 | no-1-8-v; |
| 139 | }; |
| 140 | |
| 141 | mmc1: sdhci@78000400 { |
| 142 | status = "okay"; |
| 143 | bus-width = <8>; |
| 144 | /* MMC1_CD# */ |
| 145 | cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>; |
| 146 | no-1-8-v; |
| 147 | }; |
| 148 | |
| 149 | /* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */ |
| 150 | usb@7d000000 { |
| 151 | status = "okay"; |
| 152 | }; |
| 153 | |
| 154 | usb-phy@7d000000 { |
| 155 | status = "okay"; |
Marcel Ziswiler | ea147c8 | 2015-08-28 14:42:34 +0200 | [diff] [blame] | 156 | dr_mode = "otg"; |
Marcel Ziswiler | f98439c | 2018-08-31 18:37:49 +0200 | [diff] [blame] | 157 | vbus-supply = <®_usbo1_vbus>; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 158 | }; |
| 159 | |
| 160 | /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */ |
| 161 | usb@7d004000 { |
| 162 | status = "okay"; |
| 163 | }; |
| 164 | |
| 165 | usb-phy@7d004000 { |
| 166 | status = "okay"; |
Marcel Ziswiler | f98439c | 2018-08-31 18:37:49 +0200 | [diff] [blame] | 167 | vbus-supply = <®_usbh_vbus>; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 168 | }; |
| 169 | |
| 170 | /* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */ |
| 171 | usb@7d008000 { |
| 172 | status = "okay"; |
| 173 | }; |
| 174 | |
| 175 | usb-phy@7d008000 { |
| 176 | status = "okay"; |
Marcel Ziswiler | f98439c | 2018-08-31 18:37:49 +0200 | [diff] [blame] | 177 | vbus-supply = <®_usbh_vbus>; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 178 | }; |
| 179 | |
| 180 | backlight: backlight { |
| 181 | compatible = "pwm-backlight"; |
| 182 | |
Marcel Ziswiler | 9ecf78c | 2015-08-28 14:42:35 +0200 | [diff] [blame] | 183 | /* PWM_BKL1 */ |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 184 | pwms = <&pwm 0 5000000>; |
| 185 | brightness-levels = <255 231 223 207 191 159 127 0>; |
| 186 | default-brightness-level = <6>; |
| 187 | /* BKL1_ON */ |
| 188 | enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; |
Marcel Ziswiler | 32980cb | 2018-08-31 18:37:50 +0200 | [diff] [blame^] | 189 | power-supply = <®_3v3>; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 190 | }; |
| 191 | |
| 192 | gpio-keys { |
| 193 | compatible = "gpio-keys"; |
| 194 | |
Marcel Ziswiler | 21db15d | 2015-08-28 14:42:36 +0200 | [diff] [blame] | 195 | wakeup { |
| 196 | label = "WAKE1_MICO"; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 197 | gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>; |
Marcel Ziswiler | 21db15d | 2015-08-28 14:42:36 +0200 | [diff] [blame] | 198 | linux,code = <KEY_WAKEUP>; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 199 | debounce-interval = <10>; |
Sudeep Holla | d1c04d3 | 2016-02-08 21:55:43 +0000 | [diff] [blame] | 200 | wakeup-source; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 201 | }; |
| 202 | }; |
| 203 | |
| 204 | panel: panel { |
| 205 | /* |
| 206 | * edt,et057090dhu: EDT 5.7" LCD TFT |
| 207 | * edt,et070080dh6: EDT 7.0" LCD TFT |
| 208 | */ |
| 209 | compatible = "edt,et057090dhu", "simple-panel"; |
| 210 | |
| 211 | backlight = <&backlight>; |
Marcel Ziswiler | 32980cb | 2018-08-31 18:37:50 +0200 | [diff] [blame^] | 212 | power-supply = <®_3v3>; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 213 | }; |
| 214 | |
| 215 | pwmleds { |
| 216 | compatible = "pwm-leds"; |
| 217 | |
| 218 | pwm1 { |
| 219 | label = "PWM1"; |
| 220 | pwms = <&pwm 3 19600>; |
| 221 | max-brightness = <255>; |
| 222 | }; |
| 223 | |
| 224 | pwm2 { |
| 225 | label = "PWM2"; |
| 226 | pwms = <&pwm 2 19600>; |
| 227 | max-brightness = <255>; |
| 228 | }; |
| 229 | |
| 230 | pwm3 { |
| 231 | label = "PWM3"; |
| 232 | pwms = <&pwm 1 19600>; |
| 233 | max-brightness = <255>; |
| 234 | }; |
| 235 | }; |
| 236 | |
Marcel Ziswiler | 32980cb | 2018-08-31 18:37:50 +0200 | [diff] [blame^] | 237 | reg_3v3: regulator-3v3 { |
| 238 | compatible = "regulator-fixed"; |
| 239 | regulator-name = "3.3V_SW"; |
| 240 | regulator-min-microvolt = <3300000>; |
| 241 | regulator-max-microvolt = <3300000>; |
| 242 | }; |
| 243 | |
Marcel Ziswiler | f98439c | 2018-08-31 18:37:49 +0200 | [diff] [blame] | 244 | reg_5v0: regulator-5v0 { |
| 245 | compatible = "regulator-fixed"; |
| 246 | regulator-name = "5V_SW"; |
| 247 | regulator-min-microvolt = <5000000>; |
| 248 | regulator-max-microvolt = <5000000>; |
| 249 | }; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 250 | |
Marcel Ziswiler | f98439c | 2018-08-31 18:37:49 +0200 | [diff] [blame] | 251 | /* USBO1_EN */ |
| 252 | reg_usbo1_vbus: regulator-usbo1-vbus { |
| 253 | compatible = "regulator-fixed"; |
| 254 | regulator-name = "VCC_USBO1"; |
| 255 | regulator-min-microvolt = <5000000>; |
| 256 | regulator-max-microvolt = <5000000>; |
| 257 | gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>; |
| 258 | enable-active-high; |
| 259 | vin-supply = <®_5v0>; |
| 260 | }; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 261 | |
Marcel Ziswiler | f98439c | 2018-08-31 18:37:49 +0200 | [diff] [blame] | 262 | /* USBH_EN */ |
| 263 | reg_usbh_vbus: regulator-usbh-vbus { |
| 264 | compatible = "regulator-fixed"; |
| 265 | regulator-name = "VCC_USBH(2A|2C|2D|3|4)"; |
| 266 | regulator-min-microvolt = <5000000>; |
| 267 | regulator-max-microvolt = <5000000>; |
| 268 | gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>; |
| 269 | enable-active-high; |
| 270 | vin-supply = <®_5v0>; |
Marcel Ziswiler | 6d0a067 | 2014-06-10 00:52:46 +0200 | [diff] [blame] | 271 | }; |
| 272 | }; |