blob: f5691dbc26d241909a65a42a2278bae7f60afcf7 [file] [log] [blame]
Thomas Gleixner1d0ea062019-05-29 16:57:46 -07001// SPDX-License-Identifier: GPL-2.0-only
Haojian Zhuang40c7d442014-05-07 08:55:29 +08002/*
3 * Copyright (C) 2013-2014 Linaro Ltd.
4 * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang40c7d442014-05-07 08:55:29 +08005 */
6
7/dts-v1/;
8
9#include "hip04.dtsi"
10
11/ {
12 /* memory bus is 64-bit */
13 #address-cells = <2>;
14 #size-cells = <2>;
15 model = "Hisilicon D01 Development Board";
16 compatible = "hisilicon,hip04-d01";
17
Rob Herring8dccafa2017-10-13 12:54:51 -050018 memory@0,10000000 {
Haojian Zhuang40c7d442014-05-07 08:55:29 +080019 device_type = "memory";
20 reg = <0x00000000 0x10000000 0x00000000 0xc0000000>,
21 <0x00000004 0xc0000000 0x00000003 0x40000000>;
22 };
23
24 soc {
Zhen Lei30ea0262020-10-12 14:12:16 +080025 uart0: serial@4007000 {
Haojian Zhuang40c7d442014-05-07 08:55:29 +080026 status = "ok";
27 };
28 };
29};