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Thomas Gleixner8e8e69d2019-05-29 07:17:59 -07001/* SPDX-License-Identifier: GPL-2.0-only */
Jeeja KP473eb872015-07-21 23:53:55 +05302/*
Pierre-Louis Bossart303681f2019-07-29 10:51:48 -05003 * intel-nhlt.h - Intel HDA Platform NHLT header
Jeeja KP473eb872015-07-21 23:53:55 +05304 *
Pierre-Louis Bossart303681f2019-07-29 10:51:48 -05005 * Copyright (c) 2015-2019 Intel Corporation
Jeeja KP473eb872015-07-21 23:53:55 +05306 */
Pierre-Louis Bossart303681f2019-07-29 10:51:48 -05007
8#ifndef __INTEL_NHLT_H__
9#define __INTEL_NHLT_H__
Jeeja KP473eb872015-07-21 23:53:55 +053010
Jeeja KPaba3dd52015-08-01 19:40:40 +053011#include <linux/acpi.h>
Jeeja KP473eb872015-07-21 23:53:55 +053012
Pierre-Louis Bossart303681f2019-07-29 10:51:48 -050013#if IS_ENABLED(CONFIG_ACPI) && IS_ENABLED(CONFIG_SND_INTEL_NHLT)
14
Jeeja KP473eb872015-07-21 23:53:55 +053015struct wav_fmt {
16 u16 fmt_tag;
17 u16 channels;
18 u32 samples_per_sec;
19 u32 avg_bytes_per_sec;
20 u16 block_align;
21 u16 bits_per_sample;
22 u16 cb_size;
23} __packed;
24
25struct wav_fmt_ext {
26 struct wav_fmt fmt;
27 union samples {
28 u16 valid_bits_per_sample;
29 u16 samples_per_block;
30 u16 reserved;
31 } sample;
32 u32 channel_mask;
33 u8 sub_fmt[16];
34} __packed;
35
36enum nhlt_link_type {
37 NHLT_LINK_HDA = 0,
38 NHLT_LINK_DSP = 1,
39 NHLT_LINK_DMIC = 2,
40 NHLT_LINK_SSP = 3,
41 NHLT_LINK_INVALID
42};
43
44enum nhlt_device_type {
45 NHLT_DEVICE_BT = 0,
46 NHLT_DEVICE_DMIC = 1,
47 NHLT_DEVICE_I2S = 4,
48 NHLT_DEVICE_INVALID
49};
50
51struct nhlt_specific_cfg {
52 u32 size;
53 u8 caps[0];
54} __packed;
55
56struct nhlt_fmt_cfg {
57 struct wav_fmt_ext fmt_ext;
58 struct nhlt_specific_cfg config;
59} __packed;
60
61struct nhlt_fmt {
62 u8 fmt_count;
63 struct nhlt_fmt_cfg fmt_config[0];
64} __packed;
65
66struct nhlt_endpoint {
67 u32 length;
68 u8 linktype;
69 u8 instance_id;
70 u16 vendor_id;
71 u16 device_id;
72 u16 revision_id;
73 u32 subsystem_id;
74 u8 device_type;
75 u8 direction;
76 u8 virtual_bus_id;
77 struct nhlt_specific_cfg config;
78} __packed;
79
80struct nhlt_acpi_table {
Jeeja KPaba3dd52015-08-01 19:40:40 +053081 struct acpi_table_header header;
Jeeja KP473eb872015-07-21 23:53:55 +053082 u8 endpoint_count;
83 struct nhlt_endpoint desc[0];
84} __packed;
85
86struct nhlt_resource_desc {
87 u32 extra;
88 u16 flags;
89 u64 addr_spc_gra;
90 u64 min_addr;
91 u64 max_addr;
92 u64 addr_trans_offset;
93 u64 length;
94} __packed;
95
Yong Zhif65cf7d62016-05-26 21:30:15 -070096#define MIC_ARRAY_2CH 2
97#define MIC_ARRAY_4CH 4
98
99struct nhlt_tdm_config {
100 u8 virtual_slot;
101 u8 config_type;
102} __packed;
103
104struct nhlt_dmic_array_config {
105 struct nhlt_tdm_config tdm_config;
106 u8 array_type;
107} __packed;
108
109enum {
110 NHLT_MIC_ARRAY_2CH_SMALL = 0xa,
111 NHLT_MIC_ARRAY_2CH_BIG = 0xb,
112 NHLT_MIC_ARRAY_4CH_1ST_GEOM = 0xc,
113 NHLT_MIC_ARRAY_4CH_L_SHAPED = 0xd,
114 NHLT_MIC_ARRAY_4CH_2ND_GEOM = 0xe,
115 NHLT_MIC_ARRAY_VENDOR_DEFINED = 0xf,
116};
117
Pierre-Louis Bossart303681f2019-07-29 10:51:48 -0500118struct nhlt_acpi_table *intel_nhlt_init(struct device *dev);
119
120void intel_nhlt_free(struct nhlt_acpi_table *addr);
121
122int intel_nhlt_get_dmic_geo(struct device *dev, struct nhlt_acpi_table *nhlt);
123
124#else
125
126struct nhlt_acpi_table;
127
128static inline struct nhlt_acpi_table *intel_nhlt_init(struct device *dev)
129{
130 return NULL;
131}
132
133static inline void intel_nhlt_free(struct nhlt_acpi_table *addr)
134{
135}
136
137static inline int intel_nhlt_get_dmic_geo(struct device *dev,
138 struct nhlt_acpi_table *nhlt)
139{
140 return 0;
141}
142#endif
143
Jeeja KP473eb872015-07-21 23:53:55 +0530144#endif