Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/gpio.h> |
Shawn Guo | 53b8ff9 | 2011-05-31 17:07:03 +0800 | [diff] [blame] | 18 | #include <linux/leds.h> |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 19 | #include <linux/clk.h> |
Dong Aisheng | 074c54f | 2011-07-20 11:41:43 +0800 | [diff] [blame] | 20 | #include <linux/i2c.h> |
Wolfram Sang | e55e48f | 2011-07-15 22:11:03 +0200 | [diff] [blame] | 21 | #include <linux/regulator/machine.h> |
| 22 | #include <linux/regulator/fixed.h> |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 23 | |
| 24 | #include <asm/mach-types.h> |
| 25 | #include <asm/mach/arch.h> |
| 26 | #include <asm/mach/time.h> |
| 27 | |
| 28 | #include <mach/common.h> |
| 29 | #include <mach/iomux-mx28.h> |
| 30 | |
| 31 | #include "devices-mx28.h" |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 32 | |
Shawn Guo | acc9cdc | 2011-03-03 22:13:38 +0800 | [diff] [blame] | 33 | #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13) |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 34 | #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15) |
Shawn Guo | 53b8ff9 | 2011-05-31 17:07:03 +0800 | [diff] [blame] | 35 | #define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5) |
Shawn Guo | 0590a79 | 2011-03-08 18:51:10 +0800 | [diff] [blame] | 36 | #define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18) |
| 37 | #define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 38 | #define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) |
| 39 | |
Shawn Guo | 5bb2c82 | 2011-02-22 16:50:24 +0800 | [diff] [blame] | 40 | #define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12) |
| 41 | #define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28) |
| 42 | #define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28) |
| 43 | #define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29) |
| 44 | |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 45 | static const iomux_cfg_t mx28evk_pads[] __initconst = { |
| 46 | /* duart */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 47 | MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL, |
| 48 | MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 49 | |
Shawn Guo | 15808182 | 2011-02-17 14:28:52 +0800 | [diff] [blame] | 50 | /* auart0 */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 51 | MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL, |
| 52 | MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL, |
| 53 | MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL, |
| 54 | MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL, |
Shawn Guo | 15808182 | 2011-02-17 14:28:52 +0800 | [diff] [blame] | 55 | /* auart3 */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 56 | MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL, |
| 57 | MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL, |
| 58 | MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL, |
| 59 | MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL, |
Shawn Guo | 15808182 | 2011-02-17 14:28:52 +0800 | [diff] [blame] | 60 | |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 61 | #define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP) |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 62 | /* fec0 */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 63 | MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC, |
| 64 | MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC, |
| 65 | MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC, |
| 66 | MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC, |
| 67 | MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC, |
| 68 | MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC, |
| 69 | MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC, |
| 70 | MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC, |
| 71 | MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC, |
Shawn Guo | 48f76ed | 2011-01-11 20:09:24 +0800 | [diff] [blame] | 72 | /* fec1 */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 73 | MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC, |
| 74 | MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC, |
| 75 | MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC, |
| 76 | MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC, |
| 77 | MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC, |
| 78 | MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 79 | /* phy power line */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 80 | MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 81 | /* phy reset line */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 82 | MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL, |
Shawn Guo | acc9cdc | 2011-03-03 22:13:38 +0800 | [diff] [blame] | 83 | |
| 84 | /* flexcan0 */ |
| 85 | MX28_PAD_GPMI_RDY2__CAN0_TX, |
| 86 | MX28_PAD_GPMI_RDY3__CAN0_RX, |
| 87 | /* flexcan1 */ |
| 88 | MX28_PAD_GPMI_CE2N__CAN1_TX, |
| 89 | MX28_PAD_GPMI_CE3N__CAN1_RX, |
| 90 | /* transceiver power control */ |
| 91 | MX28_PAD_SSP1_CMD__GPIO_2_13, |
Shawn Guo | 0590a79 | 2011-03-08 18:51:10 +0800 | [diff] [blame] | 92 | |
| 93 | /* mxsfb (lcdif) */ |
| 94 | MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL, |
| 95 | MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL, |
| 96 | MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL, |
| 97 | MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL, |
| 98 | MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL, |
| 99 | MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL, |
| 100 | MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL, |
| 101 | MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL, |
| 102 | MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL, |
| 103 | MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL, |
| 104 | MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL, |
| 105 | MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL, |
| 106 | MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL, |
| 107 | MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL, |
| 108 | MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL, |
| 109 | MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL, |
| 110 | MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL, |
| 111 | MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL, |
| 112 | MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL, |
| 113 | MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL, |
| 114 | MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL, |
| 115 | MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL, |
| 116 | MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL, |
| 117 | MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL, |
| 118 | MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL, |
| 119 | MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL, |
| 120 | MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL, |
| 121 | MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL, |
| 122 | /* LCD panel enable */ |
| 123 | MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL, |
| 124 | /* backlight control */ |
| 125 | MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL, |
Shawn Guo | 5bb2c82 | 2011-02-22 16:50:24 +0800 | [diff] [blame] | 126 | /* mmc0 */ |
| 127 | MX28_PAD_SSP0_DATA0__SSP0_D0 | |
| 128 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 129 | MX28_PAD_SSP0_DATA1__SSP0_D1 | |
| 130 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 131 | MX28_PAD_SSP0_DATA2__SSP0_D2 | |
| 132 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 133 | MX28_PAD_SSP0_DATA3__SSP0_D3 | |
| 134 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 135 | MX28_PAD_SSP0_DATA4__SSP0_D4 | |
| 136 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 137 | MX28_PAD_SSP0_DATA5__SSP0_D5 | |
| 138 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 139 | MX28_PAD_SSP0_DATA6__SSP0_D6 | |
| 140 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 141 | MX28_PAD_SSP0_DATA7__SSP0_D7 | |
| 142 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 143 | MX28_PAD_SSP0_CMD__SSP0_CMD | |
| 144 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 145 | MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | |
| 146 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), |
| 147 | MX28_PAD_SSP0_SCK__SSP0_SCK | |
| 148 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), |
| 149 | /* write protect */ |
| 150 | MX28_PAD_SSP1_SCK__GPIO_2_12 | |
| 151 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), |
| 152 | /* slot power enable */ |
| 153 | MX28_PAD_PWM3__GPIO_3_28 | |
| 154 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), |
| 155 | |
| 156 | /* mmc1 */ |
| 157 | MX28_PAD_GPMI_D00__SSP1_D0 | |
| 158 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 159 | MX28_PAD_GPMI_D01__SSP1_D1 | |
| 160 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 161 | MX28_PAD_GPMI_D02__SSP1_D2 | |
| 162 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 163 | MX28_PAD_GPMI_D03__SSP1_D3 | |
| 164 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 165 | MX28_PAD_GPMI_D04__SSP1_D4 | |
| 166 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 167 | MX28_PAD_GPMI_D05__SSP1_D5 | |
| 168 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 169 | MX28_PAD_GPMI_D06__SSP1_D6 | |
| 170 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 171 | MX28_PAD_GPMI_D07__SSP1_D7 | |
| 172 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 173 | MX28_PAD_GPMI_RDY1__SSP1_CMD | |
| 174 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 175 | MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT | |
| 176 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), |
| 177 | MX28_PAD_GPMI_WRN__SSP1_SCK | |
| 178 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), |
| 179 | /* write protect */ |
| 180 | MX28_PAD_GPMI_RESETN__GPIO_0_28 | |
| 181 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), |
| 182 | /* slot power enable */ |
| 183 | MX28_PAD_PWM4__GPIO_3_29 | |
| 184 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), |
Shawn Guo | 53b8ff9 | 2011-05-31 17:07:03 +0800 | [diff] [blame] | 185 | |
| 186 | /* led */ |
| 187 | MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL, |
Dong Aisheng | c8ebcac | 2011-07-20 11:41:42 +0800 | [diff] [blame] | 188 | |
Dong Aisheng | 074c54f | 2011-07-20 11:41:43 +0800 | [diff] [blame] | 189 | /* I2C */ |
| 190 | MX28_PAD_I2C0_SCL__I2C0_SCL | |
| 191 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 192 | MX28_PAD_I2C0_SDA__I2C0_SDA | |
| 193 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 194 | |
Dong Aisheng | c8ebcac | 2011-07-20 11:41:42 +0800 | [diff] [blame] | 195 | /* saif0 & saif1 */ |
| 196 | MX28_PAD_SAIF0_MCLK__SAIF0_MCLK | |
| 197 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 198 | MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK | |
| 199 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 200 | MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK | |
| 201 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 202 | MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 | |
| 203 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
| 204 | MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 | |
| 205 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
Shawn Guo | 53b8ff9 | 2011-05-31 17:07:03 +0800 | [diff] [blame] | 206 | }; |
| 207 | |
| 208 | /* led */ |
| 209 | static const struct gpio_led mx28evk_leds[] __initconst = { |
| 210 | { |
| 211 | .name = "GPIO-LED", |
| 212 | .default_trigger = "heartbeat", |
| 213 | .gpio = MX28EVK_GPIO_LED, |
| 214 | }, |
| 215 | }; |
| 216 | |
| 217 | static const struct gpio_led_platform_data mx28evk_led_data __initconst = { |
| 218 | .leds = mx28evk_leds, |
| 219 | .num_leds = ARRAY_SIZE(mx28evk_leds), |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 220 | }; |
| 221 | |
| 222 | /* fec */ |
| 223 | static void __init mx28evk_fec_reset(void) |
| 224 | { |
| 225 | int ret; |
| 226 | struct clk *clk; |
| 227 | |
| 228 | /* Enable fec phy clock */ |
| 229 | clk = clk_get_sys("pll2", NULL); |
| 230 | if (!IS_ERR(clk)) |
| 231 | clk_enable(clk); |
| 232 | |
| 233 | /* Power up fec phy */ |
| 234 | ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power"); |
| 235 | if (ret) { |
| 236 | pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret); |
| 237 | return; |
| 238 | } |
| 239 | |
| 240 | ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0); |
| 241 | if (ret) { |
| 242 | pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret); |
| 243 | return; |
| 244 | } |
| 245 | |
| 246 | /* Reset fec phy */ |
| 247 | ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset"); |
| 248 | if (ret) { |
| 249 | pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret); |
| 250 | return; |
| 251 | } |
| 252 | |
| 253 | gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0); |
| 254 | if (ret) { |
| 255 | pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret); |
| 256 | return; |
| 257 | } |
| 258 | |
| 259 | mdelay(1); |
| 260 | gpio_set_value(MX28EVK_FEC_PHY_RESET, 1); |
| 261 | } |
| 262 | |
Shawn Guo | a320b27 | 2011-01-14 15:25:52 +0800 | [diff] [blame] | 263 | static struct fec_platform_data mx28_fec_pdata[] __initdata = { |
Shawn Guo | 48f76ed | 2011-01-11 20:09:24 +0800 | [diff] [blame] | 264 | { |
| 265 | /* fec0 */ |
| 266 | .phy = PHY_INTERFACE_MODE_RMII, |
| 267 | }, { |
| 268 | /* fec1 */ |
| 269 | .phy = PHY_INTERFACE_MODE_RMII, |
| 270 | }, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 271 | }; |
| 272 | |
Shawn Guo | a320b27 | 2011-01-14 15:25:52 +0800 | [diff] [blame] | 273 | static int __init mx28evk_fec_get_mac(void) |
| 274 | { |
| 275 | int i; |
| 276 | u32 val; |
| 277 | const u32 *ocotp = mxs_get_ocotp(); |
| 278 | |
| 279 | if (!ocotp) |
| 280 | goto error; |
| 281 | |
| 282 | /* |
| 283 | * OCOTP only stores the last 4 octets for each mac address, |
| 284 | * so hard-code Freescale OUI (00:04:9f) here. |
| 285 | */ |
| 286 | for (i = 0; i < 2; i++) { |
| 287 | val = ocotp[i * 4]; |
| 288 | mx28_fec_pdata[i].mac[0] = 0x00; |
| 289 | mx28_fec_pdata[i].mac[1] = 0x04; |
| 290 | mx28_fec_pdata[i].mac[2] = 0x9f; |
| 291 | mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff; |
| 292 | mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff; |
| 293 | mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff; |
| 294 | } |
| 295 | |
| 296 | return 0; |
| 297 | |
| 298 | error: |
| 299 | pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__); |
| 300 | return -ETIMEDOUT; |
| 301 | } |
| 302 | |
Shawn Guo | acc9cdc | 2011-03-03 22:13:38 +0800 | [diff] [blame] | 303 | /* |
| 304 | * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers |
| 305 | */ |
| 306 | static int flexcan0_en, flexcan1_en; |
| 307 | |
| 308 | static void mx28evk_flexcan_switch(void) |
| 309 | { |
| 310 | if (flexcan0_en || flexcan1_en) |
| 311 | gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1); |
| 312 | else |
| 313 | gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0); |
| 314 | } |
| 315 | |
| 316 | static void mx28evk_flexcan0_switch(int enable) |
| 317 | { |
| 318 | flexcan0_en = enable; |
| 319 | mx28evk_flexcan_switch(); |
| 320 | } |
| 321 | |
| 322 | static void mx28evk_flexcan1_switch(int enable) |
| 323 | { |
| 324 | flexcan1_en = enable; |
| 325 | mx28evk_flexcan_switch(); |
| 326 | } |
| 327 | |
| 328 | static const struct flexcan_platform_data |
| 329 | mx28evk_flexcan_pdata[] __initconst = { |
| 330 | { |
| 331 | .transceiver_switch = mx28evk_flexcan0_switch, |
| 332 | }, { |
| 333 | .transceiver_switch = mx28evk_flexcan1_switch, |
| 334 | } |
| 335 | }; |
| 336 | |
Shawn Guo | 0590a79 | 2011-03-08 18:51:10 +0800 | [diff] [blame] | 337 | /* mxsfb (lcdif) */ |
| 338 | static struct fb_videomode mx28evk_video_modes[] = { |
| 339 | { |
| 340 | .name = "Seiko-43WVF1G", |
| 341 | .refresh = 60, |
| 342 | .xres = 800, |
| 343 | .yres = 480, |
| 344 | .pixclock = 29851, /* picosecond (33.5 MHz) */ |
| 345 | .left_margin = 89, |
| 346 | .right_margin = 164, |
| 347 | .upper_margin = 23, |
| 348 | .lower_margin = 10, |
| 349 | .hsync_len = 10, |
| 350 | .vsync_len = 10, |
| 351 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | |
| 352 | FB_SYNC_DOTCLK_FAILING_ACT, |
| 353 | }, |
| 354 | }; |
| 355 | |
| 356 | static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = { |
| 357 | .mode_list = mx28evk_video_modes, |
| 358 | .mode_count = ARRAY_SIZE(mx28evk_video_modes), |
| 359 | .default_bpp = 32, |
| 360 | .ld_intf_width = STMLCDIF_24BIT, |
| 361 | }; |
| 362 | |
Shawn Guo | 5bb2c82 | 2011-02-22 16:50:24 +0800 | [diff] [blame] | 363 | static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = { |
| 364 | { |
| 365 | /* mmc0 */ |
| 366 | .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT, |
| 367 | .flags = SLOTF_8_BIT_CAPABLE, |
| 368 | }, { |
| 369 | /* mmc1 */ |
| 370 | .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT, |
| 371 | .flags = SLOTF_8_BIT_CAPABLE, |
| 372 | }, |
| 373 | }; |
| 374 | |
Dong Aisheng | 074c54f | 2011-07-20 11:41:43 +0800 | [diff] [blame] | 375 | static struct i2c_board_info mxs_i2c0_board_info[] __initdata = { |
| 376 | { |
| 377 | I2C_BOARD_INFO("sgtl5000", 0x0a), |
| 378 | }, |
| 379 | }; |
| 380 | |
Wolfram Sang | e55e48f | 2011-07-15 22:11:03 +0200 | [diff] [blame] | 381 | #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE) |
| 382 | static struct regulator_consumer_supply mx28evk_audio_consumer_supplies[] = { |
| 383 | REGULATOR_SUPPLY("VDDA", "0-000a"), |
| 384 | REGULATOR_SUPPLY("VDDIO", "0-000a"), |
| 385 | }; |
| 386 | |
| 387 | static struct regulator_init_data mx28evk_vdd_reg_init_data = { |
| 388 | .constraints = { |
| 389 | .name = "3V3", |
| 390 | .always_on = 1, |
| 391 | }, |
| 392 | .consumer_supplies = mx28evk_audio_consumer_supplies, |
| 393 | .num_consumer_supplies = ARRAY_SIZE(mx28evk_audio_consumer_supplies), |
| 394 | }; |
| 395 | |
| 396 | static struct fixed_voltage_config mx28evk_vdd_pdata = { |
| 397 | .supply_name = "board-3V3", |
| 398 | .microvolts = 3300000, |
| 399 | .gpio = -EINVAL, |
| 400 | .enabled_at_boot = 1, |
| 401 | .init_data = &mx28evk_vdd_reg_init_data, |
| 402 | }; |
| 403 | static struct platform_device mx28evk_voltage_regulator = { |
| 404 | .name = "reg-fixed-voltage", |
| 405 | .id = -1, |
| 406 | .num_resources = 0, |
| 407 | .dev = { |
| 408 | .platform_data = &mx28evk_vdd_pdata, |
| 409 | }, |
| 410 | }; |
| 411 | static void __init mx28evk_add_regulators(void) |
| 412 | { |
| 413 | platform_device_register(&mx28evk_voltage_regulator); |
| 414 | } |
| 415 | #else |
| 416 | static void __init mx28evk_add_regulators(void) {} |
| 417 | #endif |
| 418 | |
Fabio Estevam | a35b914 | 2011-09-14 10:20:25 -0300 | [diff] [blame] | 419 | static struct gpio mx28evk_lcd_gpios[] = { |
| 420 | { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" }, |
| 421 | { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, |
| 422 | }; |
| 423 | |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 424 | static void __init mx28evk_init(void) |
| 425 | { |
Shawn Guo | acc9cdc | 2011-03-03 22:13:38 +0800 | [diff] [blame] | 426 | int ret; |
| 427 | |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 428 | mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads)); |
| 429 | |
| 430 | mx28_add_duart(); |
Shawn Guo | 15808182 | 2011-02-17 14:28:52 +0800 | [diff] [blame] | 431 | mx28_add_auart0(); |
| 432 | mx28_add_auart3(); |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 433 | |
Shawn Guo | a320b27 | 2011-01-14 15:25:52 +0800 | [diff] [blame] | 434 | if (mx28evk_fec_get_mac()) |
| 435 | pr_warn("%s: failed on fec mac setup\n", __func__); |
| 436 | |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 437 | mx28evk_fec_reset(); |
Shawn Guo | 48f76ed | 2011-01-11 20:09:24 +0800 | [diff] [blame] | 438 | mx28_add_fec(0, &mx28_fec_pdata[0]); |
| 439 | mx28_add_fec(1, &mx28_fec_pdata[1]); |
Shawn Guo | acc9cdc | 2011-03-03 22:13:38 +0800 | [diff] [blame] | 440 | |
| 441 | ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT, |
| 442 | "flexcan-switch"); |
| 443 | if (ret) { |
| 444 | pr_err("failed to request gpio flexcan-switch: %d\n", ret); |
| 445 | } else { |
| 446 | mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]); |
| 447 | mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]); |
| 448 | } |
Shawn Guo | 0590a79 | 2011-03-08 18:51:10 +0800 | [diff] [blame] | 449 | |
Fabio Estevam | a35b914 | 2011-09-14 10:20:25 -0300 | [diff] [blame] | 450 | ret = gpio_request_array(mx28evk_lcd_gpios, |
| 451 | ARRAY_SIZE(mx28evk_lcd_gpios)); |
Shawn Guo | 0590a79 | 2011-03-08 18:51:10 +0800 | [diff] [blame] | 452 | if (ret) |
Fabio Estevam | a35b914 | 2011-09-14 10:20:25 -0300 | [diff] [blame] | 453 | pr_warn("failed to request gpio pins for lcd: %d\n", ret); |
Shawn Guo | 0590a79 | 2011-03-08 18:51:10 +0800 | [diff] [blame] | 454 | else |
Fabio Estevam | a35b914 | 2011-09-14 10:20:25 -0300 | [diff] [blame] | 455 | mx28_add_mxsfb(&mx28evk_mxsfb_pdata); |
Shawn Guo | 5bb2c82 | 2011-02-22 16:50:24 +0800 | [diff] [blame] | 456 | |
Dong Aisheng | c8ebcac | 2011-07-20 11:41:42 +0800 | [diff] [blame] | 457 | mx28_add_saif(0); |
| 458 | mx28_add_saif(1); |
| 459 | |
Dong Aisheng | 074c54f | 2011-07-20 11:41:43 +0800 | [diff] [blame] | 460 | mx28_add_mxs_i2c(0); |
| 461 | i2c_register_board_info(0, mxs_i2c0_board_info, |
| 462 | ARRAY_SIZE(mxs_i2c0_board_info)); |
| 463 | |
Wolfram Sang | e55e48f | 2011-07-15 22:11:03 +0200 | [diff] [blame] | 464 | mx28evk_add_regulators(); |
| 465 | |
Dong Aisheng | ce9b8e6 | 2011-07-20 11:41:44 +0800 | [diff] [blame] | 466 | mxs_add_platform_device("mxs-sgtl5000", 0, NULL, 0, |
| 467 | NULL, 0); |
| 468 | |
Shawn Guo | 5bb2c82 | 2011-02-22 16:50:24 +0800 | [diff] [blame] | 469 | /* power on mmc slot by writing 0 to the gpio */ |
Fabio Estevam | c7dae18 | 2011-03-29 16:45:09 -0300 | [diff] [blame] | 470 | ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW, |
Shawn Guo | 5bb2c82 | 2011-02-22 16:50:24 +0800 | [diff] [blame] | 471 | "mmc0-slot-power"); |
| 472 | if (ret) |
| 473 | pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret); |
Shawn Guo | e94e05e | 2011-11-08 21:57:59 +0800 | [diff] [blame] | 474 | else |
| 475 | mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]); |
Shawn Guo | 5bb2c82 | 2011-02-22 16:50:24 +0800 | [diff] [blame] | 476 | |
Fabio Estevam | c7dae18 | 2011-03-29 16:45:09 -0300 | [diff] [blame] | 477 | ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW, |
Shawn Guo | 5bb2c82 | 2011-02-22 16:50:24 +0800 | [diff] [blame] | 478 | "mmc1-slot-power"); |
| 479 | if (ret) |
| 480 | pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); |
Fabio Estevam | a35b914 | 2011-09-14 10:20:25 -0300 | [diff] [blame] | 481 | else |
| 482 | mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); |
Shawn Guo | 53b8ff9 | 2011-05-31 17:07:03 +0800 | [diff] [blame] | 483 | |
Wolfram Sang | 87d022c | 2011-05-02 16:26:48 +0200 | [diff] [blame] | 484 | mx28_add_rtc_stmp3xxx(); |
Shawn Guo | 53b8ff9 | 2011-05-31 17:07:03 +0800 | [diff] [blame] | 485 | |
| 486 | gpio_led_register_device(0, &mx28evk_led_data); |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 487 | } |
| 488 | |
| 489 | static void __init mx28evk_timer_init(void) |
| 490 | { |
| 491 | mx28_clocks_init(); |
| 492 | } |
| 493 | |
| 494 | static struct sys_timer mx28evk_timer = { |
| 495 | .init = mx28evk_timer_init, |
| 496 | }; |
| 497 | |
| 498 | MACHINE_START(MX28EVK, "Freescale MX28 EVK") |
| 499 | /* Maintainer: Freescale Semiconductor, Inc. */ |
| 500 | .map_io = mx28_map_io, |
| 501 | .init_irq = mx28_init_irq, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 502 | .timer = &mx28evk_timer, |
Lauri Hintsala | 2db3fcf | 2011-10-18 12:52:29 +0300 | [diff] [blame] | 503 | .init_machine = mx28evk_init, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 504 | MACHINE_END |