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Carlo Caione4a69fcd2015-10-07 22:31:04 +02001/*
2 * Copyright 2015 Endless Mobile, Inc.
3 * Author: Carlo Caione <carlo@endlessm.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 *
23 * Or, alternatively,
24 *
25 * b) Permission is hereby granted, free of charge, to any person
26 * obtaining a copy of this software and associated documentation
27 * files (the "Software"), to deal in the Software without
28 * restriction, including without limitation the rights to use,
29 * copy, modify, merge, publish, distribute, sublicense, and/or
30 * sell copies of the Software, and to permit persons to whom the
31 * Software is furnished to do so, subject to the following
32 * conditions:
33 *
34 * The above copyright notice and this permission notice shall be
35 * included in all copies or substantial portions of the Software.
36 *
37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 * OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47#include <dt-bindings/clock/meson8b-clkc.h>
48#include <dt-bindings/gpio/meson8b-gpio.h>
Neil Armstrongcad059c2016-05-30 15:27:18 +020049#include <dt-bindings/reset/amlogic,meson8b-reset.h>
Martin Blumenstinglf44135e2017-04-17 23:39:38 +020050#include "meson.dtsi"
Carlo Caione4a69fcd2015-10-07 22:31:04 +020051
52/ {
Carlo Caione4a69fcd2015-10-07 22:31:04 +020053 cpus {
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 cpu@200 {
58 device_type = "cpu";
59 compatible = "arm,cortex-a5";
60 next-level-cache = <&L2>;
61 reg = <0x200>;
62 };
63
64 cpu@201 {
65 device_type = "cpu";
66 compatible = "arm,cortex-a5";
67 next-level-cache = <&L2>;
68 reg = <0x201>;
69 };
70
71 cpu@202 {
72 device_type = "cpu";
73 compatible = "arm,cortex-a5";
74 next-level-cache = <&L2>;
75 reg = <0x202>;
76 };
77
78 cpu@203 {
79 device_type = "cpu";
80 compatible = "arm,cortex-a5";
81 next-level-cache = <&L2>;
82 reg = <0x203>;
83 };
84 };
Martin Blumenstingld8dd3d22017-06-15 23:33:51 +020085
86 scu@c4300000 {
87 compatible = "arm,cortex-a5-scu";
88 reg = <0xc4300000 0x100>;
89 };
Martin Blumenstinglf44135e2017-04-17 23:39:38 +020090}; /* end of / */
Carlo Caione4a69fcd2015-10-07 22:31:04 +020091
Martin Blumenstinglf44135e2017-04-17 23:39:38 +020092&aobus {
93 pinctrl_aobus: pinctrl@84 {
94 compatible = "amlogic,meson8b-aobus-pinctrl";
95 reg = <0x84 0xc>;
Carlo Caione4a69fcd2015-10-07 22:31:04 +020096 #address-cells = <1>;
97 #size-cells = <1>;
98 ranges;
99
Martin Blumenstinglf44135e2017-04-17 23:39:38 +0200100 gpio_ao: ao-bank@14 {
101 reg = <0x14 0x4>,
102 <0x2c 0x4>,
103 <0x24 0x8>;
104 reg-names = "mux", "pull", "gpio";
105 gpio-controller;
106 #gpio-cells = <2>;
107 gpio-ranges = <&pinctrl_aobus 0 130 16>;
Carlo Caione4a69fcd2015-10-07 22:31:04 +0200108 };
109
Martin Blumenstinglf44135e2017-04-17 23:39:38 +0200110 uart_ao_a_pins: uart_ao_a {
111 mux {
112 groups = "uart_tx_ao_a", "uart_rx_ao_a";
113 function = "uart_ao";
Carlo Caione4a69fcd2015-10-07 22:31:04 +0200114 };
115 };
116 };
Martin Blumenstinglf44135e2017-04-17 23:39:38 +0200117};
118
119&cbus {
120 clkc: clock-controller@4000 {
121 #clock-cells = <1>;
122 compatible = "amlogic,meson8b-clkc";
123 reg = <0x8000 0x4>, <0x4000 0x460>;
124 };
125
126 reset: reset-controller@4404 {
127 compatible = "amlogic,meson8b-reset";
128 reg = <0x4404 0x20>;
129 #reset-cells = <1>;
130 };
131
Martin Blumenstinglf44135e2017-04-17 23:39:38 +0200132 pwm_ef: pwm@86c0 {
133 compatible = "amlogic,meson8b-pwm";
134 reg = <0x86c0 0x10>;
135 #pwm-cells = <3>;
136 status = "disabled";
137 };
138
Martin Blumenstinglf44135e2017-04-17 23:39:38 +0200139 pinctrl_cbus: pinctrl@9880 {
140 compatible = "amlogic,meson8b-cbus-pinctrl";
141 reg = <0x9880 0x10>;
142 #address-cells = <1>;
143 #size-cells = <1>;
144 ranges;
145
146 gpio: banks@80b0 {
147 reg = <0x80b0 0x28>,
148 <0x80e8 0x18>,
149 <0x8120 0x18>,
150 <0x8030 0x38>;
151 reg-names = "mux", "pull", "pull-enable", "gpio";
152 gpio-controller;
153 #gpio-cells = <2>;
154 gpio-ranges = <&pinctrl_cbus 0 0 130>;
155 };
156 };
157};
158
Martin Blumenstinglf28d4bd2017-06-15 23:33:52 +0200159&ethmac {
160 clocks = <&clkc CLKID_ETH>;
161 clock-names = "stmmaceth";
162};
163
Martin Blumenstingla35910d2017-06-15 23:33:49 +0200164&hwrng {
165 compatible = "amlogic,meson8b-rng", "amlogic,meson-rng";
166 clocks = <&clkc CLKID_RNG0>;
167 clock-names = "core";
168};
169
Carlo Caionebbe5b232017-04-17 23:42:44 +0200170&L2 {
171 arm,data-latency = <3 3 3>;
172 arm,tag-latency = <2 2 2>;
173 arm,filter-ranges = <0x100000 0xc0000000>;
174};
175
Martin Blumenstingl440bdcd2017-07-12 00:20:14 +0200176&pwm_ab {
177 compatible = "amlogic,meson8b-pwm";
178};
179
180&pwm_cd {
181 compatible = "amlogic,meson8b-pwm";
182};
183
Martin Blumenstingla39a3b92017-06-15 23:33:47 +0200184&saradc {
185 compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
186 clocks = <&clkc CLKID_XTAL>,
187 <&clkc CLKID_SAR_ADC>,
188 <&clkc CLKID_SANA>;
189 clock-names = "clkin", "core", "sana";
190};
191
Martin Blumenstinglf44135e2017-04-17 23:39:38 +0200192&uart_AO {
193 clocks = <&clkc CLKID_CLK81>;
194};
195
196&uart_A {
197 clocks = <&clkc CLKID_CLK81>;
198};
199
200&uart_B {
201 clocks = <&clkc CLKID_CLK81>;
202};
203
204&uart_C {
205 clocks = <&clkc CLKID_CLK81>;
206};
Martin Blumenstingle29b1cf2017-06-15 23:33:50 +0200207
208&usb0 {
209 compatible = "amlogic,meson8b-usb", "snps,dwc2";
210 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
211 clock-names = "otg";
212};
213
214&usb1 {
215 compatible = "amlogic,meson8b-usb", "snps,dwc2";
216 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
217 clock-names = "otg";
218};
219
220&usb0_phy {
221 compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
222 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
223 clock-names = "usb_general", "usb";
224 resets = <&reset RESET_USB_OTG>;
225};
226
227&usb1_phy {
228 compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy";
229 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
230 clock-names = "usb_general", "usb";
231 resets = <&reset RESET_USB_OTG>;
232};
Martin Blumenstingl2eca2a12017-07-12 00:22:22 +0200233
234&wdt {
235 compatible = "amlogic,meson8b-wdt";
236};