Gitiles
Code Review Sign In
review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 2e97a0c02b94f2ecd5cbf29ded90c5db055e8ad0 / . / Documentation / devicetree / bindings / usb / nvidia,tegra-xudc.yaml
blob: a39c76b89484946e89ce9cf2172c5646b64f59f1 [file] [log] [blame]
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC)
8
9description:
10 The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and
11 USB 3.0 SuperSpeed protocols.
12
13maintainers:
14 - Nagarjuna Kristam <nkristam@nvidia.com>
15 - JC Kuo <jckuo@nvidia.com>
16 - Thierry Reding <treding@nvidia.com>
17
18properties:
19 compatible:
20 items:
21 - enum:
22 - nvidia,tegra210-xudc # For Tegra210
23 - nvidia,tegra186-xudc # For Tegra186
Nagarjuna Kristam394b0122020-05-04 12:04:39 +0530[diff] [blame]24 - nvidia,tegra194-xudc # For Tegra194
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]25
26 reg:
27 minItems: 2
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]28 items:
29 - description: XUSB device controller registers
30 - description: XUSB device PCI Config registers
31 - description: XUSB device registers.
32
33 reg-names:
34 minItems: 2
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]35 items:
36 - const: base
37 - const: fpci
38 - const: ipfs
39
40 interrupts:
41 maxItems: 1
42 description: Must contain the XUSB device interrupt.
43
44 clocks:
45 minItems: 4
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]46 items:
47 - description: Clock to enable core XUSB dev clock.
48 - description: Clock to enable XUSB super speed clock.
49 - description: Clock to enable XUSB super speed dev clock.
50 - description: Clock to enable XUSB high speed dev clock.
51 - description: Clock to enable XUSB full speed dev clock.
52
53 clock-names:
54 minItems: 4
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]55 items:
Rob Herringf516fb72020-04-20 21:24:47 -0500[diff] [blame]56 - const: dev
57 - const: ss
58 - const: ss_src
59 - const: fs_src
60 - const: hs_src
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]61
Thierry Redinga90901a2021-12-06 16:55:59 +0100[diff] [blame]62 interconnects:
63 items:
64 - description: memory read client
65 - description: memory write client
66
67 interconnect-names:
68 items:
69 - const: dma-mem # read
70 - const: write
71
72 iommus:
73 maxItems: 1
74
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]75 power-domains:
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]76 items:
77 - description: XUSBB(device) power-domain
78 - description: XUSBA(superspeed) power-domain
79
80 power-domain-names:
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]81 items:
82 - const: dev
83 - const: ss
84
85 nvidia,xusb-padctl:
86 $ref: /schemas/types.yaml#/definitions/phandle-array
87 description:
88 phandle to the XUSB pad controller that is used to configure the USB pads
89 used by the XUDC controller.
90
91 phys:
92 minItems: 1
93 description:
94 Must contain an entry for each entry in phy-names.
95 See ../phy/phy-bindings.txt for details.
96
97 phy-names:
98 minItems: 1
99 items:
100 - const: usb2-0
101 - const: usb2-1
102 - const: usb2-2
103 - const: usb2-3
104 - const: usb3-0
105 - const: usb3-1
106 - const: usb3-2
107 - const: usb3-3
108
109 avddio-usb-supply:
110 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
111
112 hvdd-usb-supply:
113 description: USB controller power supply. Must supply 3.3 V.
114
115required:
116 - compatible
117 - reg
118 - reg-names
119 - interrupts
120 - clocks
121 - clock-names
122 - power-domains
123 - power-domain-names
124 - nvidia,xusb-padctl
125 - phys
126 - phy-names
127
128allOf:
129 - if:
130 properties:
131 compatible:
132 contains:
133 enum:
134 - nvidia,tegra210-xudc
135 then:
136 properties:
137 reg:
138 minItems: 3
139 reg-names:
140 minItems: 3
141 clocks:
142 minItems: 5
143 clock-names:
144 minItems: 5
145 required:
146 - avddio-usb-supply
147 - hvdd-usb-supply
148
149 - if:
150 properties:
151 compatible:
152 contains:
153 enum:
154 - nvidia,tegra186-xudc
Nagarjuna Kristam394b0122020-05-04 12:04:39 +0530[diff] [blame]155 - nvidia,tegra194-xudc
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]156 then:
157 properties:
158 reg:
159 maxItems: 2
160 reg-names:
161 maxItems: 2
162 clocks:
163 maxItems: 4
164 clock-names:
165 maxItems: 4
166
Rob Herring5be478f2020-10-02 18:41:43 -0500[diff] [blame]167additionalProperties: false
168
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]169examples:
170 - |
171 #include <dt-bindings/clock/tegra210-car.h>
172 #include <dt-bindings/gpio/tegra-gpio.h>
173 #include <dt-bindings/interrupt-controller/arm-gic.h>
174
175 usb@700d0000 {
176 compatible = "nvidia,tegra210-xudc";
Rob Herringfba56182020-05-12 15:45:43 -0500[diff] [blame]177 reg = <0x700d0000 0x8000>,
178 <0x700d8000 0x1000>,
179 <0x700d9000 0x1000>;
Nagarjuna Kristameba51232020-02-10 13:41:28 +0530[diff] [blame]180 reg-names = "base", "fpci", "ipfs";
181
182 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
183
184 clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
185 <&tegra_car TEGRA210_CLK_XUSB_SS>,
186 <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
187 <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
188 <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>;
189 clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src";
190
191 power-domains = <&pd_xusbdev>, <&pd_xusbss>;
192 power-domain-names = "dev", "ss";
193
194 nvidia,xusb-padctl = <&padctl>;
195
196 phys = <&micro_b>;
197 phy-names = "usb2-0";
198
199 avddio-usb-supply = <&vdd_pex_1v05>;
200 hvdd-usb-supply = <&vdd_3v3_sys>;
201 };