Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
Miquel Raynal | 72c5af0 | 2019-02-06 16:47:44 +0100 | [diff] [blame] | 2 | menuconfig MTD_RAW_NAND |
Miquel Raynal | daf9a87 | 2018-03-19 10:21:58 +0100 | [diff] [blame] | 3 | tristate "Raw/Parallel NAND Device Support" |
Boris Brezillon | a7ab085 | 2018-10-25 22:10:36 +0200 | [diff] [blame] | 4 | select MTD_NAND_CORE |
Miquel Raynal | c441bcd | 2020-08-27 10:52:04 +0200 | [diff] [blame] | 5 | select MTD_NAND_ECC |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 6 | help |
Miquel Raynal | daf9a87 | 2018-03-19 10:21:58 +0100 | [diff] [blame] | 7 | This enables support for accessing all type of raw/parallel |
| 8 | NAND flash devices. For further information see |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 9 | <http://www.linux-mtd.infradead.org/doc/nand.html>. |
| 10 | |
Miquel Raynal | 72c5af0 | 2019-02-06 16:47:44 +0100 | [diff] [blame] | 11 | if MTD_RAW_NAND |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 12 | |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 13 | comment "Raw/parallel NAND flash controllers" |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 14 | |
| 15 | config MTD_NAND_DENALI |
| 16 | tristate |
| 17 | |
| 18 | config MTD_NAND_DENALI_PCI |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 19 | tristate "Denali NAND controller on Intel Moorestown" |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 20 | select MTD_NAND_DENALI |
Geert Uytterhoeven | 7db782b | 2018-04-17 19:49:14 +0200 | [diff] [blame] | 21 | depends on PCI |
Miquel Raynal | d369181 | 2018-07-18 09:04:12 +0200 | [diff] [blame] | 22 | help |
| 23 | Enable the driver for NAND flash on Intel Moorestown, using the |
| 24 | Denali NAND controller core. |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 25 | |
| 26 | config MTD_NAND_DENALI_DT |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 27 | tristate "Denali NAND controller as a DT device" |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 28 | select MTD_NAND_DENALI |
Cai Huoqing | 2e69e18 | 2021-11-09 21:47:58 +0800 | [diff] [blame^] | 29 | depends on HAS_DMA && HAVE_CLK && OF && HAS_IOMEM |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 30 | help |
| 31 | Enable the driver for NAND flash on platforms using a Denali NAND |
| 32 | controller as a DT device. |
| 33 | |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 34 | config MTD_NAND_AMS_DELTA |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 35 | tristate "Amstrad E3 NAND controller" |
Boris Brezillon | fbb080a | 2018-11-11 08:55:08 +0100 | [diff] [blame] | 36 | depends on MACH_AMS_DELTA || COMPILE_TEST |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 37 | default y |
| 38 | help |
| 39 | Support for NAND flash on Amstrad E3 (Delta). |
| 40 | |
| 41 | config MTD_NAND_OMAP2 |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 42 | tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller" |
Boris Brezillon | 31ac1a5 | 2018-07-05 11:44:59 +0200 | [diff] [blame] | 43 | depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || COMPILE_TEST |
| 44 | depends on HAS_IOMEM |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 45 | help |
Miquel Raynal | d369181 | 2018-07-18 09:04:12 +0200 | [diff] [blame] | 46 | Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4 |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 47 | and Keystone platforms. |
| 48 | |
| 49 | config MTD_NAND_OMAP_BCH |
| 50 | depends on MTD_NAND_OMAP2 |
| 51 | bool "Support hardware based BCH error correction" |
| 52 | default n |
| 53 | select BCH |
| 54 | help |
| 55 | This config enables the ELM hardware engine, which can be used to |
| 56 | locate and correct errors when using BCH ECC scheme. This offloads |
| 57 | the cpu from doing ECC error searching and correction. However some |
| 58 | legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine |
| 59 | so this is optional for them. |
| 60 | |
| 61 | config MTD_NAND_OMAP_BCH_BUILD |
| 62 | def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH |
| 63 | |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 64 | config MTD_NAND_AU1550 |
| 65 | tristate "Au1550/1200 NAND support" |
| 66 | depends on MIPS_ALCHEMY |
| 67 | help |
| 68 | This enables the driver for the NAND flash controller on the |
| 69 | AMD/Alchemy 1550 SOC. |
| 70 | |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 71 | config MTD_NAND_NDFC |
| 72 | tristate "IBM/MCC 4xx NAND controller" |
| 73 | depends on 4xx |
Miquel Raynal | 5180a62 | 2020-09-30 01:01:22 +0200 | [diff] [blame] | 74 | select MTD_NAND_ECC_SW_HAMMING |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 75 | select MTD_NAND_ECC_SW_HAMMING_SMC |
| 76 | help |
| 77 | NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs |
| 78 | |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 79 | config MTD_NAND_S3C2410 |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 80 | tristate "Samsung S3C NAND controller" |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 81 | depends on ARCH_S3C24XX || ARCH_S3C64XX |
| 82 | help |
| 83 | This enables the NAND flash controller on the S3C24xx and S3C64xx |
| 84 | SoCs |
| 85 | |
| 86 | No board specific support is done by this driver, each board |
| 87 | must advertise a platform_device for the driver to attach. |
| 88 | |
| 89 | config MTD_NAND_S3C2410_DEBUG |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 90 | bool "Samsung S3C NAND controller debug" |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 91 | depends on MTD_NAND_S3C2410 |
| 92 | help |
| 93 | Enable debugging of the S3C NAND driver |
| 94 | |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 95 | config MTD_NAND_S3C2410_CLKSTOP |
| 96 | bool "Samsung S3C NAND IDLE clock stop" |
| 97 | depends on MTD_NAND_S3C2410 |
| 98 | default n |
| 99 | help |
| 100 | Stop the clock to the NAND controller when there is no chip |
| 101 | selected to save power. This will mean there is a small delay |
| 102 | when the is NAND chip selected or released, but will save |
| 103 | approximately 5mA of power when there is nothing happening. |
| 104 | |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 105 | config MTD_NAND_SHARPSL |
| 106 | tristate "Sharp SL Series (C7xx + others) NAND controller" |
| 107 | depends on ARCH_PXA || COMPILE_TEST |
| 108 | depends on HAS_IOMEM |
| 109 | |
| 110 | config MTD_NAND_CAFE |
| 111 | tristate "OLPC CAFÉ NAND controller" |
| 112 | depends on PCI |
| 113 | select REED_SOLOMON |
| 114 | select REED_SOLOMON_DEC16 |
| 115 | help |
| 116 | Use NAND flash attached to the CAFÉ chip designed for the OLPC |
| 117 | laptop. |
| 118 | |
| 119 | config MTD_NAND_CS553X |
| 120 | tristate "CS5535/CS5536 (AMD Geode companion) NAND controller" |
| 121 | depends on X86_32 |
| 122 | depends on !UML && HAS_IOMEM |
| 123 | help |
| 124 | The CS553x companion chips for the AMD Geode processor |
| 125 | include NAND flash controllers with built-in hardware ECC |
| 126 | capabilities; enabling this option will allow you to use |
| 127 | these. The driver will check the MSRs to verify that the |
| 128 | controller is enabled for NAND, and currently requires that |
| 129 | the controller be in MMIO mode. |
| 130 | |
| 131 | If you say "m", the module will be called cs553x_nand. |
| 132 | |
| 133 | config MTD_NAND_ATMEL |
| 134 | tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller" |
| 135 | depends on ARCH_AT91 || COMPILE_TEST |
| 136 | depends on HAS_IOMEM |
| 137 | select GENERIC_ALLOCATOR |
| 138 | select MFD_ATMEL_SMC |
| 139 | help |
| 140 | Enables support for NAND Flash / Smart Media Card interface |
| 141 | on Atmel AT91 processors. |
| 142 | |
| 143 | config MTD_NAND_ORION |
| 144 | tristate "Marvell Orion NAND controller" |
| 145 | depends on PLAT_ORION |
| 146 | help |
| 147 | This enables the NAND flash controller on Orion machines. |
| 148 | |
| 149 | No board specific support is done by this driver, each board |
| 150 | must advertise a platform_device for the driver to attach. |
| 151 | |
| 152 | config MTD_NAND_MARVELL |
| 153 | tristate "Marvell EBU NAND controller" |
| 154 | depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \ |
| 155 | COMPILE_TEST |
| 156 | depends on HAS_IOMEM |
| 157 | help |
| 158 | This enables the NAND flash controller driver for Marvell boards, |
| 159 | including: |
| 160 | - PXA3xx processors (NFCv1) |
| 161 | - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2) |
| 162 | - 64-bit Aramda platforms (7k, 8k) (NFCv2) |
| 163 | |
| 164 | config MTD_NAND_SLC_LPC32XX |
| 165 | tristate "NXP LPC32xx SLC NAND controller" |
| 166 | depends on ARCH_LPC32XX || COMPILE_TEST |
| 167 | depends on HAS_IOMEM |
| 168 | help |
| 169 | Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell |
| 170 | chips) NAND controller. This is the default for the PHYTEC 3250 |
| 171 | reference board which contains a NAND256R3A2CZA6 chip. |
| 172 | |
| 173 | Please check the actual NAND chip connected and its support |
| 174 | by the SLC NAND controller. |
| 175 | |
| 176 | config MTD_NAND_MLC_LPC32XX |
| 177 | tristate "NXP LPC32xx MLC NAND controller" |
| 178 | depends on ARCH_LPC32XX || COMPILE_TEST |
| 179 | depends on HAS_IOMEM |
| 180 | help |
| 181 | Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND |
| 182 | controller. This is the default for the WORK92105 controller |
| 183 | board. |
| 184 | |
| 185 | Please check the actual NAND chip connected and its support |
| 186 | by the MLC NAND controller. |
| 187 | |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 188 | config MTD_NAND_PASEMI |
| 189 | tristate "PA Semi PWRficient NAND controller" |
| 190 | depends on PPC_PASEMI |
| 191 | help |
| 192 | Enables support for NAND Flash interface on PA Semi PWRficient |
| 193 | based boards |
| 194 | |
| 195 | config MTD_NAND_TMIO |
| 196 | tristate "Toshiba Mobile IO NAND controller" |
| 197 | depends on MFD_TMIO |
| 198 | help |
| 199 | Support for NAND flash connected to a Toshiba Mobile IO |
| 200 | Controller in some PDAs, including the Sharp SL6000x. |
| 201 | |
| 202 | config MTD_NAND_BRCMNAND |
| 203 | tristate "Broadcom STB NAND controller" |
| 204 | depends on ARM || ARM64 || MIPS || COMPILE_TEST |
| 205 | depends on HAS_IOMEM |
| 206 | help |
| 207 | Enables the Broadcom NAND controller driver. The controller was |
| 208 | originally designed for Set-Top Box but is used on various BCM7xxx, |
| 209 | BCM3xxx, BCM63xxx, iProc/Cygnus and more. |
| 210 | |
| 211 | config MTD_NAND_BCM47XXNFLASH |
| 212 | tristate "BCM4706 BCMA NAND controller" |
| 213 | depends on BCMA_NFLASH |
| 214 | depends on BCMA |
| 215 | help |
| 216 | BCMA bus can have various flash memories attached, they are |
| 217 | registered by bcma as platform devices. This enables driver for |
| 218 | NAND flash memories. For now only BCM4706 is supported. |
| 219 | |
| 220 | config MTD_NAND_OXNAS |
| 221 | tristate "Oxford Semiconductor NAND controller" |
| 222 | depends on ARCH_OXNAS || COMPILE_TEST |
| 223 | depends on HAS_IOMEM |
| 224 | help |
| 225 | This enables the NAND flash controller on Oxford Semiconductor SoCs. |
| 226 | |
| 227 | config MTD_NAND_MPC5121_NFC |
| 228 | tristate "MPC5121 NAND controller" |
| 229 | depends on PPC_MPC512x |
| 230 | help |
| 231 | This enables the driver for the NAND flash controller on the |
| 232 | MPC5121 SoC. |
| 233 | |
| 234 | config MTD_NAND_GPMI_NAND |
| 235 | tristate "Freescale GPMI NAND controller" |
| 236 | depends on MXS_DMA |
| 237 | help |
| 238 | Enables NAND Flash support for IMX23, IMX28 or IMX6. |
| 239 | The GPMI controller is very powerful, with the help of BCH |
| 240 | module, it can do the hardware ECC. The GPMI supports several |
| 241 | NAND flashs at the same time. |
| 242 | |
| 243 | config MTD_NAND_FSL_ELBC |
| 244 | tristate "Freescale eLBC NAND controller" |
| 245 | depends on FSL_SOC |
| 246 | select FSL_LBC |
| 247 | help |
| 248 | Various Freescale chips, including the 8313, include a NAND Flash |
| 249 | Controller Module with built-in hardware ECC capabilities. |
| 250 | Enabling this option will enable you to use this to control |
| 251 | external NAND devices. |
| 252 | |
| 253 | config MTD_NAND_FSL_IFC |
| 254 | tristate "Freescale IFC NAND controller" |
| 255 | depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST |
| 256 | depends on HAS_IOMEM |
| 257 | select FSL_IFC |
| 258 | select MEMORY |
| 259 | help |
| 260 | Various Freescale chips e.g P1010, include a NAND Flash machine |
| 261 | with built-in hardware ECC capabilities. |
| 262 | Enabling this option will enable you to use this to control |
| 263 | external NAND devices. |
| 264 | |
| 265 | config MTD_NAND_FSL_UPM |
| 266 | tristate "Freescale UPM NAND controller" |
| 267 | depends on PPC_83xx || PPC_85xx |
| 268 | select FSL_LBC |
| 269 | help |
| 270 | Enables support for NAND Flash chips wired onto Freescale PowerPC |
| 271 | processor localbus with User-Programmable Machine support. |
| 272 | |
| 273 | config MTD_NAND_VF610_NFC |
| 274 | tristate "Freescale VF610/MPC5125 NAND controller" |
| 275 | depends on (SOC_VF610 || COMPILE_TEST) |
| 276 | depends on HAS_IOMEM |
| 277 | help |
| 278 | Enables support for NAND Flash Controller on some Freescale |
| 279 | processors like the VF610, MPC5125, MCF54418 or Kinetis K70. |
| 280 | The driver supports a maximum 2k page size. With 2k pages and |
| 281 | 64 bytes or more of OOB, hardware ECC with up to 32-bit error |
| 282 | correction is supported. Hardware ECC is only enabled through |
| 283 | device tree. |
| 284 | |
| 285 | config MTD_NAND_MXC |
| 286 | tristate "Freescale MXC NAND controller" |
| 287 | depends on ARCH_MXC || COMPILE_TEST |
Fabio Estevam | 0f6b7919 | 2020-11-10 09:19:08 -0300 | [diff] [blame] | 288 | depends on HAS_IOMEM && OF |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 289 | help |
| 290 | This enables the driver for the NAND flash controller on the |
| 291 | MXC processors. |
| 292 | |
| 293 | config MTD_NAND_SH_FLCTL |
| 294 | tristate "Renesas SuperH FLCTL NAND controller" |
| 295 | depends on SUPERH || COMPILE_TEST |
| 296 | depends on HAS_IOMEM |
| 297 | help |
| 298 | Several Renesas SuperH CPU has FLCTL. This option enables support |
| 299 | for NAND Flash using FLCTL. |
| 300 | |
| 301 | config MTD_NAND_DAVINCI |
| 302 | tristate "DaVinci/Keystone NAND controller" |
| 303 | depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) || COMPILE_TEST |
| 304 | depends on HAS_IOMEM |
| 305 | help |
| 306 | Enable the driver for NAND flash chips on Texas Instruments |
| 307 | DaVinci/Keystone processors. |
| 308 | |
| 309 | config MTD_NAND_TXX9NDFMC |
| 310 | tristate "TXx9 NAND controller" |
| 311 | depends on SOC_TX4938 || SOC_TX4939 || COMPILE_TEST |
| 312 | depends on HAS_IOMEM |
| 313 | help |
| 314 | This enables the NAND flash controller on the TXx9 SoCs. |
| 315 | |
| 316 | config MTD_NAND_SOCRATES |
| 317 | tristate "Socrates NAND controller" |
| 318 | depends on SOCRATES |
| 319 | help |
| 320 | Enables support for NAND Flash chips wired onto Socrates board. |
| 321 | |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 322 | source "drivers/mtd/nand/raw/ingenic/Kconfig" |
| 323 | |
| 324 | config MTD_NAND_FSMC |
| 325 | tristate "ST Micros FSMC NAND controller" |
| 326 | depends on OF && HAS_IOMEM |
Arnd Bergmann | ce1380c | 2021-01-18 14:20:44 +0100 | [diff] [blame] | 327 | depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || COMPILE_TEST |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 328 | help |
| 329 | Enables support for NAND Flash chips on the ST Microelectronics |
| 330 | Flexible Static Memory Controller (FSMC) |
| 331 | |
| 332 | config MTD_NAND_XWAY |
| 333 | bool "Lantiq XWAY NAND controller" |
| 334 | depends on LANTIQ && SOC_TYPE_XWAY |
| 335 | help |
| 336 | Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached |
| 337 | to the External Bus Unit (EBU). |
| 338 | |
| 339 | config MTD_NAND_SUNXI |
| 340 | tristate "Allwinner NAND controller" |
| 341 | depends on ARCH_SUNXI || COMPILE_TEST |
| 342 | depends on HAS_IOMEM |
| 343 | help |
| 344 | Enables support for NAND Flash chips on Allwinner SoCs. |
| 345 | |
| 346 | config MTD_NAND_HISI504 |
| 347 | tristate "Hisilicon Hip04 NAND controller" |
| 348 | depends on ARCH_HISI || COMPILE_TEST |
| 349 | depends on HAS_IOMEM |
| 350 | help |
| 351 | Enables support for NAND controller on Hisilicon SoC Hip04. |
| 352 | |
| 353 | config MTD_NAND_QCOM |
| 354 | tristate "QCOM NAND controller" |
| 355 | depends on ARCH_QCOM || COMPILE_TEST |
| 356 | depends on HAS_IOMEM |
| 357 | help |
| 358 | Enables support for NAND flash chips on SoCs containing the EBI2 NAND |
| 359 | controller. This controller is found on IPQ806x SoC. |
| 360 | |
| 361 | config MTD_NAND_MTK |
| 362 | tristate "MTK NAND controller" |
| 363 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 364 | depends on HAS_IOMEM |
| 365 | help |
| 366 | Enables support for NAND controller on MTK SoCs. |
| 367 | This controller is found on mt27xx, mt81xx, mt65xx SoCs. |
| 368 | |
Mason Yang | 738b0ca | 2019-08-19 15:19:08 +0800 | [diff] [blame] | 369 | config MTD_NAND_MXIC |
| 370 | tristate "Macronix raw NAND controller" |
| 371 | depends on HAS_IOMEM || COMPILE_TEST |
| 372 | help |
| 373 | This selects the Macronix raw NAND controller driver. |
| 374 | |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 375 | config MTD_NAND_TEGRA |
| 376 | tristate "NVIDIA Tegra NAND controller" |
| 377 | depends on ARCH_TEGRA || COMPILE_TEST |
| 378 | depends on HAS_IOMEM |
| 379 | help |
| 380 | Enables support for NAND flash controller on NVIDIA Tegra SoC. |
| 381 | The driver has been developed and tested on a Tegra 2 SoC. DMA |
| 382 | support, raw read/write page as well as HW ECC read/write page |
| 383 | is supported. Extra OOB bytes when using HW ECC are currently |
| 384 | not supported. |
| 385 | |
| 386 | config MTD_NAND_STM32_FMC2 |
| 387 | tristate "Support for NAND controller on STM32MP SoCs" |
| 388 | depends on MACH_STM32MP157 || COMPILE_TEST |
Christophe Kerello | fbd9b54 | 2020-06-12 17:22:42 +0200 | [diff] [blame] | 389 | select MFD_SYSCON |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 390 | help |
| 391 | Enables support for NAND Flash chips on SoCs containing the FMC2 |
| 392 | NAND controller. This controller is found on STM32MP SoCs. |
| 393 | The controller supports a maximum 8k page size and supports |
| 394 | a maximum 8-bit correction error per sector of 512 bytes. |
| 395 | |
| 396 | config MTD_NAND_MESON |
| 397 | tristate "Support for NAND controller on Amlogic's Meson SoCs" |
| 398 | depends on ARCH_MESON || COMPILE_TEST |
| 399 | select MFD_SYSCON |
| 400 | help |
| 401 | Enables support for NAND controller on Amlogic's Meson SoCs. |
| 402 | This controller is found on Meson SoCs. |
| 403 | |
| 404 | config MTD_NAND_GPIO |
| 405 | tristate "GPIO assisted NAND controller" |
| 406 | depends on GPIOLIB || COMPILE_TEST |
| 407 | depends on HAS_IOMEM |
| 408 | help |
| 409 | This enables a NAND flash driver where control signals are |
| 410 | connected to GPIO pins, and commands and data are communicated |
| 411 | via a memory mapped interface. |
| 412 | |
| 413 | config MTD_NAND_PLATFORM |
| 414 | tristate "Generic NAND controller" |
| 415 | depends on HAS_IOMEM |
| 416 | help |
| 417 | This implements a generic NAND driver for on-SOC platform |
| 418 | devices. You will need to provide platform-specific functions |
| 419 | via platform_data. |
| 420 | |
Piotr Sroka | ec4ba01 | 2019-09-26 09:11:36 +0100 | [diff] [blame] | 421 | config MTD_NAND_CADENCE |
| 422 | tristate "Support Cadence NAND (HPNFC) controller" |
Brendan Higgins | baebaa2 | 2019-12-11 11:27:37 -0800 | [diff] [blame] | 423 | depends on (OF || COMPILE_TEST) && HAS_IOMEM |
Piotr Sroka | ec4ba01 | 2019-09-26 09:11:36 +0100 | [diff] [blame] | 424 | help |
| 425 | Enable the driver for NAND flash on platforms using a Cadence NAND |
| 426 | controller. |
| 427 | |
Miquel Raynal | 197b88f | 2020-05-19 09:45:48 +0200 | [diff] [blame] | 428 | config MTD_NAND_ARASAN |
| 429 | tristate "Support for Arasan NAND flash controller" |
| 430 | depends on HAS_IOMEM && HAS_DMA |
Miquel Raynal | 88ffef1 | 2020-05-19 09:45:49 +0200 | [diff] [blame] | 431 | select BCH |
Miquel Raynal | 197b88f | 2020-05-19 09:45:48 +0200 | [diff] [blame] | 432 | help |
| 433 | Enables the driver for the Arasan NAND flash controller on |
| 434 | Zynq Ultrascale+ MPSoC. |
| 435 | |
Ramuthevar Vadivel Murugan | 0b1039f | 2020-11-10 09:23:33 +0800 | [diff] [blame] | 436 | config MTD_NAND_INTEL_LGM |
| 437 | tristate "Support for NAND controller on Intel LGM SoC" |
| 438 | depends on OF || COMPILE_TEST |
| 439 | depends on HAS_IOMEM |
| 440 | help |
| 441 | Enables support for NAND Flash chips on Intel's LGM SoC. |
| 442 | NAND flash controller interfaced through the External Bus Unit. |
| 443 | |
Yifeng Zhao | 058e0e8 | 2020-12-10 08:21:32 +0800 | [diff] [blame] | 444 | config MTD_NAND_ROCKCHIP |
| 445 | tristate "Rockchip NAND controller" |
| 446 | depends on ARCH_ROCKCHIP && HAS_IOMEM |
| 447 | help |
| 448 | Enables support for NAND controller on Rockchip SoCs. |
| 449 | There are four different versions of NAND FLASH Controllers, |
| 450 | including: |
| 451 | NFC v600: RK2928, RK3066, RK3188 |
| 452 | NFC v622: RK3036, RK3128 |
| 453 | NFC v800: RK3308, RV1108 |
| 454 | NFC v900: PX30, RK3326 |
| 455 | |
Miquel Raynal | 08d8c62 | 2021-06-10 10:20:40 +0200 | [diff] [blame] | 456 | config MTD_NAND_PL35X |
| 457 | tristate "ARM PL35X NAND controller" |
| 458 | depends on OF || COMPILE_TEST |
| 459 | depends on PL353_SMC |
| 460 | help |
| 461 | Enables support for PrimeCell SMC PL351 and PL353 NAND |
| 462 | controller found on Zynq7000. |
| 463 | |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 464 | comment "Misc" |
| 465 | |
| 466 | config MTD_SM_COMMON |
| 467 | tristate |
| 468 | default n |
| 469 | |
| 470 | config MTD_NAND_NANDSIM |
| 471 | tristate "Support for NAND Flash Simulator" |
| 472 | help |
| 473 | The simulator may simulate various NAND flash chips for the |
| 474 | MTD nand layer. |
| 475 | |
| 476 | config MTD_NAND_RICOH |
| 477 | tristate "Ricoh xD card reader" |
| 478 | default n |
| 479 | depends on PCI |
| 480 | select MTD_SM_COMMON |
| 481 | help |
| 482 | Enable support for Ricoh R5C852 xD card reader |
Colin Ian King | c5b9ee9 | 2021-07-04 10:47:05 +0100 | [diff] [blame] | 483 | You also need to enable either |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 484 | NAND SSFDC (SmartMedia) read only translation layer' or new |
Colin Ian King | c5b9ee9 | 2021-07-04 10:47:05 +0100 | [diff] [blame] | 485 | experimental, readwrite |
Miquel Raynal | e787be1 | 2019-02-06 16:29:14 +0100 | [diff] [blame] | 486 | 'SmartMedia/xD new translation layer' |
| 487 | |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 488 | config MTD_NAND_DISKONCHIP |
| 489 | tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)" |
| 490 | depends on HAS_IOMEM |
| 491 | select REED_SOLOMON |
| 492 | select REED_SOLOMON_DEC16 |
| 493 | help |
| 494 | This is a reimplementation of M-Systems DiskOnChip 2000, |
| 495 | Millennium and Millennium Plus as a standard NAND device driver, |
| 496 | as opposed to the earlier self-contained MTD device drivers. |
| 497 | This should enable, among other things, proper JFFS2 operation on |
| 498 | these devices. |
| 499 | |
| 500 | config MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
Miquel Raynal | d369181 | 2018-07-18 09:04:12 +0200 | [diff] [blame] | 501 | bool "Advanced detection options for DiskOnChip" |
| 502 | depends on MTD_NAND_DISKONCHIP |
| 503 | help |
| 504 | This option allows you to specify nonstandard address at which to |
| 505 | probe for a DiskOnChip, or to change the detection options. You |
| 506 | are unlikely to need any of this unless you are using LinuxBIOS. |
| 507 | Say 'N'. |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 508 | |
| 509 | config MTD_NAND_DISKONCHIP_PROBE_ADDRESS |
Miquel Raynal | d369181 | 2018-07-18 09:04:12 +0200 | [diff] [blame] | 510 | hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 511 | depends on MTD_NAND_DISKONCHIP |
| 512 | default "0" |
| 513 | help |
| 514 | By default, the probe for DiskOnChip devices will look for a |
| 515 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. |
| 516 | This option allows you to specify a single address at which to probe |
| 517 | for the device, which is useful if you have other devices in that |
| 518 | range which get upset when they are probed. |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 519 | |
Miquel Raynal | d369181 | 2018-07-18 09:04:12 +0200 | [diff] [blame] | 520 | (Note that on PowerPC, the normal probe will only check at |
| 521 | 0xE4000000.) |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 522 | |
Miquel Raynal | d369181 | 2018-07-18 09:04:12 +0200 | [diff] [blame] | 523 | Normally, you should leave this set to zero, to allow the probe at |
| 524 | the normal addresses. |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 525 | |
| 526 | config MTD_NAND_DISKONCHIP_PROBE_HIGH |
Miquel Raynal | d369181 | 2018-07-18 09:04:12 +0200 | [diff] [blame] | 527 | bool "Probe high addresses" |
| 528 | depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 529 | help |
| 530 | By default, the probe for DiskOnChip devices will look for a |
| 531 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. |
| 532 | This option changes to make it probe between 0xFFFC8000 and |
| 533 | 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be |
| 534 | useful to you. Say 'N'. |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 535 | |
| 536 | config MTD_NAND_DISKONCHIP_BBTWRITE |
| 537 | bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP" |
| 538 | depends on MTD_NAND_DISKONCHIP |
| 539 | help |
| 540 | On DiskOnChip devices shipped with the INFTL filesystem (Millennium |
| 541 | and 2000 TSOP/Alon), Linux reserves some space at the end of the |
| 542 | device for the Bad Block Table (BBT). If you have existing INFTL |
| 543 | data on your device (created by non-Linux tools such as M-Systems' |
| 544 | DOS drivers), your data might overlap the area Linux wants to use for |
| 545 | the BBT. If this is a concern for you, leave this option disabled and |
| 546 | Linux will not write BBT data into this area. |
| 547 | The downside of leaving this option disabled is that if bad blocks |
| 548 | are detected by Linux, they will not be recorded in the BBT, which |
| 549 | could cause future problems. |
| 550 | Once you enable this option, new filesystems (INFTL or others, created |
| 551 | in Linux or other operating systems) will not use the reserved area. |
| 552 | The only reason not to enable this option is to prevent damage to |
| 553 | preexisting filesystems. |
| 554 | Even if you leave this disabled, you can enable BBT writes at module |
| 555 | load time (assuming you build diskonchip as a module) with the module |
| 556 | parameter "inftl_bbt_write=1". |
| 557 | |
Miquel Raynal | 72c5af0 | 2019-02-06 16:47:44 +0100 | [diff] [blame] | 558 | endif # MTD_RAW_NAND |