blob: 18b7b91386072d1af349c41124ddf05bdd04a79c [file] [log] [blame]
Erik Schmauss95857632018-03-14 16:13:07 -07001/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
Bob Moorea8357b02010-01-22 19:07:36 +08002/******************************************************************************
3 *
Bob Moore5cf4d732011-03-18 09:49:41 +08004 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
Bob Moorea8357b02010-01-22 19:07:36 +08005 *
Bob Moore4441e552021-01-15 10:48:25 -08006 * Copyright (C) 2000 - 2021, Intel Corp.
Bob Moorea8357b02010-01-22 19:07:36 +08007 *
Erik Schmauss95857632018-03-14 16:13:07 -07008 *****************************************************************************/
Bob Moorea8357b02010-01-22 19:07:36 +08009
Bob Mooreb24aad42009-07-24 13:30:17 +080010#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
Bob Mooreb24aad42009-07-24 13:30:17 +080020 ******************************************************************************/
21
22/*
Bob Moore6e2d5eb2009-07-27 10:53:00 +080023 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
Bob Mooreb24aad42009-07-24 13:30:17 +080026 */
Bob Moore9401eaf2021-06-04 14:26:03 -070027#define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
Lv Zheng874f6a72015-05-21 10:31:30 +080028#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
Bob Moore6e2d5eb2009-07-27 10:53:00 +080029#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
Bob Moored36d4e32014-04-30 10:04:06 +080030#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
Erik Schmausse62f8222018-02-15 13:09:26 -080031#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
Bob Mooreb24aad42009-07-24 13:30:17 +080032#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
Bob Moore0e264f02010-03-03 16:30:35 +080033#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
Erik Schmausse62f8222018-02-15 13:09:26 -080034#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
35#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
Bob Moore5132f2f2015-04-13 11:51:08 +080036#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
Erik Schmausse62f8222018-02-15 13:09:26 -080037#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
Bob Moorea805aab2021-10-01 20:16:25 +020038#define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
Erik Schmausse62f8222018-02-15 13:09:26 -080039#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
40#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
Erik Kaneda9f400332021-04-06 14:30:23 -070041#define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
Erik Schmausse62f8222018-02-15 13:09:26 -080042#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
43#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
Erik Kanedad71df852021-06-04 14:26:06 -070044#define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
Erik Schmausse62f8222018-02-15 13:09:26 -080045#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
Bob Moore536e35c2021-06-04 14:26:00 -070046#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
Erik Schmausse62f8222018-02-15 13:09:26 -080047#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
James Morse3bd38462017-08-03 14:26:25 +080048#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
Erik Schmausse62f8222018-02-15 13:09:26 -080049#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
Kuppuswamy Sathyanarayanan8288f692021-06-04 14:25:56 -070050#define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
Bob Moore2de6bb92021-12-22 17:36:30 +010051#define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */
Bob Moore4461cf52010-05-31 09:22:12 +080052
Bob Mooreb24aad42009-07-24 13:30:17 +080053/*
54 * All tables must be byte-packed to match the ACPI specification, since
55 * the tables are provided by the system BIOS.
56 */
57#pragma pack(1)
58
59/*
Bob Moorebe030a52012-08-17 13:07:54 +080060 * Note: C bitfields are not used for this reason:
61 *
62 * "Bitfields are great and easy to read, but unfortunately the C language
63 * does not specify the layout of bitfields in memory, which means they are
64 * essentially useless for dealing with packed data in on-disk formats or
65 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
66 * this decision was a design error in C. Ritchie could have picked an order
67 * and stuck with it." Norman Ramsey.
68 * See http://stackoverflow.com/a/1053662/41661
Bob Mooreb24aad42009-07-24 13:30:17 +080069 */
70
71/*******************************************************************************
72 *
Bob Mooree692fa12021-08-03 20:07:53 +020073 * AEST - Arm Error Source Table
74 *
75 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document
76 * September 2020.
77 *
78 ******************************************************************************/
79
80struct acpi_table_aest {
81 struct acpi_table_header header;
82 void *node_array[];
83};
84
85/* Common Subtable header - one per Node Structure (Subtable) */
86
87struct acpi_aest_hdr {
88 u8 type;
89 u16 length;
90 u8 reserved;
91 u32 node_specific_offset;
92 u32 node_interface_offset;
93 u32 node_interrupt_offset;
94 u32 node_interrupt_count;
95 u64 timestamp_rate;
96 u64 reserved1;
97 u64 error_injection_rate;
98};
99
100/* Values for Type above */
101
102#define ACPI_AEST_PROCESSOR_ERROR_NODE 0
103#define ACPI_AEST_MEMORY_ERROR_NODE 1
104#define ACPI_AEST_SMMU_ERROR_NODE 2
105#define ACPI_AEST_VENDOR_ERROR_NODE 3
106#define ACPI_AEST_GIC_ERROR_NODE 4
107#define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */
108
109/*
110 * AEST subtables (Error nodes)
111 */
112
113/* 0: Processor Error */
114
115typedef struct acpi_aest_processor {
116 u32 processor_id;
117 u8 resource_type;
118 u8 reserved;
119 u8 flags;
120 u8 revision;
121 u64 processor_affinity;
122
123} acpi_aest_processor;
124
125/* Values for resource_type above, related structs below */
126
127#define ACPI_AEST_CACHE_RESOURCE 0
128#define ACPI_AEST_TLB_RESOURCE 1
129#define ACPI_AEST_GENERIC_RESOURCE 2
130#define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
131
132/* 0R: Processor Cache Resource Substructure */
133
134typedef struct acpi_aest_processor_cache {
135 u32 cache_reference;
136 u32 reserved;
137
138} acpi_aest_processor_cache;
139
140/* Values for cache_type above */
141
142#define ACPI_AEST_CACHE_DATA 0
143#define ACPI_AEST_CACHE_INSTRUCTION 1
144#define ACPI_AEST_CACHE_UNIFIED 2
145#define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
146
147/* 1R: Processor TLB Resource Substructure */
148
149typedef struct acpi_aest_processor_tlb {
150 u32 tlb_level;
151 u32 reserved;
152
153} acpi_aest_processor_tlb;
154
155/* 2R: Processor Generic Resource Substructure */
156
157typedef struct acpi_aest_processor_generic {
Shuuichirou Ishii00395b72021-12-22 17:28:34 +0100158 u32 resource;
Bob Mooree692fa12021-08-03 20:07:53 +0200159
160} acpi_aest_processor_generic;
161
162/* 1: Memory Error */
163
164typedef struct acpi_aest_memory {
165 u32 srat_proximity_domain;
166
167} acpi_aest_memory;
168
169/* 2: Smmu Error */
170
171typedef struct acpi_aest_smmu {
172 u32 iort_node_reference;
173 u32 subcomponent_reference;
174
175} acpi_aest_smmu;
176
177/* 3: Vendor Defined */
178
179typedef struct acpi_aest_vendor {
180 u32 acpi_hid;
181 u32 acpi_uid;
182 u8 vendor_specific_data[16];
183
184} acpi_aest_vendor;
185
186/* 4: Gic Error */
187
188typedef struct acpi_aest_gic {
189 u32 interface_type;
190 u32 instance_id;
191
192} acpi_aest_gic;
193
194/* Values for interface_type above */
195
196#define ACPI_AEST_GIC_CPU 0
197#define ACPI_AEST_GIC_DISTRIBUTOR 1
198#define ACPI_AEST_GIC_REDISTRIBUTOR 2
199#define ACPI_AEST_GIC_ITS 3
200#define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
201
202/* Node Interface Structure */
203
204typedef struct acpi_aest_node_interface {
205 u8 type;
206 u8 reserved[3];
207 u32 flags;
208 u64 address;
209 u32 error_record_index;
210 u32 error_record_count;
211 u64 error_record_implemented;
212 u64 error_status_reporting;
213 u64 addressing_mode;
214
215} acpi_aest_node_interface;
216
217/* Values for Type field above */
218
219#define ACPI_AEST_NODE_SYSTEM_REGISTER 0
220#define ACPI_AEST_NODE_MEMORY_MAPPED 1
221#define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */
222
223/* Node Interrupt Structure */
224
225typedef struct acpi_aest_node_interrupt {
226 u8 type;
227 u8 reserved[2];
228 u8 flags;
229 u32 gsiv;
230 u8 iort_id;
231 u8 reserved1[3];
232
233} acpi_aest_node_interrupt;
234
235/* Values for Type field above */
236
237#define ACPI_AEST_NODE_FAULT_HANDLING 0
238#define ACPI_AEST_NODE_ERROR_RECOVERY 1
239#define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
240
241/*******************************************************************************
242 *
Bob Moore9401eaf2021-06-04 14:26:03 -0700243 * BDAT - BIOS Data ACPI Table
244 *
245 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
246 * Nov 2020
247 *
248 ******************************************************************************/
249
250struct acpi_table_bdat {
251 struct acpi_table_header header;
252 struct acpi_generic_address gas;
253};
254
255/*******************************************************************************
256 *
Lv Zheng874f6a72015-05-21 10:31:30 +0800257 * IORT - IO Remapping Table
258 *
259 * Conforms to "IO Remapping Table System Software on ARM Platforms",
Shameer Kolothum8e1fdd72021-04-06 14:30:27 -0700260 * Document number: ARM DEN 0049E.b, Feb 2021
Lv Zheng874f6a72015-05-21 10:31:30 +0800261 *
262 ******************************************************************************/
263
264struct acpi_table_iort {
265 struct acpi_table_header header;
266 u32 node_count;
267 u32 node_offset;
268 u32 reserved;
269};
270
271/*
272 * IORT subtables
273 */
274struct acpi_iort_node {
275 u8 type;
276 u16 length;
277 u8 revision;
Shameer Kolothum8e1fdd72021-04-06 14:30:27 -0700278 u32 identifier;
Lv Zheng874f6a72015-05-21 10:31:30 +0800279 u32 mapping_count;
280 u32 mapping_offset;
281 char node_data[1];
282};
283
284/* Values for subtable Type above */
285
286enum acpi_iort_node_type {
287 ACPI_IORT_NODE_ITS_GROUP = 0x00,
288 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
289 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
Al Stone4ac78ba2016-03-24 09:39:07 +0800290 ACPI_IORT_NODE_SMMU = 0x03,
Robin Murphya53eaef2018-06-01 12:06:39 -0700291 ACPI_IORT_NODE_SMMU_V3 = 0x04,
Shameer Kolothum8e1fdd72021-04-06 14:30:27 -0700292 ACPI_IORT_NODE_PMCG = 0x05,
293 ACPI_IORT_NODE_RMR = 0x06,
Lv Zheng874f6a72015-05-21 10:31:30 +0800294};
295
296struct acpi_iort_id_mapping {
297 u32 input_base; /* Lowest value in input range */
298 u32 id_count; /* Number of IDs */
299 u32 output_base; /* Lowest value in output range */
300 u32 output_reference; /* A reference to the output node */
301 u32 flags;
302};
303
304/* Masks for Flags field above for IORT subtable */
305
306#define ACPI_IORT_ID_SINGLE_MAPPING (1)
307
308struct acpi_iort_memory_access {
309 u32 cache_coherency;
310 u8 hints;
311 u16 reserved;
312 u8 memory_flags;
313};
314
315/* Values for cache_coherency field above */
316
317#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
318#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
319
320/* Masks for Hints field above */
321
322#define ACPI_IORT_HT_TRANSIENT (1)
323#define ACPI_IORT_HT_WRITE (1<<1)
324#define ACPI_IORT_HT_READ (1<<2)
325#define ACPI_IORT_HT_OVERRIDE (1<<3)
326
327/* Masks for memory_flags field above */
328
329#define ACPI_IORT_MF_COHERENCY (1)
330#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
331
332/*
333 * IORT node specific subtables
334 */
335struct acpi_iort_its_group {
336 u32 its_count;
Erik Schmaussc163f90c2019-02-15 13:36:19 -0800337 u32 identifiers[1]; /* GIC ITS identifier array */
Lv Zheng874f6a72015-05-21 10:31:30 +0800338};
339
340struct acpi_iort_named_component {
341 u32 node_flags;
342 u64 memory_properties; /* Memory access properties */
343 u8 memory_address_limit; /* Memory address size limit */
344 char device_name[1]; /* Path of namespace object */
345};
346
Robin Murphyd87be042018-06-01 12:06:38 -0700347/* Masks for Flags field above */
348
349#define ACPI_IORT_NC_STALL_SUPPORTED (1)
350#define ACPI_IORT_NC_PASID_BITS (31<<1)
351
Lv Zheng874f6a72015-05-21 10:31:30 +0800352struct acpi_iort_root_complex {
353 u64 memory_properties; /* Memory access properties */
354 u32 ats_attribute;
355 u32 pci_segment_number;
Robin Murphyd87be042018-06-01 12:06:38 -0700356 u8 memory_address_limit; /* Memory address size limit */
357 u8 reserved[3]; /* Reserved, must be zero */
Lv Zheng874f6a72015-05-21 10:31:30 +0800358};
359
Shameer Kolothum8e1fdd72021-04-06 14:30:27 -0700360/* Masks for ats_attribute field above */
Lv Zheng874f6a72015-05-21 10:31:30 +0800361
Shameer Kolothum8e1fdd72021-04-06 14:30:27 -0700362#define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
363#define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
364#define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
Lv Zheng874f6a72015-05-21 10:31:30 +0800365
366struct acpi_iort_smmu {
367 u64 base_address; /* SMMU base address */
368 u64 span; /* Length of memory range */
369 u32 model;
370 u32 flags;
371 u32 global_interrupt_offset;
372 u32 context_interrupt_count;
373 u32 context_interrupt_offset;
374 u32 pmu_interrupt_count;
375 u32 pmu_interrupt_offset;
376 u64 interrupts[1]; /* Interrupt array */
377};
378
379/* Values for Model field above */
380
381#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
382#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
383#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
384#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
Robin Murphy0c2021c2017-07-10 15:22:51 +0800385#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
386#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
Lv Zheng874f6a72015-05-21 10:31:30 +0800387
388/* Masks for Flags field above */
389
390#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
391#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
392
Lv Zhengbb1e23e2017-04-26 16:18:49 +0800393/* Global interrupt format */
394
395struct acpi_iort_smmu_gsi {
396 u32 nsg_irpt;
397 u32 nsg_irpt_flags;
398 u32 nsg_cfg_irpt;
399 u32 nsg_cfg_irpt_flags;
400};
401
Al Stone4ac78ba2016-03-24 09:39:07 +0800402struct acpi_iort_smmu_v3 {
403 u64 base_address; /* SMMUv3 base address */
404 u32 flags;
405 u32 reserved;
406 u64 vatos_address;
Robin Murphy0c2021c2017-07-10 15:22:51 +0800407 u32 model;
Al Stone4ac78ba2016-03-24 09:39:07 +0800408 u32 event_gsiv;
409 u32 pri_gsiv;
410 u32 gerr_gsiv;
411 u32 sync_gsiv;
Robin Murphyd87be042018-06-01 12:06:38 -0700412 u32 pxm;
Hanjun Guo4c106aa2017-11-17 15:42:19 -0800413 u32 id_mapping_index;
Al Stone4ac78ba2016-03-24 09:39:07 +0800414};
415
Robin Murphy0c2021c2017-07-10 15:22:51 +0800416/* Values for Model field above */
417
418#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
419#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
420#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
421
Al Stone4ac78ba2016-03-24 09:39:07 +0800422/* Masks for Flags field above */
423
424#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
Robin Murphyd87be042018-06-01 12:06:38 -0700425#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
Ganapatrao Kulkarnic9442302017-07-10 15:24:15 +0800426#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
Al Stone4ac78ba2016-03-24 09:39:07 +0800427
Robin Murphya53eaef2018-06-01 12:06:39 -0700428struct acpi_iort_pmcg {
429 u64 page0_base_address;
430 u32 overflow_gsiv;
431 u32 node_reference;
432 u64 page1_base_address;
433};
434
Shameer Kolothum8e1fdd72021-04-06 14:30:27 -0700435struct acpi_iort_rmr {
436 u32 flags;
437 u32 rmr_count;
438 u32 rmr_offset;
439};
440
441struct acpi_iort_rmr_desc {
442 u64 base_address;
443 u64 length;
444 u32 reserved;
445};
446
Lv Zheng874f6a72015-05-21 10:31:30 +0800447/*******************************************************************************
448 *
Bob Moore6e2d5eb2009-07-27 10:53:00 +0800449 * IVRS - I/O Virtualization Reporting Structure
450 * Version 1
451 *
452 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
453 * Revision 1.26, February 2009.
454 *
455 ******************************************************************************/
456
457struct acpi_table_ivrs {
458 struct acpi_table_header header; /* Common ACPI table header */
459 u32 info; /* Common virtualization info */
460 u64 reserved;
461};
462
463/* Values for Info field above */
464
465#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
466#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
467#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
468
469/* IVRS subtable header */
470
471struct acpi_ivrs_header {
472 u8 type; /* Subtable type */
473 u8 flags;
474 u16 length; /* Subtable length */
475 u16 device_id; /* ID of IOMMU */
476};
477
478/* Values for subtable Type above */
479
480enum acpi_ivrs_type {
Michał Żygowski1f6239c2020-03-27 15:21:02 -0700481 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
482 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
Alexander Monakov7ce7a442021-04-06 14:30:07 -0700483 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
Bob Moore6e2d5eb2009-07-27 10:53:00 +0800484 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
485 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
486 ACPI_IVRS_TYPE_MEMORY3 = 0x22
487};
488
489/* Masks for Flags field above for IVHD subtable */
490
491#define ACPI_IVHD_TT_ENABLE (1)
492#define ACPI_IVHD_PASS_PW (1<<1)
493#define ACPI_IVHD_RES_PASS_PW (1<<2)
494#define ACPI_IVHD_ISOC (1<<3)
495#define ACPI_IVHD_IOTLB (1<<4)
496
497/* Masks for Flags field above for IVMD subtable */
498
499#define ACPI_IVMD_UNITY (1)
500#define ACPI_IVMD_READ (1<<1)
501#define ACPI_IVMD_WRITE (1<<2)
502#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
503
504/*
505 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
506 */
507
508/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
509
Michał Żygowski1f6239c2020-03-27 15:21:02 -0700510struct acpi_ivrs_hardware_10 {
Bob Moore6e2d5eb2009-07-27 10:53:00 +0800511 struct acpi_ivrs_header header;
512 u16 capability_offset; /* Offset for IOMMU control fields */
513 u64 base_address; /* IOMMU control registers */
514 u16 pci_segment_group;
515 u16 info; /* MSI number and unit ID */
Michał Żygowski0dc7e792020-03-27 15:21:03 -0700516 u32 feature_reporting;
Bob Moore6e2d5eb2009-07-27 10:53:00 +0800517};
518
Michał Żygowski1f6239c2020-03-27 15:21:02 -0700519/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
520
521struct acpi_ivrs_hardware_11 {
522 struct acpi_ivrs_header header;
523 u16 capability_offset; /* Offset for IOMMU control fields */
524 u64 base_address; /* IOMMU control registers */
525 u16 pci_segment_group;
526 u16 info; /* MSI number and unit ID */
527 u32 attributes;
528 u64 efr_register_image;
529 u64 reserved;
530};
531
Bob Moore6e2d5eb2009-07-27 10:53:00 +0800532/* Masks for Info field above */
533
534#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
Bob Mooreba494be2012-07-12 09:40:10 +0800535#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
Bob Moore6e2d5eb2009-07-27 10:53:00 +0800536
537/*
538 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
539 * Upper two bits of the Type field are the (encoded) length of the structure.
540 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
541 * are reserved for future use but not defined.
542 */
543struct acpi_ivrs_de_header {
544 u8 type;
545 u16 id;
546 u8 data_setting;
547};
548
549/* Length of device entry is in the top two bits of Type field above */
550
551#define ACPI_IVHD_ENTRY_LENGTH 0xC0
552
553/* Values for device entry Type field above */
554
555enum acpi_ivrs_device_entry_type {
556 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
557
558 ACPI_IVRS_TYPE_PAD4 = 0,
559 ACPI_IVRS_TYPE_ALL = 1,
560 ACPI_IVRS_TYPE_SELECT = 2,
561 ACPI_IVRS_TYPE_START = 3,
562 ACPI_IVRS_TYPE_END = 4,
563
564 /* 8-byte device entries */
565
566 ACPI_IVRS_TYPE_PAD8 = 64,
567 ACPI_IVRS_TYPE_NOT_USED = 65,
568 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
569 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
570 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
571 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
Alexander Monakov7ce7a442021-04-06 14:30:07 -0700572 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
573
574 /* Variable-length device entries */
575
576 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
Bob Moore6e2d5eb2009-07-27 10:53:00 +0800577};
578
579/* Values for Data field above */
580
581#define ACPI_IVHD_INIT_PASS (1)
582#define ACPI_IVHD_EINT_PASS (1<<1)
583#define ACPI_IVHD_NMI_PASS (1<<2)
584#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
585#define ACPI_IVHD_LINT0_PASS (1<<6)
586#define ACPI_IVHD_LINT1_PASS (1<<7)
587
588/* Types 0-4: 4-byte device entry */
589
590struct acpi_ivrs_device4 {
591 struct acpi_ivrs_de_header header;
592};
593
594/* Types 66-67: 8-byte device entry */
595
596struct acpi_ivrs_device8a {
597 struct acpi_ivrs_de_header header;
598 u8 reserved1;
599 u16 used_id;
600 u8 reserved2;
601};
602
603/* Types 70-71: 8-byte device entry */
604
605struct acpi_ivrs_device8b {
606 struct acpi_ivrs_de_header header;
607 u32 extended_data;
608};
609
610/* Values for extended_data above */
611
612#define ACPI_IVHD_ATS_DISABLED (1<<31)
613
614/* Type 72: 8-byte device entry */
615
616struct acpi_ivrs_device8c {
617 struct acpi_ivrs_de_header header;
618 u8 handle;
619 u16 used_id;
620 u8 variety;
621};
622
623/* Values for Variety field above */
624
625#define ACPI_IVHD_IOAPIC 1
626#define ACPI_IVHD_HPET 2
627
Alexander Monakov7ce7a442021-04-06 14:30:07 -0700628/* Type 240: variable-length device entry */
629
630struct acpi_ivrs_device_hid {
631 struct acpi_ivrs_de_header header;
632 u64 acpi_hid;
633 u64 acpi_cid;
634 u8 uid_type;
635 u8 uid_length;
636};
637
Bob Moorec160b7d22021-06-04 14:25:58 -0700638/* Values for uid_type above */
639
640#define ACPI_IVRS_UID_NOT_PRESENT 0
641#define ACPI_IVRS_UID_IS_INTEGER 1
642#define ACPI_IVRS_UID_IS_STRING 2
643
Bob Moore6e2d5eb2009-07-27 10:53:00 +0800644/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
645
646struct acpi_ivrs_memory {
647 struct acpi_ivrs_header header;
648 u16 aux_data;
649 u64 reserved;
650 u64 start_address;
651 u64 memory_length;
652};
653
654/*******************************************************************************
655 *
Bob Moored36d4e32014-04-30 10:04:06 +0800656 * LPIT - Low Power Idle Table
657 *
Bob Moore9ab8cf12015-05-21 10:30:59 +0800658 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
Bob Moored36d4e32014-04-30 10:04:06 +0800659 *
660 ******************************************************************************/
661
662struct acpi_table_lpit {
663 struct acpi_table_header header; /* Common ACPI table header */
664};
665
666/* LPIT subtable header */
667
668struct acpi_lpit_header {
669 u32 type; /* Subtable type */
670 u32 length; /* Subtable length */
671 u16 unique_id;
672 u16 reserved;
673 u32 flags;
674};
675
676/* Values for subtable Type above */
677
678enum acpi_lpit_type {
679 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
Bob Moore9ab8cf12015-05-21 10:30:59 +0800680 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
Bob Moored36d4e32014-04-30 10:04:06 +0800681};
682
683/* Masks for Flags field above */
684
685#define ACPI_LPIT_STATE_DISABLED (1)
686#define ACPI_LPIT_NO_COUNTER (1<<1)
687
688/*
689 * LPIT subtables, correspond to Type in struct acpi_lpit_header
690 */
691
692/* 0x00: Native C-state instruction based LPI structure */
693
694struct acpi_lpit_native {
695 struct acpi_lpit_header header;
696 struct acpi_generic_address entry_trigger;
697 u32 residency;
698 u32 latency;
699 struct acpi_generic_address residency_counter;
700 u64 counter_frequency;
701};
702
Bob Moored36d4e32014-04-30 10:04:06 +0800703/*******************************************************************************
704 *
Erik Schmausse62f8222018-02-15 13:09:26 -0800705 * MADT - Multiple APIC Description Table
706 * Version 3
707 *
708 ******************************************************************************/
709
710struct acpi_table_madt {
711 struct acpi_table_header header; /* Common ACPI table header */
712 u32 address; /* Physical address of local APIC */
713 u32 flags;
714};
715
716/* Masks for Flags field above */
717
718#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
719
720/* Values for PCATCompat flag */
721
722#define ACPI_MADT_DUAL_PIC 1
723#define ACPI_MADT_MULTIPLE_APIC 0
724
725/* Values for MADT subtable type in struct acpi_subtable_header */
726
727enum acpi_madt_type {
728 ACPI_MADT_TYPE_LOCAL_APIC = 0,
729 ACPI_MADT_TYPE_IO_APIC = 1,
730 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
731 ACPI_MADT_TYPE_NMI_SOURCE = 3,
732 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
733 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
734 ACPI_MADT_TYPE_IO_SAPIC = 6,
735 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
736 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
737 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
738 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
739 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
740 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
741 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
742 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
743 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
Erik Kaneda9557cb82021-04-06 14:30:11 -0700744 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
745 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */
Erik Schmausse62f8222018-02-15 13:09:26 -0800746};
747
748/*
749 * MADT Subtables, correspond to Type in struct acpi_subtable_header
750 */
751
752/* 0: Processor Local APIC */
753
754struct acpi_madt_local_apic {
755 struct acpi_subtable_header header;
756 u8 processor_id; /* ACPI processor id */
757 u8 id; /* Processor's local APIC id */
758 u32 lapic_flags;
759};
760
761/* 1: IO APIC */
762
763struct acpi_madt_io_apic {
764 struct acpi_subtable_header header;
765 u8 id; /* I/O APIC ID */
766 u8 reserved; /* reserved - must be zero */
767 u32 address; /* APIC physical address */
768 u32 global_irq_base; /* Global system interrupt where INTI lines start */
769};
770
771/* 2: Interrupt Override */
772
773struct acpi_madt_interrupt_override {
774 struct acpi_subtable_header header;
775 u8 bus; /* 0 - ISA */
776 u8 source_irq; /* Interrupt source (IRQ) */
777 u32 global_irq; /* Global system interrupt */
778 u16 inti_flags;
779};
780
781/* 3: NMI Source */
782
783struct acpi_madt_nmi_source {
784 struct acpi_subtable_header header;
785 u16 inti_flags;
786 u32 global_irq; /* Global system interrupt */
787};
788
789/* 4: Local APIC NMI */
790
791struct acpi_madt_local_apic_nmi {
792 struct acpi_subtable_header header;
793 u8 processor_id; /* ACPI processor id */
794 u16 inti_flags;
795 u8 lint; /* LINTn to which NMI is connected */
796};
797
798/* 5: Address Override */
799
800struct acpi_madt_local_apic_override {
801 struct acpi_subtable_header header;
802 u16 reserved; /* Reserved, must be zero */
803 u64 address; /* APIC physical address */
804};
805
806/* 6: I/O Sapic */
807
808struct acpi_madt_io_sapic {
809 struct acpi_subtable_header header;
810 u8 id; /* I/O SAPIC ID */
811 u8 reserved; /* Reserved, must be zero */
812 u32 global_irq_base; /* Global interrupt for SAPIC start */
813 u64 address; /* SAPIC physical address */
814};
815
816/* 7: Local Sapic */
817
818struct acpi_madt_local_sapic {
819 struct acpi_subtable_header header;
820 u8 processor_id; /* ACPI processor id */
821 u8 id; /* SAPIC ID */
822 u8 eid; /* SAPIC EID */
823 u8 reserved[3]; /* Reserved, must be zero */
824 u32 lapic_flags;
825 u32 uid; /* Numeric UID - ACPI 3.0 */
826 char uid_string[1]; /* String UID - ACPI 3.0 */
827};
828
829/* 8: Platform Interrupt Source */
830
831struct acpi_madt_interrupt_source {
832 struct acpi_subtable_header header;
833 u16 inti_flags;
834 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
835 u8 id; /* Processor ID */
836 u8 eid; /* Processor EID */
837 u8 io_sapic_vector; /* Vector value for PMI interrupts */
838 u32 global_irq; /* Global system interrupt */
839 u32 flags; /* Interrupt Source Flags */
840};
841
842/* Masks for Flags field above */
843
844#define ACPI_MADT_CPEI_OVERRIDE (1)
845
846/* 9: Processor Local X2APIC (ACPI 4.0) */
847
848struct acpi_madt_local_x2apic {
849 struct acpi_subtable_header header;
850 u16 reserved; /* reserved - must be zero */
851 u32 local_apic_id; /* Processor x2APIC ID */
852 u32 lapic_flags;
853 u32 uid; /* ACPI processor UID */
854};
855
856/* 10: Local X2APIC NMI (ACPI 4.0) */
857
858struct acpi_madt_local_x2apic_nmi {
859 struct acpi_subtable_header header;
860 u16 inti_flags;
861 u32 uid; /* ACPI processor UID */
862 u8 lint; /* LINTn to which NMI is connected */
863 u8 reserved[3]; /* reserved - must be zero */
864};
865
Erik Schmausse646e0a2019-02-15 13:36:14 -0800866/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
Erik Schmausse62f8222018-02-15 13:09:26 -0800867
868struct acpi_madt_generic_interrupt {
869 struct acpi_subtable_header header;
870 u16 reserved; /* reserved - must be zero */
871 u32 cpu_interface_number;
872 u32 uid;
873 u32 flags;
874 u32 parking_version;
875 u32 performance_interrupt;
876 u64 parked_address;
877 u64 base_address;
878 u64 gicv_base_address;
879 u64 gich_base_address;
880 u32 vgic_interrupt;
881 u64 gicr_base_address;
882 u64 arm_mpidr;
883 u8 efficiency_class;
Erik Schmausse646e0a2019-02-15 13:36:14 -0800884 u8 reserved2[1];
885 u16 spe_interrupt; /* ACPI 6.3 */
Erik Schmausse62f8222018-02-15 13:09:26 -0800886};
887
888/* Masks for Flags field above */
889
890/* ACPI_MADT_ENABLED (1) Processor is usable if set */
891#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
892#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
893
894/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
895
896struct acpi_madt_generic_distributor {
897 struct acpi_subtable_header header;
898 u16 reserved; /* reserved - must be zero */
899 u32 gic_id;
900 u64 base_address;
901 u32 global_irq_base;
902 u8 version;
903 u8 reserved2[3]; /* reserved - must be zero */
904};
905
906/* Values for Version field above */
907
908enum acpi_madt_gic_version {
909 ACPI_MADT_GIC_VERSION_NONE = 0,
910 ACPI_MADT_GIC_VERSION_V1 = 1,
911 ACPI_MADT_GIC_VERSION_V2 = 2,
912 ACPI_MADT_GIC_VERSION_V3 = 3,
913 ACPI_MADT_GIC_VERSION_V4 = 4,
914 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
915};
916
917/* 13: Generic MSI Frame (ACPI 5.1) */
918
919struct acpi_madt_generic_msi_frame {
920 struct acpi_subtable_header header;
921 u16 reserved; /* reserved - must be zero */
922 u32 msi_frame_id;
923 u64 base_address;
924 u32 flags;
925 u16 spi_count;
926 u16 spi_base;
927};
928
929/* Masks for Flags field above */
930
931#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
932
933/* 14: Generic Redistributor (ACPI 5.1) */
934
935struct acpi_madt_generic_redistributor {
936 struct acpi_subtable_header header;
937 u16 reserved; /* reserved - must be zero */
938 u64 base_address;
939 u32 length;
940};
941
942/* 15: Generic Translator (ACPI 6.0) */
943
944struct acpi_madt_generic_translator {
945 struct acpi_subtable_header header;
946 u16 reserved; /* reserved - must be zero */
947 u32 translation_id;
948 u64 base_address;
949 u32 reserved2;
950};
951
Erik Kaneda9557cb82021-04-06 14:30:11 -0700952/* 16: Multiprocessor wakeup (ACPI 6.4) */
953
954struct acpi_madt_multiproc_wakeup {
955 struct acpi_subtable_header header;
956 u16 mailbox_version;
957 u32 reserved; /* reserved - must be zero */
958 u64 base_address;
959};
960
Kuppuswamy Sathyanarayanan42d96e12021-06-04 14:25:55 -0700961#define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
962#define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
963
964struct acpi_madt_multiproc_wakeup_mailbox {
965 u16 command;
966 u16 reserved; /* reserved - must be zero */
967 u32 apic_id;
968 u64 wakeup_vector;
969 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
970 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
971};
972
973#define ACPI_MP_WAKE_COMMAND_WAKEUP 1
974
Erik Schmausse62f8222018-02-15 13:09:26 -0800975/*
976 * Common flags fields for MADT subtables
977 */
978
979/* MADT Local APIC flags */
980
981#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
Mario Limonciello435a8dc2021-09-08 16:41:45 -0500982#define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
Erik Schmausse62f8222018-02-15 13:09:26 -0800983
984/* MADT MPS INTI flags (inti_flags) */
985
986#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
987#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
988
989/* Values for MPS INTI flags */
990
991#define ACPI_MADT_POLARITY_CONFORMS 0
992#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
993#define ACPI_MADT_POLARITY_RESERVED 2
994#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
995
996#define ACPI_MADT_TRIGGER_CONFORMS (0)
997#define ACPI_MADT_TRIGGER_EDGE (1<<2)
998#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
999#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1000
1001/*******************************************************************************
1002 *
Bob Moore1a49b722014-04-30 10:04:28 +08001003 * MCFG - PCI Memory Mapped Configuration table and subtable
Bob Moore6e2d5eb2009-07-27 10:53:00 +08001004 * Version 1
1005 *
1006 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
Bob Mooreb24aad42009-07-24 13:30:17 +08001007 *
1008 ******************************************************************************/
1009
1010struct acpi_table_mcfg {
1011 struct acpi_table_header header; /* Common ACPI table header */
1012 u8 reserved[8];
1013};
1014
1015/* Subtable */
1016
1017struct acpi_mcfg_allocation {
1018 u64 address; /* Base address, processor-relative */
1019 u16 pci_segment; /* PCI segment group number */
1020 u8 start_bus_number; /* Starting PCI Bus number */
1021 u8 end_bus_number; /* Final PCI Bus number */
1022 u32 reserved;
1023};
1024
1025/*******************************************************************************
1026 *
Bob Moore0e264f02010-03-03 16:30:35 +08001027 * MCHI - Management Controller Host Interface Table
1028 * Version 1
1029 *
1030 * Conforms to "Management Component Transport Protocol (MCTP) Host
1031 * Interface Specification", Revision 1.0.0a, October 13, 2009
1032 *
1033 ******************************************************************************/
1034
1035struct acpi_table_mchi {
1036 struct acpi_table_header header; /* Common ACPI table header */
1037 u8 interface_type;
1038 u8 protocol;
1039 u64 protocol_data;
1040 u8 interrupt_type;
1041 u8 gpe;
1042 u8 pci_device_flag;
1043 u32 global_interrupt;
1044 struct acpi_generic_address control_register;
1045 u8 pci_segment;
1046 u8 pci_bus;
1047 u8 pci_device;
1048 u8 pci_function;
1049};
1050
1051/*******************************************************************************
1052 *
Erik Schmausse62f8222018-02-15 13:09:26 -08001053 * MPST - Memory Power State Table (ACPI 5.0)
1054 * Version 1
1055 *
1056 ******************************************************************************/
1057
1058#define ACPI_MPST_CHANNEL_INFO \
1059 u8 channel_id; \
1060 u8 reserved1[3]; \
1061 u16 power_node_count; \
1062 u16 reserved2;
1063
1064/* Main table */
1065
1066struct acpi_table_mpst {
1067 struct acpi_table_header header; /* Common ACPI table header */
1068 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1069};
1070
1071/* Memory Platform Communication Channel Info */
1072
1073struct acpi_mpst_channel {
1074 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1075};
1076
1077/* Memory Power Node Structure */
1078
1079struct acpi_mpst_power_node {
1080 u8 flags;
1081 u8 reserved1;
1082 u16 node_id;
1083 u32 length;
1084 u64 range_address;
1085 u64 range_length;
1086 u32 num_power_states;
1087 u32 num_physical_components;
1088};
1089
1090/* Values for Flags field above */
1091
1092#define ACPI_MPST_ENABLED 1
1093#define ACPI_MPST_POWER_MANAGED 2
1094#define ACPI_MPST_HOT_PLUG_CAPABLE 4
1095
1096/* Memory Power State Structure (follows POWER_NODE above) */
1097
1098struct acpi_mpst_power_state {
1099 u8 power_state;
1100 u8 info_index;
1101};
1102
1103/* Physical Component ID Structure (follows POWER_STATE above) */
1104
1105struct acpi_mpst_component {
1106 u16 component_id;
1107};
1108
1109/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1110
1111struct acpi_mpst_data_hdr {
1112 u16 characteristics_count;
1113 u16 reserved;
1114};
1115
1116struct acpi_mpst_power_data {
1117 u8 structure_id;
1118 u8 flags;
1119 u16 reserved1;
1120 u32 average_power;
1121 u32 power_saving;
1122 u64 exit_latency;
1123 u64 reserved2;
1124};
1125
1126/* Values for Flags field above */
1127
1128#define ACPI_MPST_PRESERVE 1
1129#define ACPI_MPST_AUTOENTRY 2
1130#define ACPI_MPST_AUTOEXIT 4
1131
1132/* Shared Memory Region (not part of an ACPI table) */
1133
1134struct acpi_mpst_shared {
1135 u32 signature;
1136 u16 pcc_command;
1137 u16 pcc_status;
1138 u32 command_register;
1139 u32 status_register;
1140 u32 power_state_id;
1141 u32 power_node_id;
1142 u64 energy_consumed;
1143 u64 average_power;
1144};
1145
1146/*******************************************************************************
1147 *
1148 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1149 * Version 1
1150 *
1151 ******************************************************************************/
1152
1153struct acpi_table_msct {
1154 struct acpi_table_header header; /* Common ACPI table header */
1155 u32 proximity_offset; /* Location of proximity info struct(s) */
1156 u32 max_proximity_domains; /* Max number of proximity domains */
1157 u32 max_clock_domains; /* Max number of clock domains */
1158 u64 max_address; /* Max physical address in system */
1159};
1160
1161/* subtable - Maximum Proximity Domain Information. Version 1 */
1162
1163struct acpi_msct_proximity {
1164 u8 revision;
1165 u8 length;
1166 u32 range_start; /* Start of domain range */
1167 u32 range_end; /* End of domain range */
1168 u32 processor_capacity;
1169 u64 memory_capacity; /* In bytes */
1170};
1171
1172/*******************************************************************************
1173 *
Bob Moore5132f2f2015-04-13 11:51:08 +08001174 * MSDM - Microsoft Data Management table
1175 *
1176 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1177 * November 29, 2011. Copyright 2011 Microsoft
1178 *
1179 ******************************************************************************/
1180
1181/* Basic MSDM table is only the common ACPI header */
1182
1183struct acpi_table_msdm {
1184 struct acpi_table_header header; /* Common ACPI table header */
1185};
1186
1187/*******************************************************************************
1188 *
Erik Schmausse62f8222018-02-15 13:09:26 -08001189 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1190 * Version 1
1191 *
1192 ******************************************************************************/
1193
1194struct acpi_table_nfit {
1195 struct acpi_table_header header; /* Common ACPI table header */
1196 u32 reserved; /* Reserved, must be zero */
1197};
1198
1199/* Subtable header for NFIT */
1200
1201struct acpi_nfit_header {
1202 u16 type;
1203 u16 length;
1204};
1205
1206/* Values for subtable type in struct acpi_nfit_header */
1207
1208enum acpi_nfit_type {
1209 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1210 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1211 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1212 ACPI_NFIT_TYPE_SMBIOS = 3,
1213 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1214 ACPI_NFIT_TYPE_DATA_REGION = 5,
1215 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1216 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1217 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1218};
1219
1220/*
1221 * NFIT Subtables
1222 */
1223
1224/* 0: System Physical Address Range Structure */
1225
1226struct acpi_nfit_system_address {
1227 struct acpi_nfit_header header;
1228 u16 range_index;
1229 u16 flags;
1230 u32 reserved; /* Reserved, must be zero */
1231 u32 proximity_domain;
1232 u8 range_guid[16];
1233 u64 address;
1234 u64 length;
1235 u64 memory_mapping;
Bob Moorecf16b052021-04-06 14:30:15 -07001236 u64 location_cookie; /* ACPI 6.4 */
Erik Schmausse62f8222018-02-15 13:09:26 -08001237};
1238
1239/* Flags */
1240
1241#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1242#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
Bob Moorecf16b052021-04-06 14:30:15 -07001243#define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
Erik Schmausse62f8222018-02-15 13:09:26 -08001244
1245/* Range Type GUIDs appear in the include/acuuid.h file */
1246
1247/* 1: Memory Device to System Address Range Map Structure */
1248
1249struct acpi_nfit_memory_map {
1250 struct acpi_nfit_header header;
1251 u32 device_handle;
1252 u16 physical_id;
1253 u16 region_id;
1254 u16 range_index;
1255 u16 region_index;
1256 u64 region_size;
1257 u64 region_offset;
1258 u64 address;
1259 u16 interleave_index;
1260 u16 interleave_ways;
1261 u16 flags;
1262 u16 reserved; /* Reserved, must be zero */
1263};
1264
1265/* Flags */
1266
1267#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1268#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1269#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1270#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1271#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1272#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1273#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1274
1275/* 2: Interleave Structure */
1276
1277struct acpi_nfit_interleave {
1278 struct acpi_nfit_header header;
1279 u16 interleave_index;
1280 u16 reserved; /* Reserved, must be zero */
1281 u32 line_count;
1282 u32 line_size;
1283 u32 line_offset[1]; /* Variable length */
1284};
1285
1286/* 3: SMBIOS Management Information Structure */
1287
1288struct acpi_nfit_smbios {
1289 struct acpi_nfit_header header;
1290 u32 reserved; /* Reserved, must be zero */
1291 u8 data[1]; /* Variable length */
1292};
1293
1294/* 4: NVDIMM Control Region Structure */
1295
1296struct acpi_nfit_control_region {
1297 struct acpi_nfit_header header;
1298 u16 region_index;
1299 u16 vendor_id;
1300 u16 device_id;
1301 u16 revision_id;
1302 u16 subsystem_vendor_id;
1303 u16 subsystem_device_id;
1304 u16 subsystem_revision_id;
1305 u8 valid_fields;
1306 u8 manufacturing_location;
1307 u16 manufacturing_date;
1308 u8 reserved[2]; /* Reserved, must be zero */
1309 u32 serial_number;
1310 u16 code;
1311 u16 windows;
1312 u64 window_size;
1313 u64 command_offset;
1314 u64 command_size;
1315 u64 status_offset;
1316 u64 status_size;
1317 u16 flags;
1318 u8 reserved1[6]; /* Reserved, must be zero */
1319};
1320
1321/* Flags */
1322
1323#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1324
1325/* valid_fields bits */
1326
1327#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1328
1329/* 5: NVDIMM Block Data Window Region Structure */
1330
1331struct acpi_nfit_data_region {
1332 struct acpi_nfit_header header;
1333 u16 region_index;
1334 u16 windows;
1335 u64 offset;
1336 u64 size;
1337 u64 capacity;
1338 u64 start_address;
1339};
1340
1341/* 6: Flush Hint Address Structure */
1342
1343struct acpi_nfit_flush_address {
1344 struct acpi_nfit_header header;
1345 u32 device_handle;
1346 u16 hint_count;
1347 u8 reserved[6]; /* Reserved, must be zero */
1348 u64 hint_address[1]; /* Variable length */
1349};
1350
1351/* 7: Platform Capabilities Structure */
1352
1353struct acpi_nfit_capabilities {
1354 struct acpi_nfit_header header;
1355 u8 highest_capability;
1356 u8 reserved[3]; /* Reserved, must be zero */
1357 u32 capabilities;
1358 u32 reserved2;
1359};
1360
1361/* Capabilities Flags */
1362
1363#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1364#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1365#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1366
1367/*
1368 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1369 */
1370struct nfit_device_handle {
1371 u32 handle;
1372};
1373
1374/* Device handle construction and extraction macros */
1375
1376#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1377#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1378#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1379#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1380#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1381
1382#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1383#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1384#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1385#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1386#define ACPI_NFIT_NODE_ID_OFFSET 16
1387
1388/* Macro to construct a NFIT/NVDIMM device handle */
1389
1390#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1391 ((dimm) | \
1392 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1393 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1394 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1395 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1396
1397/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1398
1399#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1400 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1401
1402#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1403 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1404
1405#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1406 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1407
1408#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1409 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1410
1411#define ACPI_NFIT_GET_NODE_ID(handle) \
1412 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1413
1414/*******************************************************************************
1415 *
Bob Moorea805aab2021-10-01 20:16:25 +02001416 * NHLT - Non HD Audio Link Table
1417 *
1418 * Conforms to: Intel Smart Sound Technology NHLT Specification
1419 * Version 0.8.1, January 2020.
1420 *
1421 ******************************************************************************/
1422
1423/* Main table */
1424
1425struct acpi_table_nhlt {
1426 struct acpi_table_header header; /* Common ACPI table header */
1427 u8 endpoint_count;
1428};
1429
1430struct acpi_nhlt_endpoint {
1431 u32 descriptor_length;
1432 u8 link_type;
1433 u8 instance_id;
1434 u16 vendor_id;
1435 u16 device_id;
1436 u16 revision_id;
1437 u32 subsystem_id;
1438 u8 device_type;
1439 u8 direction;
1440 u8 virtual_bus_id;
1441};
1442
1443/* Types for link_type field above */
1444
1445#define ACPI_NHLT_RESERVED_HD_AUDIO 0
1446#define ACPI_NHLT_RESERVED_DSP 1
1447#define ACPI_NHLT_PDM 2
1448#define ACPI_NHLT_SSP 3
1449#define ACPI_NHLT_RESERVED_SLIMBUS 4
1450#define ACPI_NHLT_RESERVED_SOUNDWIRE 5
1451#define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */
1452
1453/* All other values above are reserved */
1454
1455/* Values for device_id field above */
1456
1457#define ACPI_NHLT_PDM_DMIC 0xAE20
1458#define ACPI_NHLT_BT_SIDEBAND 0xAE30
1459#define ACPI_NHLT_I2S_TDM_CODECS 0xAE23
1460
1461/* Values for device_type field above */
1462
1463/* SSP Link */
1464
1465#define ACPI_NHLT_LINK_BT_SIDEBAND 0
1466#define ACPI_NHLT_LINK_FM 1
1467#define ACPI_NHLT_LINK_MODEM 2
1468/* 3 is reserved */
1469#define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4
1470
1471/* PDM Link */
1472
1473#define ACPI_NHLT_PDM_ON_CAVS_1P8 0
1474#define ACPI_NHLT_PDM_ON_CAVS_1P5 1
1475
1476/* Values for Direction field above */
1477
1478#define ACPI_NHLT_DIR_RENDER 0
1479#define ACPI_NHLT_DIR_CAPTURE 1
1480#define ACPI_NHLT_DIR_RENDER_LOOPBACK 2
1481#define ACPI_NHLT_DIR_RENDER_FEEDBACK 3
1482#define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */
1483
1484struct acpi_nhlt_device_specific_config {
1485 u32 capabilities_size;
1486 u8 virtual_slot;
1487 u8 config_type;
1488};
1489
1490struct acpi_nhlt_device_specific_config_a {
1491 u32 capabilities_size;
1492 u8 virtual_slot;
1493 u8 config_type;
1494 u8 array_type;
1495};
1496
1497/* Values for Config Type above */
1498
Bob Mooree4a07f52021-12-22 17:25:40 +01001499#define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00
1500#define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01
1501#define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03
1502#define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */
Bob Moorea805aab2021-10-01 20:16:25 +02001503
1504struct acpi_nhlt_device_specific_config_b {
1505 u32 capabilities_size;
1506};
1507
1508struct acpi_nhlt_device_specific_config_c {
1509 u32 capabilities_size;
1510 u8 virtual_slot;
1511};
1512
Bob Mooree4a07f52021-12-22 17:25:40 +01001513struct acpi_nhlt_render_device_specific_config {
1514 u32 capabilities_size;
1515 u8 virtual_slot;
1516};
1517
Bob Moorea805aab2021-10-01 20:16:25 +02001518struct acpi_nhlt_wave_extensible {
1519 u16 format_tag;
1520 u16 channel_count;
1521 u32 samples_per_sec;
1522 u32 avg_bytes_per_sec;
1523 u16 block_align;
1524 u16 bits_per_sample;
1525 u16 extra_format_size;
1526 u16 valid_bits_per_sample;
1527 u32 channel_mask;
1528 u8 sub_format_guid[16];
1529};
1530
1531/* Values for channel_mask above */
1532
1533#define ACPI_NHLT_SPKR_FRONT_LEFT 0x1
1534#define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2
1535#define ACPI_NHLT_SPKR_FRONT_CENTER 0x4
1536#define ACPI_NHLT_SPKR_LOW_FREQ 0x8
1537#define ACPI_NHLT_SPKR_BACK_LEFT 0x10
1538#define ACPI_NHLT_SPKR_BACK_RIGHT 0x20
1539#define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40
1540#define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80
1541#define ACPI_NHLT_SPKR_BACK_CENTER 0x100
1542#define ACPI_NHLT_SPKR_SIDE_LEFT 0x200
1543#define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400
1544#define ACPI_NHLT_SPKR_TOP_CENTER 0x800
1545#define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000
1546#define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000
1547#define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000
1548#define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000
1549#define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000
1550#define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000
1551
1552struct acpi_nhlt_format_config {
1553 struct acpi_nhlt_wave_extensible format;
1554 u32 capability_size;
1555 u8 capabilities[];
1556};
1557
1558struct acpi_nhlt_formats_config {
1559 u8 formats_count;
1560};
1561
1562struct acpi_nhlt_device_specific_hdr {
1563 u8 virtual_slot;
1564 u8 config_type;
1565};
1566
1567/* Types for config_type above */
1568
1569#define ACPI_NHLT_GENERIC 0
1570#define ACPI_NHLT_MIC 1
1571#define ACPI_NHLT_RENDER 3
1572
1573struct acpi_nhlt_mic_device_specific_config {
1574 struct acpi_nhlt_device_specific_hdr device_config;
1575 u8 array_type_ext;
1576};
1577
1578/* Values for array_type_ext above */
1579
Bob Mooree4a07f52021-12-22 17:25:40 +01001580#define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 // 9 and below are reserved
1581#define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A
1582#define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B
1583#define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C
1584#define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D
1585#define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E
1586#define ACPI_NHLT_VENDOR_DEFINED 0x0F
1587#define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F
1588#define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10
Bob Moorea805aab2021-10-01 20:16:25 +02001589
Bob Mooree4a07f52021-12-22 17:25:40 +01001590#define ACPI_NHLT_NO_EXTENSION 0x0
1591#define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4)
1592
1593struct acpi_nhlt_vendor_mic_count {
1594 u8 microphone_count;
1595};
Bob Moorea805aab2021-10-01 20:16:25 +02001596
1597struct acpi_nhlt_vendor_mic_config {
1598 u8 type;
1599 u8 panel;
1600 u16 speaker_position_distance; // mm
1601 u16 horizontal_offset; // mm
1602 u16 vertical_offset; // mm
1603 u8 frequency_low_band; // 5*hz
1604 u8 frequency_high_band; // 500*hz
1605 u16 direction_angle; // -180 - + 180
1606 u16 elevation_angle; // -180 - + 180
1607 u16 work_vertical_angle_begin; // -180 - + 180 with 2 deg step
1608 u16 work_vertical_angle_end; // -180 - + 180 with 2 deg step
1609 u16 work_horizontal_angle_begin; // -180 - + 180 with 2 deg step
1610 u16 work_horizontal_angle_end; // -180 - + 180 with 2 deg step
1611};
1612
1613/* Values for Type field above */
1614
Bob Mooree4a07f52021-12-22 17:25:40 +01001615#define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0
1616#define ACPI_NHLT_MIC_SUBCARDIOID 1
1617#define ACPI_NHLT_MIC_CARDIOID 2
1618#define ACPI_NHLT_MIC_SUPER_CARDIOID 3
1619#define ACPI_NHLT_MIC_HYPER_CARDIOID 4
1620#define ACPI_NHLT_MIC_8_SHAPED 5
1621#define ACPI_NHLT_MIC_RESERVED6 6 // 6 is reserved
1622#define ACPI_NHLT_MIC_VENDOR_DEFINED 7
1623#define ACPI_NHLT_MIC_RESERVED 8 // 8 and above are reserved
Bob Moorea805aab2021-10-01 20:16:25 +02001624
1625/* Values for Panel field above */
1626
Bob Mooree4a07f52021-12-22 17:25:40 +01001627#define ACPI_NHLT_MIC_POSITION_TOP 0
1628#define ACPI_NHLT_MIC_POSITION_BOTTOM 1
1629#define ACPI_NHLT_MIC_POSITION_LEFT 2
1630#define ACPI_NHLT_MIC_POSITION_RIGHT 3
1631#define ACPI_NHLT_MIC_POSITION_FRONT 4
1632#define ACPI_NHLT_MIC_POSITION_BACK 5
1633#define ACPI_NHLT_MIC_POSITION_RESERVED 6 // 6 and above are reserved
Bob Moorea805aab2021-10-01 20:16:25 +02001634
1635struct acpi_nhlt_vendor_mic_device_specific_config {
1636 struct acpi_nhlt_mic_device_specific_config mic_array_device_config;
1637 u8 number_of_microphones;
1638 struct acpi_nhlt_vendor_mic_config mic_config[]; // indexed by number_of_microphones
1639};
1640
1641/* Microphone SNR and Sensitivity extension */
1642
1643struct acpi_nhlt_mic_snr_sensitivity_extension {
1644 u32 SNR;
1645 u32 sensitivity;
1646};
1647
Bob Mooree4a07f52021-12-22 17:25:40 +01001648/* Render device with feedback */
1649
Bob Moorea805aab2021-10-01 20:16:25 +02001650struct acpi_nhlt_render_feedback_device_specific_config {
Bob Moorea805aab2021-10-01 20:16:25 +02001651 u8 feedback_virtual_slot; // render slot in case of capture
1652 u16 feedback_channels; // informative only
1653 u16 feedback_valid_bits_per_sample;
1654};
1655
1656/* Linux-specific structures */
1657
1658struct acpi_nhlt_linux_specific_count {
1659 u8 structure_count;
1660};
1661
1662struct acpi_nhlt_linux_specific_data {
1663 u8 device_id[16];
1664 u8 device_instance_id;
1665 u8 device_port_id;
1666 u8 filler[18];
1667};
1668
1669struct acpi_nhlt_table_terminator {
1670 u32 terminator_value;
1671 u32 terminator_signature;
1672};
1673
1674/*******************************************************************************
1675 *
Erik Schmausse62f8222018-02-15 13:09:26 -08001676 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1677 * Version 2 (ACPI 6.2)
1678 *
1679 ******************************************************************************/
1680
1681struct acpi_table_pcct {
1682 struct acpi_table_header header; /* Common ACPI table header */
1683 u32 flags;
1684 u64 reserved;
1685};
1686
1687/* Values for Flags field above */
1688
1689#define ACPI_PCCT_DOORBELL 1
1690
1691/* Values for subtable type in struct acpi_subtable_header */
1692
1693enum acpi_pcct_type {
1694 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1695 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1696 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1697 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1698 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
Erik Kaneda71f79a32021-04-06 14:30:12 -07001699 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
1700 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
Erik Schmausse62f8222018-02-15 13:09:26 -08001701};
1702
1703/*
1704 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1705 */
1706
1707/* 0: Generic Communications Subspace */
1708
1709struct acpi_pcct_subspace {
1710 struct acpi_subtable_header header;
1711 u8 reserved[6];
1712 u64 base_address;
1713 u64 length;
1714 struct acpi_generic_address doorbell_register;
1715 u64 preserve_mask;
1716 u64 write_mask;
1717 u32 latency;
1718 u32 max_access_rate;
1719 u16 min_turnaround_time;
1720};
1721
1722/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1723
1724struct acpi_pcct_hw_reduced {
1725 struct acpi_subtable_header header;
1726 u32 platform_interrupt;
1727 u8 flags;
1728 u8 reserved;
1729 u64 base_address;
1730 u64 length;
1731 struct acpi_generic_address doorbell_register;
1732 u64 preserve_mask;
1733 u64 write_mask;
1734 u32 latency;
1735 u32 max_access_rate;
1736 u16 min_turnaround_time;
1737};
1738
1739/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1740
1741struct acpi_pcct_hw_reduced_type2 {
1742 struct acpi_subtable_header header;
1743 u32 platform_interrupt;
1744 u8 flags;
1745 u8 reserved;
1746 u64 base_address;
1747 u64 length;
1748 struct acpi_generic_address doorbell_register;
1749 u64 preserve_mask;
1750 u64 write_mask;
1751 u32 latency;
1752 u32 max_access_rate;
1753 u16 min_turnaround_time;
1754 struct acpi_generic_address platform_ack_register;
1755 u64 ack_preserve_mask;
1756 u64 ack_write_mask;
1757};
1758
1759/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1760
1761struct acpi_pcct_ext_pcc_master {
1762 struct acpi_subtable_header header;
1763 u32 platform_interrupt;
1764 u8 flags;
1765 u8 reserved1;
1766 u64 base_address;
1767 u32 length;
1768 struct acpi_generic_address doorbell_register;
1769 u64 preserve_mask;
1770 u64 write_mask;
1771 u32 latency;
1772 u32 max_access_rate;
1773 u32 min_turnaround_time;
1774 struct acpi_generic_address platform_ack_register;
1775 u64 ack_preserve_mask;
1776 u64 ack_set_mask;
1777 u64 reserved2;
1778 struct acpi_generic_address cmd_complete_register;
1779 u64 cmd_complete_mask;
1780 struct acpi_generic_address cmd_update_register;
1781 u64 cmd_update_preserve_mask;
1782 u64 cmd_update_set_mask;
1783 struct acpi_generic_address error_status_register;
1784 u64 error_status_mask;
1785};
1786
1787/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1788
1789struct acpi_pcct_ext_pcc_slave {
1790 struct acpi_subtable_header header;
1791 u32 platform_interrupt;
1792 u8 flags;
1793 u8 reserved1;
1794 u64 base_address;
1795 u32 length;
1796 struct acpi_generic_address doorbell_register;
1797 u64 preserve_mask;
1798 u64 write_mask;
1799 u32 latency;
1800 u32 max_access_rate;
1801 u32 min_turnaround_time;
1802 struct acpi_generic_address platform_ack_register;
1803 u64 ack_preserve_mask;
1804 u64 ack_set_mask;
1805 u64 reserved2;
1806 struct acpi_generic_address cmd_complete_register;
1807 u64 cmd_complete_mask;
1808 struct acpi_generic_address cmd_update_register;
1809 u64 cmd_update_preserve_mask;
1810 u64 cmd_update_set_mask;
1811 struct acpi_generic_address error_status_register;
1812 u64 error_status_mask;
1813};
1814
Erik Kaneda71f79a32021-04-06 14:30:12 -07001815/* 5: HW Registers based Communications Subspace */
1816
1817struct acpi_pcct_hw_reg {
1818 struct acpi_subtable_header header;
1819 u16 version;
1820 u64 base_address;
1821 u64 length;
1822 struct acpi_generic_address doorbell_register;
1823 u64 doorbell_preserve;
1824 u64 doorbell_write;
1825 struct acpi_generic_address cmd_complete_register;
1826 u64 cmd_complete_mask;
1827 struct acpi_generic_address error_status_register;
1828 u64 error_status_mask;
1829 u32 nominal_latency;
1830 u32 min_turnaround_time;
1831};
1832
Erik Schmausse62f8222018-02-15 13:09:26 -08001833/* Values for doorbell flags above */
1834
1835#define ACPI_PCCT_INTERRUPT_POLARITY (1)
1836#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1837
1838/*
1839 * PCC memory structures (not part of the ACPI table)
1840 */
1841
1842/* Shared Memory Region */
1843
1844struct acpi_pcct_shared_memory {
1845 u32 signature;
1846 u16 command;
1847 u16 status;
1848};
1849
1850/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1851
1852struct acpi_pcct_ext_pcc_shared_memory {
1853 u32 signature;
1854 u32 flags;
1855 u32 length;
1856 u32 command;
1857};
1858
1859/*******************************************************************************
1860 *
1861 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1862 * Version 0
1863 *
1864 ******************************************************************************/
1865
1866struct acpi_table_pdtt {
1867 struct acpi_table_header header; /* Common ACPI table header */
1868 u8 trigger_count;
1869 u8 reserved[3];
1870 u32 array_offset;
1871};
1872
1873/*
1874 * PDTT Communication Channel Identifier Structure.
1875 * The number of these structures is defined by trigger_count above,
1876 * starting at array_offset.
1877 */
1878struct acpi_pdtt_channel {
1879 u8 subchannel_id;
1880 u8 flags;
1881};
1882
1883/* Flags for above */
1884
1885#define ACPI_PDTT_RUNTIME_TRIGGER (1)
1886#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
Erik Schmaussf00175d2019-02-15 13:36:11 -08001887#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
Erik Schmausse62f8222018-02-15 13:09:26 -08001888
1889/*******************************************************************************
1890 *
Erik Kaneda9f400332021-04-06 14:30:23 -07001891 * PHAT - Platform Health Assessment Table (ACPI 6.4)
1892 * Version 1
1893 *
1894 ******************************************************************************/
1895
1896struct acpi_table_phat {
1897 struct acpi_table_header header; /* Common ACPI table header */
1898};
1899
1900/* Common header for PHAT subtables that follow main table */
1901
1902struct acpi_phat_header {
1903 u16 type;
1904 u16 length;
1905 u8 revision;
1906};
1907
1908/* Values for Type field above */
1909
1910#define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
1911#define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
1912#define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
1913
1914/*
1915 * PHAT subtables, correspond to Type in struct acpi_phat_header
1916 */
1917
1918/* 0: Firmware Version Data Record */
1919
1920struct acpi_phat_version_data {
1921 struct acpi_phat_header header;
1922 u8 reserved[3];
1923 u32 element_count;
1924};
1925
1926struct acpi_phat_version_element {
1927 u8 guid[16];
1928 u64 version_value;
1929 u32 producer_id;
1930};
1931
1932/* 1: Firmware Health Data Record */
1933
1934struct acpi_phat_health_data {
1935 struct acpi_phat_header header;
1936 u8 reserved[2];
1937 u8 health;
1938 u8 device_guid[16];
1939 u32 device_specific_offset; /* Zero if no Device-specific data */
1940};
1941
1942/* Values for Health field above */
1943
1944#define ACPI_PHAT_ERRORS_FOUND 0
1945#define ACPI_PHAT_NO_ERRORS 1
1946#define ACPI_PHAT_UNKNOWN_ERRORS 2
1947#define ACPI_PHAT_ADVISORY 3
1948
1949/*******************************************************************************
1950 *
Erik Schmausse62f8222018-02-15 13:09:26 -08001951 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1952 * Version 1
1953 *
1954 ******************************************************************************/
1955
1956struct acpi_table_pmtt {
1957 struct acpi_table_header header; /* Common ACPI table header */
Bob Moorecca97d42021-04-06 14:30:21 -07001958 u32 memory_device_count;
1959 /*
1960 * Immediately followed by:
1961 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1962 */
Erik Schmausse62f8222018-02-15 13:09:26 -08001963};
1964
1965/* Common header for PMTT subtables that follow main table */
1966
1967struct acpi_pmtt_header {
1968 u8 type;
1969 u8 reserved1;
1970 u16 length;
1971 u16 flags;
1972 u16 reserved2;
Bob Moorecca97d42021-04-06 14:30:21 -07001973 u32 memory_device_count; /* Zero means no memory device structs follow */
1974 /*
1975 * Immediately followed by:
1976 * u8 type_specific_data[]
1977 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1978 */
Erik Schmausse62f8222018-02-15 13:09:26 -08001979};
1980
1981/* Values for Type field above */
1982
1983#define ACPI_PMTT_TYPE_SOCKET 0
1984#define ACPI_PMTT_TYPE_CONTROLLER 1
1985#define ACPI_PMTT_TYPE_DIMM 2
Bob Moorecca97d42021-04-06 14:30:21 -07001986#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
1987#define ACPI_PMTT_TYPE_VENDOR 0xFF
Erik Schmausse62f8222018-02-15 13:09:26 -08001988
1989/* Values for Flags field above */
1990
1991#define ACPI_PMTT_TOP_LEVEL 0x0001
1992#define ACPI_PMTT_PHYSICAL 0x0002
1993#define ACPI_PMTT_MEMORY_TYPE 0x000C
1994
1995/*
1996 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1997 */
1998
1999/* 0: Socket Structure */
2000
2001struct acpi_pmtt_socket {
2002 struct acpi_pmtt_header header;
2003 u16 socket_id;
2004 u16 reserved;
2005};
Bob Moorecca97d42021-04-06 14:30:21 -07002006 /*
2007 * Immediately followed by:
2008 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2009 */
Erik Schmausse62f8222018-02-15 13:09:26 -08002010
2011/* 1: Memory Controller subtable */
2012
2013struct acpi_pmtt_controller {
2014 struct acpi_pmtt_header header;
Bob Moorecca97d42021-04-06 14:30:21 -07002015 u16 controller_id;
Erik Schmausse62f8222018-02-15 13:09:26 -08002016 u16 reserved;
Erik Schmausse62f8222018-02-15 13:09:26 -08002017};
Bob Moorecca97d42021-04-06 14:30:21 -07002018 /*
2019 * Immediately followed by:
2020 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2021 */
Erik Schmausse62f8222018-02-15 13:09:26 -08002022
2023/* 2: Physical Component Identifier (DIMM) */
2024
2025struct acpi_pmtt_physical_component {
2026 struct acpi_pmtt_header header;
Erik Schmausse62f8222018-02-15 13:09:26 -08002027 u32 bios_handle;
2028};
2029
Bob Moorecca97d42021-04-06 14:30:21 -07002030/* 0xFF: Vendor Specific Data */
2031
2032struct acpi_pmtt_vendor_specific {
2033 struct acpi_pmtt_header header;
2034 u8 type_uuid[16];
2035 u8 specific[];
2036 /*
2037 * Immediately followed by:
2038 * u8 vendor_specific_data[];
2039 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2040 */
2041};
2042
Erik Schmausse62f8222018-02-15 13:09:26 -08002043/*******************************************************************************
2044 *
2045 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2046 * Version 1
2047 *
2048 ******************************************************************************/
2049
2050struct acpi_table_pptt {
2051 struct acpi_table_header header; /* Common ACPI table header */
2052};
2053
2054/* Values for Type field above */
2055
2056enum acpi_pptt_type {
2057 ACPI_PPTT_TYPE_PROCESSOR = 0,
2058 ACPI_PPTT_TYPE_CACHE = 1,
2059 ACPI_PPTT_TYPE_ID = 2,
2060 ACPI_PPTT_TYPE_RESERVED = 3
2061};
2062
2063/* 0: Processor Hierarchy Node Structure */
2064
2065struct acpi_pptt_processor {
2066 struct acpi_subtable_header header;
2067 u16 reserved;
2068 u32 flags;
2069 u32 parent;
2070 u32 acpi_processor_id;
2071 u32 number_of_priv_resources;
2072};
2073
2074/* Flags */
2075
Erik Schmaussb5eab512019-02-15 13:36:16 -08002076#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
2077#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
2078#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
2079#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
2080#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
Erik Schmausse62f8222018-02-15 13:09:26 -08002081
2082/* 1: Cache Type Structure */
2083
2084struct acpi_pptt_cache {
2085 struct acpi_subtable_header header;
2086 u16 reserved;
2087 u32 flags;
2088 u32 next_level_of_cache;
2089 u32 size;
2090 u32 number_of_sets;
2091 u8 associativity;
2092 u8 attributes;
2093 u16 line_size;
2094};
2095
Erik Kaneda5e2e86c2021-04-06 14:30:13 -07002096/* 1: Cache Type Structure for PPTT version 3 */
2097
2098struct acpi_pptt_cache_v1 {
2099 u32 cache_id;
2100};
2101
Erik Schmausse62f8222018-02-15 13:09:26 -08002102/* Flags */
2103
2104#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
2105#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
2106#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
2107#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
2108#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
2109#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
2110#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
Erik Kaneda5e2e86c2021-04-06 14:30:13 -07002111#define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
Erik Schmausse62f8222018-02-15 13:09:26 -08002112
2113/* Masks for Attributes */
2114
2115#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
2116#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
2117#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
2118
2119/* Attributes describing cache */
2120#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
2121#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
2122#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
2123#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
2124
2125#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
2126#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
2127#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
2128#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
2129
2130#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
2131#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
2132
2133/* 2: ID Structure */
2134
2135struct acpi_pptt_id {
2136 struct acpi_subtable_header header;
2137 u16 reserved;
2138 u32 vendor_id;
2139 u64 level1_id;
2140 u64 level2_id;
2141 u16 major_rev;
2142 u16 minor_rev;
2143 u16 spin_rev;
2144};
2145
2146/*******************************************************************************
2147 *
Erik Kanedad71df852021-06-04 14:26:06 -07002148 * PRMT - Platform Runtime Mechanism Table
2149 * Version 1
2150 *
2151 ******************************************************************************/
2152
2153struct acpi_table_prmt {
2154 struct acpi_table_header header; /* Common ACPI table header */
2155};
2156
2157struct acpi_table_prmt_header {
2158 u8 platform_guid[16];
2159 u32 module_info_offset;
2160 u32 module_info_count;
2161};
2162
Erik Kaneda9f8c7ba2021-06-09 20:41:51 -07002163struct acpi_prmt_module_header {
2164 u16 revision;
2165 u16 length;
2166};
2167
Erik Kanedad71df852021-06-04 14:26:06 -07002168struct acpi_prmt_module_info {
2169 u16 revision;
2170 u16 length;
2171 u8 module_guid[16];
2172 u16 major_rev;
2173 u16 minor_rev;
2174 u16 handler_info_count;
2175 u32 handler_info_offset;
2176 u64 mmio_list_pointer;
2177};
2178
2179struct acpi_prmt_handler_info {
2180 u16 revision;
2181 u16 length;
2182 u8 handler_guid[16];
2183 u64 handler_address;
2184 u64 static_data_buffer_address;
2185 u64 acpi_param_buffer_address;
2186};
2187
2188/*******************************************************************************
2189 *
Erik Schmausse62f8222018-02-15 13:09:26 -08002190 * RASF - RAS Feature Table (ACPI 5.0)
2191 * Version 1
2192 *
2193 ******************************************************************************/
2194
2195struct acpi_table_rasf {
2196 struct acpi_table_header header; /* Common ACPI table header */
2197 u8 channel_id[12];
2198};
2199
2200/* RASF Platform Communication Channel Shared Memory Region */
2201
2202struct acpi_rasf_shared_memory {
2203 u32 signature;
2204 u16 command;
2205 u16 status;
2206 u16 version;
2207 u8 capabilities[16];
2208 u8 set_capabilities[16];
2209 u16 num_parameter_blocks;
2210 u32 set_capabilities_status;
2211};
2212
2213/* RASF Parameter Block Structure Header */
2214
2215struct acpi_rasf_parameter_block {
2216 u16 type;
2217 u16 version;
2218 u16 length;
2219};
2220
2221/* RASF Parameter Block Structure for PATROL_SCRUB */
2222
2223struct acpi_rasf_patrol_scrub_parameter {
2224 struct acpi_rasf_parameter_block header;
2225 u16 patrol_scrub_command;
2226 u64 requested_address_range[2];
2227 u64 actual_address_range[2];
2228 u16 flags;
2229 u8 requested_speed;
2230};
2231
2232/* Masks for Flags and Speed fields above */
2233
2234#define ACPI_RASF_SCRUBBER_RUNNING 1
2235#define ACPI_RASF_SPEED (7<<1)
2236#define ACPI_RASF_SPEED_SLOW (0<<1)
2237#define ACPI_RASF_SPEED_MEDIUM (4<<1)
2238#define ACPI_RASF_SPEED_FAST (7<<1)
2239
2240/* Channel Commands */
2241
2242enum acpi_rasf_commands {
2243 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
2244};
2245
2246/* Platform RAS Capabilities */
2247
2248enum acpi_rasf_capabiliities {
2249 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
2250 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
2251};
2252
2253/* Patrol Scrub Commands */
2254
2255enum acpi_rasf_patrol_scrub_commands {
2256 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
2257 ACPI_RASF_START_PATROL_SCRUBBER = 2,
2258 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
2259};
2260
2261/* Channel Command flags */
2262
2263#define ACPI_RASF_GENERATE_SCI (1<<15)
2264
2265/* Status values */
2266
2267enum acpi_rasf_status {
2268 ACPI_RASF_SUCCESS = 0,
2269 ACPI_RASF_NOT_VALID = 1,
2270 ACPI_RASF_NOT_SUPPORTED = 2,
2271 ACPI_RASF_BUSY = 3,
2272 ACPI_RASF_FAILED = 4,
2273 ACPI_RASF_ABORTED = 5,
2274 ACPI_RASF_INVALID_DATA = 6
2275};
2276
2277/* Status flags */
2278
2279#define ACPI_RASF_COMMAND_COMPLETE (1)
2280#define ACPI_RASF_SCI_DOORBELL (1<<1)
2281#define ACPI_RASF_ERROR (1<<2)
2282#define ACPI_RASF_STATUS (0x1F<<3)
2283
2284/*******************************************************************************
2285 *
Bob Moore536e35c2021-06-04 14:26:00 -07002286 * RGRT - Regulatory Graphics Resource Table
2287 * Version 1
2288 *
2289 * Conforms to "ACPI RGRT" available at:
2290 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
2291 *
2292 ******************************************************************************/
2293
2294struct acpi_table_rgrt {
2295 struct acpi_table_header header; /* Common ACPI table header */
2296 u16 version;
2297 u8 image_type;
2298 u8 reserved;
2299 u8 image[0];
2300};
2301
2302/* image_type values */
2303
2304enum acpi_rgrt_image_type {
2305 ACPI_RGRT_TYPE_RESERVED0 = 0,
2306 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
2307 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2308};
2309
2310/*******************************************************************************
2311 *
Erik Schmausse62f8222018-02-15 13:09:26 -08002312 * SBST - Smart Battery Specification Table
2313 * Version 1
2314 *
2315 ******************************************************************************/
2316
2317struct acpi_table_sbst {
2318 struct acpi_table_header header; /* Common ACPI table header */
2319 u32 warning_level;
2320 u32 low_level;
2321 u32 critical_level;
2322};
2323
2324/*******************************************************************************
2325 *
James Morse3bd38462017-08-03 14:26:25 +08002326 * SDEI - Software Delegated Exception Interface Descriptor Table
2327 *
2328 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
2329 * May 8th, 2017. Copyright 2017 ARM Ltd.
2330 *
2331 ******************************************************************************/
2332
2333struct acpi_table_sdei {
2334 struct acpi_table_header header; /* Common ACPI table header */
2335};
2336
2337/*******************************************************************************
2338 *
Erik Schmausse62f8222018-02-15 13:09:26 -08002339 * SDEV - Secure Devices Table (ACPI 6.2)
2340 * Version 1
Bob Moore5cf4d732011-03-18 09:49:41 +08002341 *
2342 ******************************************************************************/
2343
Erik Schmausse62f8222018-02-15 13:09:26 -08002344struct acpi_table_sdev {
Bob Moore5cf4d732011-03-18 09:49:41 +08002345 struct acpi_table_header header; /* Common ACPI table header */
2346};
2347
Erik Schmausse62f8222018-02-15 13:09:26 -08002348struct acpi_sdev_header {
2349 u8 type;
2350 u8 flags;
2351 u16 length;
Bob Mooreb24aad42009-07-24 13:30:17 +08002352};
2353
Erik Schmausse62f8222018-02-15 13:09:26 -08002354/* Values for subtable type above */
Bob Moore6e2d5eb2009-07-27 10:53:00 +08002355
Erik Schmausse62f8222018-02-15 13:09:26 -08002356enum acpi_sdev_type {
2357 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
2358 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
2359 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
Bob Moore6e2d5eb2009-07-27 10:53:00 +08002360};
2361
Erik Schmausse62f8222018-02-15 13:09:26 -08002362/* Values for flags above */
Bob Moore6e2d5eb2009-07-27 10:53:00 +08002363
Erik Schmausse62f8222018-02-15 13:09:26 -08002364#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
Erik Kaneda14012d22021-04-06 14:30:18 -07002365#define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
Bob Moore15a61aa2015-07-23 12:54:04 +08002366
2367/*
Erik Schmausse62f8222018-02-15 13:09:26 -08002368 * SDEV subtables
Bob Moore15a61aa2015-07-23 12:54:04 +08002369 */
Bob Moore15a61aa2015-07-23 12:54:04 +08002370
Erik Schmausse62f8222018-02-15 13:09:26 -08002371/* 0: Namespace Device Based Secure Device Structure */
2372
2373struct acpi_sdev_namespace {
2374 struct acpi_sdev_header header;
2375 u16 device_id_offset;
2376 u16 device_id_length;
2377 u16 vendor_data_offset;
2378 u16 vendor_data_length;
Bob Mooreb24aad42009-07-24 13:30:17 +08002379};
2380
Erik Kaneda14012d22021-04-06 14:30:18 -07002381struct acpi_sdev_secure_component {
2382 u16 secure_component_offset;
2383 u16 secure_component_length;
2384};
2385
2386/*
2387 * SDEV sub-subtables ("Components") for above
2388 */
2389struct acpi_sdev_component {
2390 struct acpi_sdev_header header;
2391};
2392
2393/* Values for sub-subtable type above */
2394
2395enum acpi_sac_type {
2396 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
2397 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
2398};
2399
2400struct acpi_sdev_id_component {
2401 struct acpi_sdev_header header;
2402 u16 hardware_id_offset;
2403 u16 hardware_id_length;
2404 u16 subsystem_id_offset;
2405 u16 subsystem_id_length;
2406 u16 hardware_revision;
2407 u8 hardware_rev_present;
2408 u8 class_code_present;
2409 u8 pci_base_class;
2410 u8 pci_sub_class;
2411 u8 pci_programming_xface;
2412};
2413
2414struct acpi_sdev_mem_component {
2415 struct acpi_sdev_header header;
2416 u32 reserved;
2417 u64 memory_base_address;
2418 u64 memory_length;
2419};
2420
Erik Schmausse62f8222018-02-15 13:09:26 -08002421/* 1: PCIe Endpoint Device Based Device Structure */
2422
2423struct acpi_sdev_pcie {
2424 struct acpi_sdev_header header;
2425 u16 segment;
2426 u16 start_bus;
2427 u16 path_offset;
2428 u16 path_length;
2429 u16 vendor_data_offset;
2430 u16 vendor_data_length;
2431};
2432
2433/* 1a: PCIe Endpoint path entry */
2434
2435struct acpi_sdev_pcie_path {
Bob Moore90056942015-07-01 14:45:25 +08002436 u8 device;
2437 u8 function;
2438};
2439
Kuppuswamy Sathyanarayanan8288f692021-06-04 14:25:56 -07002440/*******************************************************************************
2441 *
2442 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
Bob Moore6496f032021-06-04 14:25:59 -07002443 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2444 * Trust Domain Extensions (Intel TDX)".
Kuppuswamy Sathyanarayanan8288f692021-06-04 14:25:56 -07002445 * Version 1
2446 *
2447 ******************************************************************************/
2448
2449struct acpi_table_svkl {
2450 struct acpi_table_header header; /* Common ACPI table header */
2451 u32 count;
2452};
2453
Bob Moore6496f032021-06-04 14:25:59 -07002454struct acpi_svkl_key {
Kuppuswamy Sathyanarayanan8288f692021-06-04 14:25:56 -07002455 u16 type;
2456 u16 format;
2457 u32 size;
2458 u64 address;
2459};
2460
2461enum acpi_svkl_type {
2462 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
2463 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
2464};
2465
2466enum acpi_svkl_format {
2467 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
2468 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
2469};
2470
Bob Moore2de6bb92021-12-22 17:36:30 +01002471/*******************************************************************************
2472 *
2473 * TDEL - TD-Event Log
2474 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2475 * Trust Domain Extensions (Intel TDX)".
2476 * September 2020
2477 *
2478 ******************************************************************************/
2479
2480struct acpi_table_tdel {
2481 struct acpi_table_header header; /* Common ACPI table header */
2482 u32 reserved;
2483 u64 log_area_minimum_length;
2484 u64 log_area_start_address;
2485};
2486
Robert Moore6e596082014-03-05 14:12:01 +08002487/* Reset to default packing */
2488
2489#pragma pack()
Bob Mooreb24aad42009-07-24 13:30:17 +08002490
2491#endif /* __ACTBL2_H__ */