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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 2dc20a51dc1e2da6eae1182cfe4c4835fca26017 / . / arch / arm / kernel / head-nommu.S
blob: f359a189dcf2cda84f112dc0003e616cdd6434d4 [file] [log] [blame]
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]1/*
2 * linux/arch/arm/kernel/head-nommu.S
3 *
4 * Copyright (C) 1994-2002 Russell King
5 * Copyright (C) 2003-2006 Hyok S. Choi
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Common kernel startup code (non-paged MM)
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]12 *
13 */
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]14#include <linux/linkage.h>
15#include <linux/init.h>
16
17#include <asm/assembler.h>
18#include <asm/mach-types.h>
19#include <asm/procinfo.h>
20#include <asm/ptrace.h>
Uwe Zeisberger2eb9d312006-05-05 15:11:14 +0100[diff] [blame]21#include <asm/asm-offsets.h>
Hyok S. Choi3b920ce2006-04-24 09:45:35 +0100[diff] [blame]22#include <asm/thread_info.h>
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]23#include <asm/system.h>
24
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]25/*
26 * Kernel startup entry point.
27 * ---------------------------
28 *
29 * This is normally called from the decompressor code. The requirements
30 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
31 * r1 = machine nr.
32 *
33 * See linux/arch/arm/tools/mach-types for the complete list of machine
34 * numbers for r1.
35 *
36 */
37 __INIT
38 .type stext, %function
39ENTRY(stext)
Russell King801194e2006-06-25 12:01:48 +0100[diff] [blame]40 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]41 @ and irqs disabled
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]42#ifndef CONFIG_CPU_CP15
43 ldr r9, =CONFIG_PROCESSOR_ID
44#else
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]45 mrc p15, 0, r9, c0, c0 @ get processor id
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]46#endif
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]47 bl __lookup_processor_type @ r5=procinfo r9=cpuid
48 movs r10, r5 @ invalid processor (r5=0)?
49 beq __error_p @ yes, error 'p'
50 bl __lookup_machine_type @ r5=machinfo
51 movs r8, r5 @ invalid machine (r5=0)?
52 beq __error_a @ yes, error 'a'
53
54 ldr r13, __switch_data @ address to jump to after
55 @ the initialization is done
56 adr lr, __after_proc_init @ return (PIC) address
57 add pc, r10, #PROCINFO_INITFUNC
58
59/*
60 * Set the Control Register and Read the process ID.
61 */
62 .type __after_proc_init, %function
63__after_proc_init:
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]64#ifdef CONFIG_CPU_CP15
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]65 mrc p15, 0, r0, c1, c0, 0 @ read control reg
66#ifdef CONFIG_ALIGNMENT_TRAP
67 orr r0, r0, #CR_A
68#else
69 bic r0, r0, #CR_A
70#endif
71#ifdef CONFIG_CPU_DCACHE_DISABLE
72 bic r0, r0, #CR_C
73#endif
74#ifdef CONFIG_CPU_BPREDICT_DISABLE
75 bic r0, r0, #CR_Z
76#endif
77#ifdef CONFIG_CPU_ICACHE_DISABLE
78 bic r0, r0, #CR_I
79#endif
Hyok S. Choi6afd6fa2006-09-28 21:46:34 +0900[diff] [blame]80#ifdef CONFIG_CPU_HIGH_VECTOR
81 orr r0, r0, #CR_V
82#else
83 bic r0, r0, #CR_V
84#endif
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]85 mcr p15, 0, r0, c1, c0, 0 @ write control reg
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]86#endif /* CONFIG_CPU_CP15 */
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]87
88 mov pc, r13 @ clear the BSS and jump
89 @ to start_kernel
Hyok S. Choi3b920ce2006-04-24 09:45:35 +0100[diff] [blame]90 .ltorg
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]91
92#include "head-common.S"