blob: bd9bfaa9269bc59980e89209e22ac0286288f9ef [file] [log] [blame]
Will Deacon3dd681d2012-03-05 11:49:32 +00001/*
2 * Compat system call wrappers
3 *
4 * Copyright (C) 2012 ARM Ltd.
5 * Authors: Will Deacon <will.deacon@arm.com>
6 * Catalin Marinas <catalin.marinas@arm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <linux/linkage.h>
Andreas Schwab18ccb0c2015-03-16 16:32:22 +000022#include <linux/const.h>
Will Deacon3dd681d2012-03-05 11:49:32 +000023
24#include <asm/assembler.h>
25#include <asm/asm-offsets.h>
Andreas Schwab18ccb0c2015-03-16 16:32:22 +000026#include <asm/errno.h>
27#include <asm/page.h>
Will Deacon3dd681d2012-03-05 11:49:32 +000028
29/*
30 * System call wrappers for the AArch32 compatibility layer.
31 */
Will Deacon3dd681d2012-03-05 11:49:32 +000032
Catalin Marinas01564112015-01-06 16:42:32 +000033ENTRY(compat_sys_sigreturn_wrapper)
Will Deacon3dd681d2012-03-05 11:49:32 +000034 mov x0, sp
35 mov x27, #0 // prevent syscall restart handling (why)
36 b compat_sys_sigreturn
37ENDPROC(compat_sys_sigreturn_wrapper)
38
Catalin Marinas01564112015-01-06 16:42:32 +000039ENTRY(compat_sys_rt_sigreturn_wrapper)
Will Deacon3dd681d2012-03-05 11:49:32 +000040 mov x0, sp
41 mov x27, #0 // prevent syscall restart handling (why)
42 b compat_sys_rt_sigreturn
43ENDPROC(compat_sys_rt_sigreturn_wrapper)
44
Catalin Marinas01564112015-01-06 16:42:32 +000045ENTRY(compat_sys_statfs64_wrapper)
Will Deacon3dd681d2012-03-05 11:49:32 +000046 mov w3, #84
47 cmp w1, #88
48 csel w1, w3, w1, eq
49 b compat_sys_statfs64
50ENDPROC(compat_sys_statfs64_wrapper)
51
Catalin Marinas01564112015-01-06 16:42:32 +000052ENTRY(compat_sys_fstatfs64_wrapper)
Will Deacon3dd681d2012-03-05 11:49:32 +000053 mov w3, #84
54 cmp w1, #88
55 csel w1, w3, w1, eq
56 b compat_sys_fstatfs64
57ENDPROC(compat_sys_fstatfs64_wrapper)
58
59/*
Andreas Schwab18ccb0c2015-03-16 16:32:22 +000060 * Note: off_4k (w5) is always in units of 4K. If we can't do the
61 * requested offset because it is not page-aligned, we return -EINVAL.
62 */
63ENTRY(compat_sys_mmap2_wrapper)
64#if PAGE_SHIFT > 12
65 tst w5, #~PAGE_MASK >> 12
66 b.ne 1f
67 lsr w5, w5, #PAGE_SHIFT - 12
68#endif
69 b sys_mmap_pgoff
701: mov x0, #-EINVAL
71 ret
72ENDPROC(compat_sys_mmap2_wrapper)
73
74/*
Will Deacon3dd681d2012-03-05 11:49:32 +000075 * Wrappers for AArch32 syscalls that either take 64-bit parameters
76 * in registers or that take 32-bit parameters which require sign
77 * extension.
78 */
Catalin Marinas01564112015-01-06 16:42:32 +000079ENTRY(compat_sys_pread64_wrapper)
Matthew Leach55b89542013-10-11 14:52:13 +010080 regs_to_64 x3, x4, x5
Will Deacon3dd681d2012-03-05 11:49:32 +000081 b sys_pread64
82ENDPROC(compat_sys_pread64_wrapper)
83
Catalin Marinas01564112015-01-06 16:42:32 +000084ENTRY(compat_sys_pwrite64_wrapper)
Matthew Leach55b89542013-10-11 14:52:13 +010085 regs_to_64 x3, x4, x5
Will Deacon3dd681d2012-03-05 11:49:32 +000086 b sys_pwrite64
87ENDPROC(compat_sys_pwrite64_wrapper)
88
Catalin Marinas01564112015-01-06 16:42:32 +000089ENTRY(compat_sys_truncate64_wrapper)
Matthew Leach55b89542013-10-11 14:52:13 +010090 regs_to_64 x1, x2, x3
Will Deacon3dd681d2012-03-05 11:49:32 +000091 b sys_truncate
92ENDPROC(compat_sys_truncate64_wrapper)
93
Catalin Marinas01564112015-01-06 16:42:32 +000094ENTRY(compat_sys_ftruncate64_wrapper)
Matthew Leach55b89542013-10-11 14:52:13 +010095 regs_to_64 x1, x2, x3
Will Deacon3dd681d2012-03-05 11:49:32 +000096 b sys_ftruncate
97ENDPROC(compat_sys_ftruncate64_wrapper)
98
Catalin Marinas01564112015-01-06 16:42:32 +000099ENTRY(compat_sys_readahead_wrapper)
Matthew Leach55b89542013-10-11 14:52:13 +0100100 regs_to_64 x1, x2, x3
Will Deacon3dd681d2012-03-05 11:49:32 +0000101 mov w2, w4
102 b sys_readahead
103ENDPROC(compat_sys_readahead_wrapper)
104
Catalin Marinas01564112015-01-06 16:42:32 +0000105ENTRY(compat_sys_fadvise64_64_wrapper)
Will Deacon3dd681d2012-03-05 11:49:32 +0000106 mov w6, w1
Matthew Leach55b89542013-10-11 14:52:13 +0100107 regs_to_64 x1, x2, x3
108 regs_to_64 x2, x4, x5
Will Deacon3dd681d2012-03-05 11:49:32 +0000109 mov w3, w6
110 b sys_fadvise64_64
111ENDPROC(compat_sys_fadvise64_64_wrapper)
112
Catalin Marinas01564112015-01-06 16:42:32 +0000113ENTRY(compat_sys_sync_file_range2_wrapper)
Matthew Leach55b89542013-10-11 14:52:13 +0100114 regs_to_64 x2, x2, x3
115 regs_to_64 x3, x4, x5
Will Deacon3dd681d2012-03-05 11:49:32 +0000116 b sys_sync_file_range2
117ENDPROC(compat_sys_sync_file_range2_wrapper)
118
Catalin Marinas01564112015-01-06 16:42:32 +0000119ENTRY(compat_sys_fallocate_wrapper)
Matthew Leach55b89542013-10-11 14:52:13 +0100120 regs_to_64 x2, x2, x3
121 regs_to_64 x3, x4, x5
Will Deacon3dd681d2012-03-05 11:49:32 +0000122 b sys_fallocate
123ENDPROC(compat_sys_fallocate_wrapper)