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Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Terje Bergstrom4231c6b2013-03-22 16:34:05 +020010#ifndef HOST1X_DRM_H
11#define HOST1X_DRM_H 1
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000012
Thierry Redinge1e90642013-09-24 13:59:01 +020013#include <uapi/drm/tegra_drm.h>
14#include <linux/host1x.h>
15
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000016#include <drm/drmP.h>
17#include <drm/drm_crtc_helper.h>
18#include <drm/drm_edid.h>
19#include <drm/drm_fb_helper.h>
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000020#include <drm/drm_fixed.h>
21
Stephen Warrenca480802013-11-06 16:20:54 -070022struct reset_control;
23
Arto Merilainende2ba662013-03-22 16:34:08 +020024struct tegra_fb {
25 struct drm_framebuffer base;
26 struct tegra_bo **planes;
27 unsigned int num_planes;
28};
29
30struct tegra_fbdev {
31 struct drm_fb_helper base;
32 struct tegra_fb *fb;
33};
34
Thierry Reding386a2a72013-09-24 13:22:17 +020035struct tegra_drm {
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000036 struct drm_device *drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000037
38 struct mutex clients_lock;
39 struct list_head clients;
40
Arto Merilainende2ba662013-03-22 16:34:08 +020041 struct tegra_fbdev *fbdev;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000042};
43
Thierry Reding53fa7f72013-09-24 15:35:40 +020044struct tegra_drm_client;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000045
Thierry Redingc88c3632013-09-26 16:08:22 +020046struct tegra_drm_context {
Thierry Reding53fa7f72013-09-24 15:35:40 +020047 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +020048 struct host1x_channel *channel;
49 struct list_head list;
50};
51
Thierry Reding53fa7f72013-09-24 15:35:40 +020052struct tegra_drm_client_ops {
53 int (*open_channel)(struct tegra_drm_client *client,
Thierry Redingc88c3632013-09-26 16:08:22 +020054 struct tegra_drm_context *context);
55 void (*close_channel)(struct tegra_drm_context *context);
Thierry Redingc40f0f12013-10-10 11:00:33 +020056 int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
Thierry Redingc88c3632013-09-26 16:08:22 +020057 int (*submit)(struct tegra_drm_context *context,
Terje Bergstromd43f81c2013-03-22 16:34:09 +020058 struct drm_tegra_submit *args, struct drm_device *drm,
59 struct drm_file *file);
60};
61
Thierry Redingc40f0f12013-10-10 11:00:33 +020062int tegra_drm_submit(struct tegra_drm_context *context,
63 struct drm_tegra_submit *args, struct drm_device *drm,
64 struct drm_file *file);
65
Thierry Reding53fa7f72013-09-24 15:35:40 +020066struct tegra_drm_client {
67 struct host1x_client base;
Thierry Reding776dc382013-10-14 14:43:22 +020068 struct list_head list;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000069
Thierry Reding53fa7f72013-09-24 15:35:40 +020070 const struct tegra_drm_client_ops *ops;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000071};
72
Thierry Reding53fa7f72013-09-24 15:35:40 +020073static inline struct tegra_drm_client *
Thierry Reding776dc382013-10-14 14:43:22 +020074host1x_to_drm_client(struct host1x_client *client)
Thierry Reding53fa7f72013-09-24 15:35:40 +020075{
76 return container_of(client, struct tegra_drm_client, base);
77}
78
Thierry Reding776dc382013-10-14 14:43:22 +020079extern int tegra_drm_register_client(struct tegra_drm *tegra,
80 struct tegra_drm_client *client);
81extern int tegra_drm_unregister_client(struct tegra_drm *tegra,
82 struct tegra_drm_client *client);
83
Thierry Reding386a2a72013-09-24 13:22:17 +020084extern int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm);
85extern int tegra_drm_exit(struct tegra_drm *tegra);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000086
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000087struct tegra_output;
88
89struct tegra_dc {
Thierry Reding776dc382013-10-14 14:43:22 +020090 struct host1x_client client;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000091 struct device *dev;
Thierry Redingd18d3032013-09-26 16:09:19 +020092 spinlock_t lock;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000093
94 struct drm_crtc base;
95 int pipe;
96
97 struct clk *clk;
Stephen Warrenca480802013-11-06 16:20:54 -070098 struct reset_control *rst;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000099 void __iomem *regs;
100 int irq;
101
102 struct tegra_output *rgb;
103
104 struct list_head list;
105
106 struct drm_info_list *debugfs_files;
107 struct drm_minor *minor;
108 struct dentry *debugfs;
Thierry Reding3c03c462012-11-28 12:00:18 +0100109
110 /* page-flip handling */
111 struct drm_pending_vblank_event *event;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000112};
113
Thierry Reding53fa7f72013-09-24 15:35:40 +0200114static inline struct tegra_dc *
Thierry Reding776dc382013-10-14 14:43:22 +0200115host1x_client_to_dc(struct host1x_client *client)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000116{
117 return container_of(client, struct tegra_dc, client);
118}
119
120static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
121{
Thierry Reding37826512013-11-08 12:30:37 +0100122 return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000123}
124
125static inline void tegra_dc_writel(struct tegra_dc *dc, unsigned long value,
126 unsigned long reg)
127{
128 writel(value, dc->regs + (reg << 2));
129}
130
131static inline unsigned long tegra_dc_readl(struct tegra_dc *dc,
132 unsigned long reg)
133{
134 return readl(dc->regs + (reg << 2));
135}
136
Thierry Redingf34bc782012-11-04 21:47:13 +0100137struct tegra_dc_window {
138 struct {
139 unsigned int x;
140 unsigned int y;
141 unsigned int w;
142 unsigned int h;
143 } src;
144 struct {
145 unsigned int x;
146 unsigned int y;
147 unsigned int w;
148 unsigned int h;
149 } dst;
150 unsigned int bits_per_pixel;
151 unsigned int format;
152 unsigned int stride[2];
153 unsigned long base[3];
Thierry Redingdb7fbdf2013-10-07 09:47:58 +0200154 bool bottom_up;
Thierry Reding773af772013-10-04 22:34:01 +0200155 bool tiled;
Thierry Redingf34bc782012-11-04 21:47:13 +0100156};
157
158/* from dc.c */
159extern unsigned int tegra_dc_format(uint32_t format);
160extern int tegra_dc_setup_window(struct tegra_dc *dc, unsigned int index,
161 const struct tegra_dc_window *window);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100162extern void tegra_dc_enable_vblank(struct tegra_dc *dc);
163extern void tegra_dc_disable_vblank(struct tegra_dc *dc);
Thierry Reding3c03c462012-11-28 12:00:18 +0100164extern void tegra_dc_cancel_page_flip(struct drm_crtc *crtc,
165 struct drm_file *file);
Thierry Redingf34bc782012-11-04 21:47:13 +0100166
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000167struct tegra_output_ops {
168 int (*enable)(struct tegra_output *output);
169 int (*disable)(struct tegra_output *output);
170 int (*setup_clock)(struct tegra_output *output, struct clk *clk,
171 unsigned long pclk);
172 int (*check_mode)(struct tegra_output *output,
173 struct drm_display_mode *mode,
174 enum drm_mode_status *status);
175};
176
177enum tegra_output_type {
178 TEGRA_OUTPUT_RGB,
Thierry Redingedec4af2012-11-15 21:28:23 +0000179 TEGRA_OUTPUT_HDMI,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000180};
181
182struct tegra_output {
183 struct device_node *of_node;
184 struct device *dev;
185
186 const struct tegra_output_ops *ops;
187 enum tegra_output_type type;
188
189 struct i2c_adapter *ddc;
190 const struct edid *edid;
191 unsigned int hpd_irq;
192 int hpd_gpio;
193
194 struct drm_encoder encoder;
195 struct drm_connector connector;
196};
197
198static inline struct tegra_output *encoder_to_output(struct drm_encoder *e)
199{
200 return container_of(e, struct tegra_output, encoder);
201}
202
203static inline struct tegra_output *connector_to_output(struct drm_connector *c)
204{
205 return container_of(c, struct tegra_output, connector);
206}
207
208static inline int tegra_output_enable(struct tegra_output *output)
209{
210 if (output && output->ops && output->ops->enable)
211 return output->ops->enable(output);
212
213 return output ? -ENOSYS : -EINVAL;
214}
215
216static inline int tegra_output_disable(struct tegra_output *output)
217{
218 if (output && output->ops && output->ops->disable)
219 return output->ops->disable(output);
220
221 return output ? -ENOSYS : -EINVAL;
222}
223
224static inline int tegra_output_setup_clock(struct tegra_output *output,
225 struct clk *clk, unsigned long pclk)
226{
227 if (output && output->ops && output->ops->setup_clock)
228 return output->ops->setup_clock(output, clk, pclk);
229
230 return output ? -ENOSYS : -EINVAL;
231}
232
233static inline int tegra_output_check_mode(struct tegra_output *output,
234 struct drm_display_mode *mode,
235 enum drm_mode_status *status)
236{
237 if (output && output->ops && output->ops->check_mode)
238 return output->ops->check_mode(output, mode, status);
239
240 return output ? -ENOSYS : -EINVAL;
241}
242
Thierry Reding776dc382013-10-14 14:43:22 +0200243/* from bus.c */
244int drm_host1x_init(struct drm_driver *driver, struct host1x_device *device);
245void drm_host1x_exit(struct drm_driver *driver, struct host1x_device *device);
246
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000247/* from rgb.c */
248extern int tegra_dc_rgb_probe(struct tegra_dc *dc);
Thierry Reding59d29c02013-10-14 14:26:42 +0200249extern int tegra_dc_rgb_remove(struct tegra_dc *dc);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000250extern int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc);
251extern int tegra_dc_rgb_exit(struct tegra_dc *dc);
252
253/* from output.c */
Thierry Reding59d29c02013-10-14 14:26:42 +0200254extern int tegra_output_probe(struct tegra_output *output);
255extern int tegra_output_remove(struct tegra_output *output);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000256extern int tegra_output_init(struct drm_device *drm, struct tegra_output *output);
257extern int tegra_output_exit(struct tegra_output *output);
258
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000259/* from fb.c */
Arto Merilainende2ba662013-03-22 16:34:08 +0200260struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
261 unsigned int index);
Thierry Redingdb7fbdf2013-10-07 09:47:58 +0200262bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer);
Thierry Reding773af772013-10-04 22:34:01 +0200263bool tegra_fb_is_tiled(struct drm_framebuffer *framebuffer);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000264extern int tegra_drm_fb_init(struct drm_device *drm);
265extern void tegra_drm_fb_exit(struct drm_device *drm);
Arto Merilainende2ba662013-03-22 16:34:08 +0200266extern void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000267
Thierry Reding776dc382013-10-14 14:43:22 +0200268extern struct platform_driver tegra_dc_driver;
269extern struct platform_driver tegra_hdmi_driver;
270extern struct platform_driver tegra_gr2d_driver;
Thierry Reding5f60ed02013-02-28 08:08:01 +0100271extern struct platform_driver tegra_gr3d_driver;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000272
Terje Bergstrom4231c6b2013-03-22 16:34:05 +0200273#endif /* HOST1X_DRM_H */