blob: 9fa6a990cf0398d7fd341d745e1077fd133e9917 [file] [log] [blame]
Russell King97d654f2006-03-15 15:54:37 +00001/*
2 * linux/arch/arm/mach-sa1100/clock.c
3 */
4#include <linux/module.h>
5#include <linux/kernel.h>
Russell King5e1dbdb42008-11-08 20:48:27 +00006#include <linux/device.h>
Russell King97d654f2006-03-15 15:54:37 +00007#include <linux/list.h>
8#include <linux/errno.h>
9#include <linux/err.h>
10#include <linux/string.h>
11#include <linux/clk.h>
12#include <linux/spinlock.h>
Russell Kingd0a9d752007-04-22 10:08:58 +010013#include <linux/mutex.h>
Jett.Zhou4a8f8342011-11-30 14:32:36 +080014#include <linux/io.h>
15#include <linux/clkdev.h>
Russell King97d654f2006-03-15 15:54:37 +000016
Russell Kinga09e64f2008-08-05 16:14:15 +010017#include <mach/hardware.h>
Russell King97d654f2006-03-15 15:54:37 +000018
Jett.Zhou4a8f8342011-11-30 14:32:36 +080019struct clkops {
20 void (*enable)(struct clk *);
21 void (*disable)(struct clk *);
22};
23
Russell King97d654f2006-03-15 15:54:37 +000024struct clk {
Jett.Zhou4a8f8342011-11-30 14:32:36 +080025 const struct clkops *ops;
Russell King97d654f2006-03-15 15:54:37 +000026 unsigned int enabled;
Russell King97d654f2006-03-15 15:54:37 +000027};
28
Jett.Zhou4a8f8342011-11-30 14:32:36 +080029#define DEFINE_CLK(_name, _ops) \
30struct clk clk_##_name = { \
31 .ops = _ops, \
32 }
33
34static DEFINE_SPINLOCK(clocks_lock);
35
Viresh Kumar0ad04fb2014-01-09 20:38:42 +053036/* Dummy clk routine to build generic kernel parts that may be using them */
37unsigned long clk_get_rate(struct clk *clk)
38{
39 return 0;
40}
41EXPORT_SYMBOL(clk_get_rate);
42
Jett.Zhou4a8f8342011-11-30 14:32:36 +080043static void clk_gpio27_enable(struct clk *clk)
Russell King97d654f2006-03-15 15:54:37 +000044{
45 /*
46 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
47 * (SA-1110 Developer's Manual, section 9.1.2.1)
48 */
49 GAFR |= GPIO_32_768kHz;
50 GPDR |= GPIO_32_768kHz;
51 TUCR = TUCR_3_6864MHz;
52}
53
Jett.Zhou4a8f8342011-11-30 14:32:36 +080054static void clk_gpio27_disable(struct clk *clk)
Russell King97d654f2006-03-15 15:54:37 +000055{
56 TUCR = 0;
57 GPDR &= ~GPIO_32_768kHz;
58 GAFR &= ~GPIO_32_768kHz;
59}
60
Russell King5e1dbdb42008-11-08 20:48:27 +000061int clk_enable(struct clk *clk)
62{
63 unsigned long flags;
64
Jett.Zhou4a8f8342011-11-30 14:32:36 +080065 if (clk) {
66 spin_lock_irqsave(&clocks_lock, flags);
67 if (clk->enabled++ == 0)
68 clk->ops->enable(clk);
69 spin_unlock_irqrestore(&clocks_lock, flags);
70 }
71
Russell King97d654f2006-03-15 15:54:37 +000072 return 0;
73}
Russell King5e1dbdb42008-11-08 20:48:27 +000074EXPORT_SYMBOL(clk_enable);
Russell King97d654f2006-03-15 15:54:37 +000075
Russell King5e1dbdb42008-11-08 20:48:27 +000076void clk_disable(struct clk *clk)
Russell King97d654f2006-03-15 15:54:37 +000077{
Russell King5e1dbdb42008-11-08 20:48:27 +000078 unsigned long flags;
Russell King97d654f2006-03-15 15:54:37 +000079
Jett.Zhou4a8f8342011-11-30 14:32:36 +080080 if (clk) {
81 WARN_ON(clk->enabled == 0);
82 spin_lock_irqsave(&clocks_lock, flags);
83 if (--clk->enabled == 0)
84 clk->ops->disable(clk);
85 spin_unlock_irqrestore(&clocks_lock, flags);
86 }
Russell King97d654f2006-03-15 15:54:37 +000087}
Russell King5e1dbdb42008-11-08 20:48:27 +000088EXPORT_SYMBOL(clk_disable);
89
Jett.Zhou4a8f8342011-11-30 14:32:36 +080090const struct clkops clk_gpio27_ops = {
91 .enable = clk_gpio27_enable,
92 .disable = clk_gpio27_disable,
93};
94
95static DEFINE_CLK(gpio27, &clk_gpio27_ops);
96
97static struct clk_lookup sa11xx_clkregs[] = {
98 CLKDEV_INIT("sa1111.0", NULL, &clk_gpio27),
99 CLKDEV_INIT("sa1100-rtc", NULL, NULL),
100};
101
102static int __init sa11xx_clk_init(void)
Russell King5e1dbdb42008-11-08 20:48:27 +0000103{
Jett.Zhou4a8f8342011-11-30 14:32:36 +0800104 clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
105 return 0;
Russell King5e1dbdb42008-11-08 20:48:27 +0000106}
Jett.Zhou4a8f8342011-11-30 14:32:36 +0800107core_initcall(sa11xx_clk_init);