blob: 5d7f73d60515effd80861603cb183595ea7fbb85 [file] [log] [blame]
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +05301/* * CAAM control-plane driver backend
Kim Phillips8e8ec592011-03-13 16:54:26 +08002 * Controller-level driver, kernel property detection, initialization
3 *
Kim Phillips281922a2012-06-22 19:48:52 -05004 * Copyright 2008-2012 Freescale Semiconductor, Inc.
Kim Phillips8e8ec592011-03-13 16:54:26 +08005 */
6
Himangi Saraogi4776d382014-05-27 23:55:48 +05307#include <linux/device.h>
Rob Herring5af50732013-09-17 14:28:33 -05008#include <linux/of_address.h>
9#include <linux/of_irq.h>
10
Kim Phillips8e8ec592011-03-13 16:54:26 +080011#include "compat.h"
12#include "regs.h"
13#include "intern.h"
14#include "jr.h"
Kim Phillips281922a2012-06-22 19:48:52 -050015#include "desc_constr.h"
Baoyou Xie1ac6b732016-08-26 17:56:24 +080016#include "ctrl.h"
Kim Phillips8e8ec592011-03-13 16:54:26 +080017
Horia Geantă261ea052016-05-19 18:11:26 +030018bool caam_little_end;
19EXPORT_SYMBOL(caam_little_end);
20
Kim Phillips281922a2012-06-22 19:48:52 -050021/*
Horia Geant?6c3af952015-08-17 15:24:10 +030022 * i.MX targets tend to have clock control subsystems that can
Victoria Milhoan24821c42015-08-05 11:28:37 -070023 * enable/disable clocking to our device.
24 */
Horia Geant?6c3af952015-08-17 15:24:10 +030025#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_IMX
Victoria Milhoan24821c42015-08-05 11:28:37 -070026static inline struct clk *caam_drv_identify_clk(struct device *dev,
27 char *clk_name)
28{
29 return devm_clk_get(dev, clk_name);
30}
31#else
32static inline struct clk *caam_drv_identify_clk(struct device *dev,
33 char *clk_name)
34{
35 return NULL;
36}
37#endif
38
39/*
Kim Phillips281922a2012-06-22 19:48:52 -050040 * Descriptor to instantiate RNG State Handle 0 in normal mode and
41 * load the JDKEK, TDKEK and TDSK registers
42 */
Alex Porosanu1005bcc2013-09-09 18:56:34 +030043static void build_instantiation_desc(u32 *desc, int handle, int do_sk)
Kim Phillips281922a2012-06-22 19:48:52 -050044{
Alex Porosanu1005bcc2013-09-09 18:56:34 +030045 u32 *jump_cmd, op_flags;
Kim Phillips281922a2012-06-22 19:48:52 -050046
47 init_job_desc(desc, 0);
48
Alex Porosanu1005bcc2013-09-09 18:56:34 +030049 op_flags = OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
50 (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT;
51
Kim Phillips281922a2012-06-22 19:48:52 -050052 /* INIT RNG in non-test mode */
Alex Porosanu1005bcc2013-09-09 18:56:34 +030053 append_operation(desc, op_flags);
Kim Phillips281922a2012-06-22 19:48:52 -050054
Alex Porosanu1005bcc2013-09-09 18:56:34 +030055 if (!handle && do_sk) {
56 /*
57 * For SH0, Secure Keys must be generated as well
58 */
Kim Phillips281922a2012-06-22 19:48:52 -050059
Alex Porosanu1005bcc2013-09-09 18:56:34 +030060 /* wait for done */
61 jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1);
62 set_jump_tgt_here(desc, jump_cmd);
Kim Phillips281922a2012-06-22 19:48:52 -050063
Alex Porosanu1005bcc2013-09-09 18:56:34 +030064 /*
65 * load 1 to clear written reg:
66 * resets the done interrrupt and returns the RNG to idle.
67 */
68 append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW);
69
70 /* Initialize State Handle */
71 append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
72 OP_ALG_AAI_RNG4_SK);
73 }
Alex Porosanud5e4e992013-09-09 18:56:28 +030074
75 append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
Kim Phillips281922a2012-06-22 19:48:52 -050076}
77
Alex Porosanub1f996e02013-09-09 18:56:32 +030078/* Descriptor for deinstantiation of State Handle 0 of the RNG block. */
Alex Porosanu1005bcc2013-09-09 18:56:34 +030079static void build_deinstantiation_desc(u32 *desc, int handle)
Alex Porosanub1f996e02013-09-09 18:56:32 +030080{
81 init_job_desc(desc, 0);
82
83 /* Uninstantiate State Handle 0 */
84 append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
Alex Porosanu1005bcc2013-09-09 18:56:34 +030085 (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INITFINAL);
Alex Porosanub1f996e02013-09-09 18:56:32 +030086
87 append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
88}
Alex Porosanu04cddbf2013-09-09 18:56:31 +030089
90/*
91 * run_descriptor_deco0 - runs a descriptor on DECO0, under direct control of
92 * the software (no JR/QI used).
93 * @ctrldev - pointer to device
Alex Porosanu1005bcc2013-09-09 18:56:34 +030094 * @status - descriptor status, after being run
95 *
Alex Porosanu04cddbf2013-09-09 18:56:31 +030096 * Return: - 0 if no error occurred
97 * - -ENODEV if the DECO couldn't be acquired
98 * - -EAGAIN if an error occurred while executing the descriptor
99 */
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300100static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
101 u32 *status)
Kim Phillips281922a2012-06-22 19:48:52 -0500102{
Ruchika Gupta997ad292013-07-04 11:26:03 +0530103 struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530104 struct caam_ctrl __iomem *ctrl = ctrlpriv->ctrl;
105 struct caam_deco __iomem *deco = ctrlpriv->deco;
Ruchika Gupta997ad292013-07-04 11:26:03 +0530106 unsigned int timeout = 100000;
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300107 u32 deco_dbg_reg, flags;
Alex Porosanub1f996e02013-09-09 18:56:32 +0300108 int i;
Ruchika Gupta997ad292013-07-04 11:26:03 +0530109
Ruchika Gupta17157c92014-06-23 17:42:33 +0530110
Horia Geanta8f1da7b2014-07-21 16:03:21 +0300111 if (ctrlpriv->virt_en == 1) {
Horia Geantă261ea052016-05-19 18:11:26 +0300112 clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);
Ruchika Gupta17157c92014-06-23 17:42:33 +0530113
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530114 while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
Horia Geanta8f1da7b2014-07-21 16:03:21 +0300115 --timeout)
116 cpu_relax();
117
118 timeout = 100000;
119 }
Ruchika Gupta17157c92014-06-23 17:42:33 +0530120
Horia Geantă261ea052016-05-19 18:11:26 +0300121 clrsetbits_32(&ctrl->deco_rq, 0, DECORR_RQD0ENABLE);
Ruchika Gupta997ad292013-07-04 11:26:03 +0530122
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530123 while (!(rd_reg32(&ctrl->deco_rq) & DECORR_DEN0) &&
Ruchika Gupta997ad292013-07-04 11:26:03 +0530124 --timeout)
125 cpu_relax();
126
127 if (!timeout) {
128 dev_err(ctrldev, "failed to acquire DECO 0\n");
Horia Geantă261ea052016-05-19 18:11:26 +0300129 clrsetbits_32(&ctrl->deco_rq, DECORR_RQD0ENABLE, 0);
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300130 return -ENODEV;
Kim Phillips281922a2012-06-22 19:48:52 -0500131 }
132
Ruchika Gupta997ad292013-07-04 11:26:03 +0530133 for (i = 0; i < desc_len(desc); i++)
Horia Geantă261ea052016-05-19 18:11:26 +0300134 wr_reg32(&deco->descbuf[i], caam32_to_cpu(*(desc + i)));
Kim Phillips281922a2012-06-22 19:48:52 -0500135
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300136 flags = DECO_JQCR_WHL;
137 /*
138 * If the descriptor length is longer than 4 words, then the
139 * FOUR bit in JRCTRL register must be set.
140 */
141 if (desc_len(desc) >= 4)
142 flags |= DECO_JQCR_FOUR;
143
144 /* Instruct the DECO to execute it */
Horia Geantă261ea052016-05-19 18:11:26 +0300145 clrsetbits_32(&deco->jr_ctl_hi, 0, flags);
Ruchika Gupta997ad292013-07-04 11:26:03 +0530146
147 timeout = 10000000;
Alex Porosanu84cf4822013-09-09 18:56:30 +0300148 do {
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530149 deco_dbg_reg = rd_reg32(&deco->desc_dbg);
Alex Porosanu84cf4822013-09-09 18:56:30 +0300150 /*
151 * If an error occured in the descriptor, then
152 * the DECO status field will be set to 0x0D
153 */
154 if ((deco_dbg_reg & DESC_DBG_DECO_STAT_MASK) ==
155 DESC_DBG_DECO_STAT_HOST_ERR)
156 break;
Ruchika Gupta997ad292013-07-04 11:26:03 +0530157 cpu_relax();
Alex Porosanu84cf4822013-09-09 18:56:30 +0300158 } while ((deco_dbg_reg & DESC_DBG_DECO_STAT_VALID) && --timeout);
Ruchika Gupta997ad292013-07-04 11:26:03 +0530159
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530160 *status = rd_reg32(&deco->op_status_hi) &
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300161 DECO_OP_STATUS_HI_ERR_MASK;
162
Ruchika Gupta17157c92014-06-23 17:42:33 +0530163 if (ctrlpriv->virt_en == 1)
Horia Geantă261ea052016-05-19 18:11:26 +0300164 clrsetbits_32(&ctrl->deco_rsr, DECORSR_JR0, 0);
Ruchika Gupta17157c92014-06-23 17:42:33 +0530165
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300166 /* Mark the DECO as free */
Horia Geantă261ea052016-05-19 18:11:26 +0300167 clrsetbits_32(&ctrl->deco_rq, DECORR_RQD0ENABLE, 0);
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300168
169 if (!timeout)
170 return -EAGAIN;
171
172 return 0;
173}
174
175/*
176 * instantiate_rng - builds and executes a descriptor on DECO0,
177 * which initializes the RNG block.
178 * @ctrldev - pointer to device
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300179 * @state_handle_mask - bitmask containing the instantiation status
180 * for the RNG4 state handles which exist in
181 * the RNG4 block: 1 if it's been instantiated
182 * by an external entry, 0 otherwise.
183 * @gen_sk - generate data to be loaded into the JDKEK, TDKEK and TDSK;
184 * Caution: this can be done only once; if the keys need to be
185 * regenerated, a POR is required
186 *
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300187 * Return: - 0 if no error occurred
188 * - -ENOMEM if there isn't enough memory to allocate the descriptor
189 * - -ENODEV if DECO0 couldn't be acquired
190 * - -EAGAIN if an error occurred when executing the descriptor
191 * f.i. there was a RNG hardware error due to not "good enough"
192 * entropy being aquired.
193 */
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300194static int instantiate_rng(struct device *ctrldev, int state_handle_mask,
195 int gen_sk)
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300196{
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300197 struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530198 struct caam_ctrl __iomem *ctrl;
Horia Geant?62743a42015-07-17 16:54:53 +0300199 u32 *desc, status = 0, rdsta_val;
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300200 int ret = 0, sh_idx;
201
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530202 ctrl = (struct caam_ctrl __iomem *)ctrlpriv->ctrl;
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300203 desc = kmalloc(CAAM_CMD_SZ * 7, GFP_KERNEL);
204 if (!desc)
205 return -ENOMEM;
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300206
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300207 for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
208 /*
209 * If the corresponding bit is set, this state handle
210 * was initialized by somebody else, so it's left alone.
211 */
212 if ((1 << sh_idx) & state_handle_mask)
213 continue;
214
215 /* Create the descriptor for instantiating RNG State Handle */
216 build_instantiation_desc(desc, sh_idx, gen_sk);
217
218 /* Try to run it through DECO0 */
219 ret = run_descriptor_deco0(ctrldev, desc, &status);
220
221 /*
222 * If ret is not 0, or descriptor status is not 0, then
223 * something went wrong. No need to try the next state
224 * handle (if available), bail out here.
225 * Also, if for some reason, the State Handle didn't get
226 * instantiated although the descriptor has finished
227 * without any error (HW optimizations for later
228 * CAAM eras), then try again.
229 */
Cristian Stoica467707b2015-01-21 11:53:31 +0200230 rdsta_val = rd_reg32(&ctrl->r4tst[0].rdsta) & RDSTA_IFMASK;
Horia Geant?62743a42015-07-17 16:54:53 +0300231 if ((status && status != JRSTA_SSRC_JUMP_HALT_CC) ||
232 !(rdsta_val & (1 << sh_idx)))
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300233 ret = -EAGAIN;
234 if (ret)
235 break;
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300236 dev_info(ctrldev, "Instantiated RNG4 SH%d\n", sh_idx);
237 /* Clear the contents before recreating the descriptor */
238 memset(desc, 0x00, CAAM_CMD_SZ * 7);
Ruchika Gupta997ad292013-07-04 11:26:03 +0530239 }
240
Kim Phillips281922a2012-06-22 19:48:52 -0500241 kfree(desc);
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300242
Kim Phillips281922a2012-06-22 19:48:52 -0500243 return ret;
244}
245
246/*
Alex Porosanub1f996e02013-09-09 18:56:32 +0300247 * deinstantiate_rng - builds and executes a descriptor on DECO0,
248 * which deinitializes the RNG block.
249 * @ctrldev - pointer to device
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300250 * @state_handle_mask - bitmask containing the instantiation status
251 * for the RNG4 state handles which exist in
252 * the RNG4 block: 1 if it's been instantiated
Alex Porosanub1f996e02013-09-09 18:56:32 +0300253 *
254 * Return: - 0 if no error occurred
255 * - -ENOMEM if there isn't enough memory to allocate the descriptor
256 * - -ENODEV if DECO0 couldn't be acquired
257 * - -EAGAIN if an error occurred when executing the descriptor
Kim Phillips281922a2012-06-22 19:48:52 -0500258 */
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300259static int deinstantiate_rng(struct device *ctrldev, int state_handle_mask)
Alex Porosanub1f996e02013-09-09 18:56:32 +0300260{
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300261 u32 *desc, status;
262 int sh_idx, ret = 0;
Alex Porosanub1f996e02013-09-09 18:56:32 +0300263
264 desc = kmalloc(CAAM_CMD_SZ * 3, GFP_KERNEL);
265 if (!desc)
266 return -ENOMEM;
267
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300268 for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
269 /*
270 * If the corresponding bit is set, then it means the state
271 * handle was initialized by us, and thus it needs to be
Masahiro Yamada1cce2002017-02-27 14:29:45 -0800272 * deinitialized as well
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300273 */
274 if ((1 << sh_idx) & state_handle_mask) {
275 /*
276 * Create the descriptor for deinstantating this state
277 * handle
278 */
279 build_deinstantiation_desc(desc, sh_idx);
Alex Porosanub1f996e02013-09-09 18:56:32 +0300280
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300281 /* Try to run it through DECO0 */
282 ret = run_descriptor_deco0(ctrldev, desc, &status);
Alex Porosanub1f996e02013-09-09 18:56:32 +0300283
Horia Geantă40c98cb2017-04-05 11:41:03 +0300284 if (ret ||
285 (status && status != JRSTA_SSRC_JUMP_HALT_CC)) {
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300286 dev_err(ctrldev,
287 "Failed to deinstantiate RNG4 SH%d\n",
288 sh_idx);
289 break;
290 }
291 dev_info(ctrldev, "Deinstantiated RNG4 SH%d\n", sh_idx);
292 }
293 }
Alex Porosanub1f996e02013-09-09 18:56:32 +0300294
295 kfree(desc);
296
297 return ret;
298}
299
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300300static int caam_remove(struct platform_device *pdev)
301{
302 struct device *ctrldev;
303 struct caam_drv_private *ctrlpriv;
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530304 struct caam_ctrl __iomem *ctrl;
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300305
306 ctrldev = &pdev->dev;
307 ctrlpriv = dev_get_drvdata(ctrldev);
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530308 ctrl = (struct caam_ctrl __iomem *)ctrlpriv->ctrl;
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300309
Horia Geantăec360602017-04-03 18:12:04 +0300310 /* Remove platform devices under the crypto node */
311 of_platform_depopulate(ctrldev);
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300312
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300313 /* De-initialize RNG state handles initialized by this driver. */
314 if (ctrlpriv->rng4_sh_init)
315 deinstantiate_rng(ctrldev, ctrlpriv->rng4_sh_init);
Alex Porosanub1f996e02013-09-09 18:56:32 +0300316
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300317 /* Shut down debug views */
318#ifdef CONFIG_DEBUG_FS
319 debugfs_remove_recursive(ctrlpriv->dfs_root);
320#endif
321
322 /* Unmap controller region */
Victoria Milhoanf4ec6aa2015-06-15 16:52:58 -0700323 iounmap(ctrl);
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300324
Victoria Milhoan24821c42015-08-05 11:28:37 -0700325 /* shut clocks off before finalizing shutdown */
326 clk_disable_unprepare(ctrlpriv->caam_ipg);
327 clk_disable_unprepare(ctrlpriv->caam_mem);
328 clk_disable_unprepare(ctrlpriv->caam_aclk);
Marcus Folkessonb80609a2016-11-28 12:53:28 -0500329 if (ctrlpriv->caam_emi_slow)
Marcus Folkesson4e518812016-10-17 13:28:00 +0200330 clk_disable_unprepare(ctrlpriv->caam_emi_slow);
Fabio Estevame5580172015-08-12 14:39:38 -0300331 return 0;
Kim Phillips281922a2012-06-22 19:48:52 -0500332}
333
334/*
Alex Porosanu84cf4822013-09-09 18:56:30 +0300335 * kick_trng - sets the various parameters for enabling the initialization
336 * of the RNG4 block in CAAM
337 * @pdev - pointer to the platform device
338 * @ent_delay - Defines the length (in system clocks) of each entropy sample.
Kim Phillips281922a2012-06-22 19:48:52 -0500339 */
Alex Porosanu84cf4822013-09-09 18:56:30 +0300340static void kick_trng(struct platform_device *pdev, int ent_delay)
Kim Phillips281922a2012-06-22 19:48:52 -0500341{
342 struct device *ctrldev = &pdev->dev;
343 struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530344 struct caam_ctrl __iomem *ctrl;
Kim Phillips281922a2012-06-22 19:48:52 -0500345 struct rng4tst __iomem *r4tst;
346 u32 val;
347
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530348 ctrl = (struct caam_ctrl __iomem *)ctrlpriv->ctrl;
349 r4tst = &ctrl->r4tst[0];
Kim Phillips281922a2012-06-22 19:48:52 -0500350
351 /* put RNG4 into program mode */
Horia Geantă261ea052016-05-19 18:11:26 +0300352 clrsetbits_32(&r4tst->rtmctl, 0, RTMCTL_PRGM);
Alex Porosanu84cf4822013-09-09 18:56:30 +0300353
354 /*
355 * Performance-wise, it does not make sense to
356 * set the delay to a value that is lower
357 * than the last one that worked (i.e. the state handles
358 * were instantiated properly. Thus, instead of wasting
359 * time trying to set the values controlling the sample
360 * frequency, the function simply returns.
361 */
362 val = (rd_reg32(&r4tst->rtsdctl) & RTSDCTL_ENT_DLY_MASK)
363 >> RTSDCTL_ENT_DLY_SHIFT;
Horia Geantă8439e942016-11-09 10:46:14 +0200364 if (ent_delay <= val)
365 goto start_rng;
Alex Porosanu84cf4822013-09-09 18:56:30 +0300366
Kim Phillips281922a2012-06-22 19:48:52 -0500367 val = rd_reg32(&r4tst->rtsdctl);
Alex Porosanu84cf4822013-09-09 18:56:30 +0300368 val = (val & ~RTSDCTL_ENT_DLY_MASK) |
369 (ent_delay << RTSDCTL_ENT_DLY_SHIFT);
Kim Phillips281922a2012-06-22 19:48:52 -0500370 wr_reg32(&r4tst->rtsdctl, val);
Alex Porosanu84cf4822013-09-09 18:56:30 +0300371 /* min. freq. count, equal to 1/4 of the entropy sample length */
372 wr_reg32(&r4tst->rtfrqmin, ent_delay >> 2);
Alex Porosanub061f3f2014-08-11 11:40:15 +0300373 /* disable maximum frequency count */
374 wr_reg32(&r4tst->rtfrqmax, RTFRQMAX_DISABLE);
Alex Porosanue5ffbfc2014-08-11 11:40:17 +0300375 /* read the control register */
376 val = rd_reg32(&r4tst->rtmctl);
Horia Geantă8439e942016-11-09 10:46:14 +0200377start_rng:
Alex Porosanue5ffbfc2014-08-11 11:40:17 +0300378 /*
379 * select raw sampling in both entropy shifter
Horia Geantă8439e942016-11-09 10:46:14 +0200380 * and statistical checker; ; put RNG4 into run mode
Alex Porosanue5ffbfc2014-08-11 11:40:17 +0300381 */
Horia Geantă8439e942016-11-09 10:46:14 +0200382 clrsetbits_32(&r4tst->rtmctl, RTMCTL_PRGM, RTMCTL_SAMP_MODE_RAW_ES_SC);
Kim Phillips281922a2012-06-22 19:48:52 -0500383}
384
Alex Porosanu82c2f962012-07-11 11:06:11 +0800385/**
386 * caam_get_era() - Return the ERA of the SEC on SoC, based
Alex Porosanu883619a2014-02-06 10:27:19 +0200387 * on "sec-era" propery in the DTS. This property is updated by u-boot.
Alex Porosanu82c2f962012-07-11 11:06:11 +0800388 **/
Alex Porosanu883619a2014-02-06 10:27:19 +0200389int caam_get_era(void)
Alex Porosanu82c2f962012-07-11 11:06:11 +0800390{
Alex Porosanu883619a2014-02-06 10:27:19 +0200391 struct device_node *caam_node;
Alex Porosanue27513e2015-07-17 16:54:51 +0300392 int ret;
393 u32 prop;
Alex Porosanu82c2f962012-07-11 11:06:11 +0800394
Alex Porosanue27513e2015-07-17 16:54:51 +0300395 caam_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
396 ret = of_property_read_u32(caam_node, "fsl,sec-era", &prop);
397 of_node_put(caam_node);
398
Arnd Bergmann287980e2016-05-27 23:23:25 +0200399 return ret ? -ENOTSUPP : prop;
Alex Porosanu82c2f962012-07-11 11:06:11 +0800400}
401EXPORT_SYMBOL(caam_get_era);
402
Horia Geantă261ea052016-05-19 18:11:26 +0300403#ifdef CONFIG_DEBUG_FS
404static int caam_debugfs_u64_get(void *data, u64 *val)
405{
406 *val = caam64_to_cpu(*(u64 *)data);
407 return 0;
408}
409
410static int caam_debugfs_u32_get(void *data, u64 *val)
411{
412 *val = caam32_to_cpu(*(u32 *)data);
413 return 0;
414}
415
416DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u32_ro, caam_debugfs_u32_get, NULL, "%llu\n");
417DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u64_ro, caam_debugfs_u64_get, NULL, "%llu\n");
418#endif
419
Horia Geantăec360602017-04-03 18:12:04 +0300420static const struct of_device_id caam_match[] = {
421 {
422 .compatible = "fsl,sec-v4.0",
423 },
424 {
425 .compatible = "fsl,sec4.0",
426 },
427 {},
428};
429MODULE_DEVICE_TABLE(of, caam_match);
430
Kim Phillips8e8ec592011-03-13 16:54:26 +0800431/* Probe routine for CAAM top (controller) level */
Kim Phillips2930d492011-05-14 22:07:55 -0500432static int caam_probe(struct platform_device *pdev)
Kim Phillips8e8ec592011-03-13 16:54:26 +0800433{
Horia Geantăec360602017-04-03 18:12:04 +0300434 int ret, ring, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN;
Alex Porosanu82c2f962012-07-11 11:06:11 +0800435 u64 caam_id;
Kim Phillips8e8ec592011-03-13 16:54:26 +0800436 struct device *dev;
437 struct device_node *nprop, *np;
438 struct caam_ctrl __iomem *ctrl;
Kim Phillips8e8ec592011-03-13 16:54:26 +0800439 struct caam_drv_private *ctrlpriv;
Victoria Milhoan24821c42015-08-05 11:28:37 -0700440 struct clk *clk;
Kim Phillips23457bc2011-06-05 16:42:54 -0500441#ifdef CONFIG_DEBUG_FS
442 struct caam_perfmon *perfmon;
443#endif
Ruchika Gupta17157c92014-06-23 17:42:33 +0530444 u32 scfgr, comp_params;
Ruchika Guptaeb1139c2014-06-23 15:08:28 +0530445 u32 cha_vid_ls;
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530446 int pg_size;
447 int BLOCK_OFFSET = 0;
Kim Phillips8e8ec592011-03-13 16:54:26 +0800448
Fabio Estevam9c4f9732015-08-21 13:52:00 -0300449 ctrlpriv = devm_kzalloc(&pdev->dev, sizeof(*ctrlpriv), GFP_KERNEL);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800450 if (!ctrlpriv)
451 return -ENOMEM;
452
453 dev = &pdev->dev;
454 dev_set_drvdata(dev, ctrlpriv);
455 ctrlpriv->pdev = pdev;
456 nprop = pdev->dev.of_node;
457
Victoria Milhoan24821c42015-08-05 11:28:37 -0700458 /* Enable clocking */
459 clk = caam_drv_identify_clk(&pdev->dev, "ipg");
460 if (IS_ERR(clk)) {
461 ret = PTR_ERR(clk);
462 dev_err(&pdev->dev,
463 "can't identify CAAM ipg clk: %d\n", ret);
Fabio Estevama3c09552015-08-21 13:51:59 -0300464 return ret;
Victoria Milhoan24821c42015-08-05 11:28:37 -0700465 }
466 ctrlpriv->caam_ipg = clk;
467
468 clk = caam_drv_identify_clk(&pdev->dev, "mem");
469 if (IS_ERR(clk)) {
470 ret = PTR_ERR(clk);
471 dev_err(&pdev->dev,
472 "can't identify CAAM mem clk: %d\n", ret);
Fabio Estevama3c09552015-08-21 13:51:59 -0300473 return ret;
Victoria Milhoan24821c42015-08-05 11:28:37 -0700474 }
475 ctrlpriv->caam_mem = clk;
476
477 clk = caam_drv_identify_clk(&pdev->dev, "aclk");
478 if (IS_ERR(clk)) {
479 ret = PTR_ERR(clk);
480 dev_err(&pdev->dev,
481 "can't identify CAAM aclk clk: %d\n", ret);
Fabio Estevama3c09552015-08-21 13:51:59 -0300482 return ret;
Victoria Milhoan24821c42015-08-05 11:28:37 -0700483 }
484 ctrlpriv->caam_aclk = clk;
485
Marcus Folkesson4e518812016-10-17 13:28:00 +0200486 if (!of_machine_is_compatible("fsl,imx6ul")) {
487 clk = caam_drv_identify_clk(&pdev->dev, "emi_slow");
488 if (IS_ERR(clk)) {
489 ret = PTR_ERR(clk);
490 dev_err(&pdev->dev,
491 "can't identify CAAM emi_slow clk: %d\n", ret);
492 return ret;
493 }
494 ctrlpriv->caam_emi_slow = clk;
Victoria Milhoan24821c42015-08-05 11:28:37 -0700495 }
Victoria Milhoan24821c42015-08-05 11:28:37 -0700496
497 ret = clk_prepare_enable(ctrlpriv->caam_ipg);
498 if (ret < 0) {
499 dev_err(&pdev->dev, "can't enable CAAM ipg clock: %d\n", ret);
Fabio Estevam31f44d12015-08-21 13:51:58 -0300500 return ret;
Victoria Milhoan24821c42015-08-05 11:28:37 -0700501 }
502
503 ret = clk_prepare_enable(ctrlpriv->caam_mem);
504 if (ret < 0) {
505 dev_err(&pdev->dev, "can't enable CAAM secure mem clock: %d\n",
506 ret);
Fabio Estevam31f44d12015-08-21 13:51:58 -0300507 goto disable_caam_ipg;
Victoria Milhoan24821c42015-08-05 11:28:37 -0700508 }
509
510 ret = clk_prepare_enable(ctrlpriv->caam_aclk);
511 if (ret < 0) {
512 dev_err(&pdev->dev, "can't enable CAAM aclk clock: %d\n", ret);
Fabio Estevam31f44d12015-08-21 13:51:58 -0300513 goto disable_caam_mem;
Victoria Milhoan24821c42015-08-05 11:28:37 -0700514 }
515
Marcus Folkessonb80609a2016-11-28 12:53:28 -0500516 if (ctrlpriv->caam_emi_slow) {
Marcus Folkesson4e518812016-10-17 13:28:00 +0200517 ret = clk_prepare_enable(ctrlpriv->caam_emi_slow);
518 if (ret < 0) {
519 dev_err(&pdev->dev, "can't enable CAAM emi slow clock: %d\n",
520 ret);
521 goto disable_caam_aclk;
522 }
Victoria Milhoan24821c42015-08-05 11:28:37 -0700523 }
524
Kim Phillips8e8ec592011-03-13 16:54:26 +0800525 /* Get configuration properties from device tree */
526 /* First, get register page */
527 ctrl = of_iomap(nprop, 0);
528 if (ctrl == NULL) {
529 dev_err(dev, "caam: of_iomap() failed\n");
Fabio Estevam31f44d12015-08-21 13:51:58 -0300530 ret = -ENOMEM;
531 goto disable_caam_emi_slow;
Kim Phillips8e8ec592011-03-13 16:54:26 +0800532 }
Horia Geantă261ea052016-05-19 18:11:26 +0300533
534 caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) &
535 (CSTA_PLEND | CSTA_ALT_PLEND));
536
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530537 /* Finding the page size for using the CTPR_MS register */
538 comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms);
539 pg_size = (comp_params & CTPR_MS_PG_SZ_MASK) >> CTPR_MS_PG_SZ_SHIFT;
Kim Phillips8e8ec592011-03-13 16:54:26 +0800540
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530541 /* Allocating the BLOCK_OFFSET based on the supported page size on
542 * the platform
543 */
544 if (pg_size == 0)
545 BLOCK_OFFSET = PG_SIZE_4K;
546 else
547 BLOCK_OFFSET = PG_SIZE_64K;
548
Horia Geantă8439e942016-11-09 10:46:14 +0200549 ctrlpriv->ctrl = (struct caam_ctrl __iomem __force *)ctrl;
550 ctrlpriv->assure = (struct caam_assurance __iomem __force *)
551 ((__force uint8_t *)ctrl +
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530552 BLOCK_OFFSET * ASSURE_BLOCK_NUMBER
553 );
Horia Geantă8439e942016-11-09 10:46:14 +0200554 ctrlpriv->deco = (struct caam_deco __iomem __force *)
555 ((__force uint8_t *)ctrl +
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530556 BLOCK_OFFSET * DECO_BLOCK_NUMBER
557 );
Kim Phillips8e8ec592011-03-13 16:54:26 +0800558
559 /* Get the IRQ of the controller (for security violations only) */
Thierry Redingf7578492013-09-18 15:24:44 +0200560 ctrlpriv->secvio_irq = irq_of_parse_and_map(nprop, 0);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800561
562 /*
563 * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
Kim Phillipse13af182012-06-22 19:48:51 -0500564 * long pointers in master configuration register
Kim Phillips8e8ec592011-03-13 16:54:26 +0800565 */
Horia Geantă39eaf752016-12-05 11:06:58 +0200566 clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK | MCFGR_LONG_PTR,
567 MCFGR_AWCACHE_CACH | MCFGR_AWCACHE_BUFF |
568 MCFGR_WDENABLE | MCFGR_LARGE_BURST |
Horia Geant?e7a71042016-01-12 17:59:29 +0200569 (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
Kim Phillips8e8ec592011-03-13 16:54:26 +0800570
Ruchika Gupta17157c92014-06-23 17:42:33 +0530571 /*
572 * Read the Compile Time paramters and SCFGR to determine
573 * if Virtualization is enabled for this platform
574 */
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530575 scfgr = rd_reg32(&ctrl->scfgr);
Ruchika Gupta17157c92014-06-23 17:42:33 +0530576
577 ctrlpriv->virt_en = 0;
578 if (comp_params & CTPR_MS_VIRT_EN_INCL) {
579 /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or
580 * VIRT_EN_INCL = 1 & VIRT_EN_POR = 0 & SCFGR_VIRT_EN = 1
581 */
582 if ((comp_params & CTPR_MS_VIRT_EN_POR) ||
583 (!(comp_params & CTPR_MS_VIRT_EN_POR) &&
584 (scfgr & SCFGR_VIRT_EN)))
585 ctrlpriv->virt_en = 1;
586 } else {
587 /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */
588 if (comp_params & CTPR_MS_VIRT_EN_POR)
589 ctrlpriv->virt_en = 1;
590 }
591
592 if (ctrlpriv->virt_en == 1)
Horia Geantă261ea052016-05-19 18:11:26 +0300593 clrsetbits_32(&ctrl->jrstart, 0, JRSTART_JR0_START |
594 JRSTART_JR1_START | JRSTART_JR2_START |
595 JRSTART_JR3_START);
Ruchika Gupta17157c92014-06-23 17:42:33 +0530596
Horia Geantăb3b5fce2017-02-10 14:07:15 +0200597 if (sizeof(dma_addr_t) == sizeof(u64)) {
Kim Phillipse13af182012-06-22 19:48:51 -0500598 if (of_device_is_compatible(nprop, "fsl,sec-v5.0"))
Horia Geantăb3b5fce2017-02-10 14:07:15 +0200599 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
Kim Phillipse13af182012-06-22 19:48:51 -0500600 else
Horia Geantăb3b5fce2017-02-10 14:07:15 +0200601 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(36));
602 } else {
603 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
604 }
605 if (ret) {
606 dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n", ret);
607 goto iounmap_ctrl;
608 }
Kim Phillips8e8ec592011-03-13 16:54:26 +0800609
Horia Geantăec360602017-04-03 18:12:04 +0300610 ret = of_platform_populate(nprop, caam_match, NULL, dev);
611 if (ret) {
612 dev_err(dev, "JR platform devices creation error\n");
Fabio Estevam31f44d12015-08-21 13:51:58 -0300613 goto iounmap_ctrl;
Kim Phillips8e8ec592011-03-13 16:54:26 +0800614 }
615
616 ring = 0;
Nitesh Lal0a63b092014-02-09 09:59:13 +0800617 for_each_available_child_of_node(nprop, np)
618 if (of_device_is_compatible(np, "fsl,sec-v4.0-job-ring") ||
619 of_device_is_compatible(np, "fsl,sec4.0-job-ring")) {
Horia Geantă8439e942016-11-09 10:46:14 +0200620 ctrlpriv->jr[ring] = (struct caam_job_ring __iomem __force *)
621 ((__force uint8_t *)ctrl +
Horia Geantăec360602017-04-03 18:12:04 +0300622 (ring + JR_BLOCK_NUMBER) *
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530623 BLOCK_OFFSET
624 );
Shengzhou Liua0ea0f62012-03-21 14:09:10 +0800625 ctrlpriv->total_jobrs++;
626 ring++;
Horia Geantăec360602017-04-03 18:12:04 +0300627 }
Kim Phillips8e8ec592011-03-13 16:54:26 +0800628
629 /* Check to see if QI present. If so, enable */
Ruchika Guptaeb1139c2014-06-23 15:08:28 +0530630 ctrlpriv->qi_present =
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530631 !!(rd_reg32(&ctrl->perfmon.comp_parms_ms) &
Ruchika Guptaeb1139c2014-06-23 15:08:28 +0530632 CTPR_MS_QI_MASK);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800633 if (ctrlpriv->qi_present) {
Horia Geantă8439e942016-11-09 10:46:14 +0200634 ctrlpriv->qi = (struct caam_queue_if __iomem __force *)
635 ((__force uint8_t *)ctrl +
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530636 BLOCK_OFFSET * QI_BLOCK_NUMBER
637 );
Kim Phillips8e8ec592011-03-13 16:54:26 +0800638 /* This is all that's required to physically enable QI */
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530639 wr_reg32(&ctrlpriv->qi->qi_control_lo, QICTL_DQEN);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800640 }
641
642 /* If no QI and no rings specified, quit and go home */
643 if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
644 dev_err(dev, "no queues configured, terminating\n");
Fabio Estevam31f44d12015-08-21 13:51:58 -0300645 ret = -ENOMEM;
646 goto caam_remove;
Kim Phillips8e8ec592011-03-13 16:54:26 +0800647 }
648
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530649 cha_vid_ls = rd_reg32(&ctrl->perfmon.cha_id_ls);
Ruchika Gupta986dfbc2013-04-26 15:44:54 +0530650
Kim Phillips281922a2012-06-22 19:48:52 -0500651 /*
Ruchika Gupta986dfbc2013-04-26 15:44:54 +0530652 * If SEC has RNG version >= 4 and RNG state handle has not been
Alex Porosanu84cf4822013-09-09 18:56:30 +0300653 * already instantiated, do RNG instantiation
Kim Phillips281922a2012-06-22 19:48:52 -0500654 */
Ruchika Guptaeb1139c2014-06-23 15:08:28 +0530655 if ((cha_vid_ls & CHA_ID_LS_RNG_MASK) >> CHA_ID_LS_RNG_SHIFT >= 4) {
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300656 ctrlpriv->rng4_sh_init =
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530657 rd_reg32(&ctrl->r4tst[0].rdsta);
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300658 /*
659 * If the secure keys (TDKEK, JDKEK, TDSK), were already
660 * generated, signal this to the function that is instantiating
661 * the state handles. An error would occur if RNG4 attempts
662 * to regenerate these keys before the next POR.
663 */
664 gen_sk = ctrlpriv->rng4_sh_init & RDSTA_SKVN ? 0 : 1;
665 ctrlpriv->rng4_sh_init &= RDSTA_IFMASK;
Alex Porosanu84cf4822013-09-09 18:56:30 +0300666 do {
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300667 int inst_handles =
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530668 rd_reg32(&ctrl->r4tst[0].rdsta) &
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300669 RDSTA_IFMASK;
670 /*
671 * If either SH were instantiated by somebody else
672 * (e.g. u-boot) then it is assumed that the entropy
673 * parameters are properly set and thus the function
674 * setting these (kick_trng(...)) is skipped.
675 * Also, if a handle was instantiated, do not change
676 * the TRNG parameters.
677 */
678 if (!(ctrlpriv->rng4_sh_init || inst_handles)) {
Alex Porosanueeaa1722014-08-11 11:40:16 +0300679 dev_info(dev,
680 "Entropy delay = %u\n",
681 ent_delay);
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300682 kick_trng(pdev, ent_delay);
683 ent_delay += 400;
684 }
685 /*
686 * if instantiate_rng(...) fails, the loop will rerun
687 * and the kick_trng(...) function will modfiy the
688 * upper and lower limits of the entropy sampling
689 * interval, leading to a sucessful initialization of
690 * the RNG.
691 */
692 ret = instantiate_rng(dev, inst_handles,
693 gen_sk);
Alex Porosanueeaa1722014-08-11 11:40:16 +0300694 if (ret == -EAGAIN)
695 /*
696 * if here, the loop will rerun,
697 * so don't hog the CPU
698 */
699 cpu_relax();
Alex Porosanu04cddbf2013-09-09 18:56:31 +0300700 } while ((ret == -EAGAIN) && (ent_delay < RTSDCTL_ENT_DLY_MAX));
Kim Phillips281922a2012-06-22 19:48:52 -0500701 if (ret) {
Alex Porosanu84cf4822013-09-09 18:56:30 +0300702 dev_err(dev, "failed to instantiate RNG");
Fabio Estevam31f44d12015-08-21 13:51:58 -0300703 goto caam_remove;
Kim Phillips281922a2012-06-22 19:48:52 -0500704 }
Alex Porosanu1005bcc2013-09-09 18:56:34 +0300705 /*
706 * Set handles init'ed by this module as the complement of the
707 * already initialized ones
708 */
709 ctrlpriv->rng4_sh_init = ~ctrlpriv->rng4_sh_init & RDSTA_IFMASK;
Vakul Garg575c1bd2013-03-12 13:55:21 +0530710
711 /* Enable RDB bit so that RNG works faster */
Horia Geantă261ea052016-05-19 18:11:26 +0300712 clrsetbits_32(&ctrl->scfgr, 0, SCFGR_RDBENABLE);
Kim Phillips281922a2012-06-22 19:48:52 -0500713 }
714
Kim Phillips8e8ec592011-03-13 16:54:26 +0800715 /* NOTE: RTIC detection ought to go here, around Si time */
716
Nitesh Narayan Lalfb4562b2014-09-01 15:00:44 +0530717 caam_id = (u64)rd_reg32(&ctrl->perfmon.caam_id_ms) << 32 |
718 (u64)rd_reg32(&ctrl->perfmon.caam_id_ls);
Alex Porosanu82c2f962012-07-11 11:06:11 +0800719
Kim Phillips8e8ec592011-03-13 16:54:26 +0800720 /* Report "alive" for developer to see */
Alex Porosanu82c2f962012-07-11 11:06:11 +0800721 dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
Alex Porosanu883619a2014-02-06 10:27:19 +0200722 caam_get_era());
Kim Phillips8e8ec592011-03-13 16:54:26 +0800723 dev_info(dev, "job rings = %d, qi = %d\n",
724 ctrlpriv->total_jobrs, ctrlpriv->qi_present);
725
726#ifdef CONFIG_DEBUG_FS
727 /*
728 * FIXME: needs better naming distinction, as some amalgamation of
729 * "caam" and nprop->full_name. The OF name isn't distinctive,
730 * but does separate instances
731 */
732 perfmon = (struct caam_perfmon __force *)&ctrl->perfmon;
733
Nitesh Narayan Lal178f8272014-07-01 19:54:54 +0530734 ctrlpriv->dfs_root = debugfs_create_dir(dev_name(dev), NULL);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800735 ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
736
737 /* Controller-level - performance monitor counters */
Horia Geantă261ea052016-05-19 18:11:26 +0300738
Kim Phillips8e8ec592011-03-13 16:54:26 +0800739 ctrlpriv->ctl_rq_dequeued =
Horia Geantă261ea052016-05-19 18:11:26 +0300740 debugfs_create_file("rq_dequeued",
741 S_IRUSR | S_IRGRP | S_IROTH,
742 ctrlpriv->ctl, &perfmon->req_dequeued,
743 &caam_fops_u64_ro);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800744 ctrlpriv->ctl_ob_enc_req =
Horia Geantă261ea052016-05-19 18:11:26 +0300745 debugfs_create_file("ob_rq_encrypted",
746 S_IRUSR | S_IRGRP | S_IROTH,
747 ctrlpriv->ctl, &perfmon->ob_enc_req,
748 &caam_fops_u64_ro);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800749 ctrlpriv->ctl_ib_dec_req =
Horia Geantă261ea052016-05-19 18:11:26 +0300750 debugfs_create_file("ib_rq_decrypted",
751 S_IRUSR | S_IRGRP | S_IROTH,
752 ctrlpriv->ctl, &perfmon->ib_dec_req,
753 &caam_fops_u64_ro);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800754 ctrlpriv->ctl_ob_enc_bytes =
Horia Geantă261ea052016-05-19 18:11:26 +0300755 debugfs_create_file("ob_bytes_encrypted",
756 S_IRUSR | S_IRGRP | S_IROTH,
757 ctrlpriv->ctl, &perfmon->ob_enc_bytes,
758 &caam_fops_u64_ro);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800759 ctrlpriv->ctl_ob_prot_bytes =
Horia Geantă261ea052016-05-19 18:11:26 +0300760 debugfs_create_file("ob_bytes_protected",
761 S_IRUSR | S_IRGRP | S_IROTH,
762 ctrlpriv->ctl, &perfmon->ob_prot_bytes,
763 &caam_fops_u64_ro);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800764 ctrlpriv->ctl_ib_dec_bytes =
Horia Geantă261ea052016-05-19 18:11:26 +0300765 debugfs_create_file("ib_bytes_decrypted",
766 S_IRUSR | S_IRGRP | S_IROTH,
767 ctrlpriv->ctl, &perfmon->ib_dec_bytes,
768 &caam_fops_u64_ro);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800769 ctrlpriv->ctl_ib_valid_bytes =
Horia Geantă261ea052016-05-19 18:11:26 +0300770 debugfs_create_file("ib_bytes_validated",
771 S_IRUSR | S_IRGRP | S_IROTH,
772 ctrlpriv->ctl, &perfmon->ib_valid_bytes,
773 &caam_fops_u64_ro);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800774
775 /* Controller level - global status values */
776 ctrlpriv->ctl_faultaddr =
Horia Geantă261ea052016-05-19 18:11:26 +0300777 debugfs_create_file("fault_addr",
778 S_IRUSR | S_IRGRP | S_IROTH,
779 ctrlpriv->ctl, &perfmon->faultaddr,
780 &caam_fops_u32_ro);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800781 ctrlpriv->ctl_faultdetail =
Horia Geantă261ea052016-05-19 18:11:26 +0300782 debugfs_create_file("fault_detail",
783 S_IRUSR | S_IRGRP | S_IROTH,
784 ctrlpriv->ctl, &perfmon->faultdetail,
785 &caam_fops_u32_ro);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800786 ctrlpriv->ctl_faultstatus =
Horia Geantă261ea052016-05-19 18:11:26 +0300787 debugfs_create_file("fault_status",
788 S_IRUSR | S_IRGRP | S_IROTH,
789 ctrlpriv->ctl, &perfmon->status,
790 &caam_fops_u32_ro);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800791
792 /* Internal covering keys (useful in non-secure mode only) */
Horia Geantă8439e942016-11-09 10:46:14 +0200793 ctrlpriv->ctl_kek_wrap.data = (__force void *)&ctrlpriv->ctrl->kek[0];
Kim Phillips8e8ec592011-03-13 16:54:26 +0800794 ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
795 ctrlpriv->ctl_kek = debugfs_create_blob("kek",
Al Viroeda65cc2011-07-24 04:32:53 -0400796 S_IRUSR |
Kim Phillips8e8ec592011-03-13 16:54:26 +0800797 S_IRGRP | S_IROTH,
798 ctrlpriv->ctl,
799 &ctrlpriv->ctl_kek_wrap);
800
Horia Geantă8439e942016-11-09 10:46:14 +0200801 ctrlpriv->ctl_tkek_wrap.data = (__force void *)&ctrlpriv->ctrl->tkek[0];
Kim Phillips8e8ec592011-03-13 16:54:26 +0800802 ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
803 ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
Al Viroeda65cc2011-07-24 04:32:53 -0400804 S_IRUSR |
Kim Phillips8e8ec592011-03-13 16:54:26 +0800805 S_IRGRP | S_IROTH,
806 ctrlpriv->ctl,
807 &ctrlpriv->ctl_tkek_wrap);
808
Horia Geantă8439e942016-11-09 10:46:14 +0200809 ctrlpriv->ctl_tdsk_wrap.data = (__force void *)&ctrlpriv->ctrl->tdsk[0];
Kim Phillips8e8ec592011-03-13 16:54:26 +0800810 ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
811 ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
Al Viroeda65cc2011-07-24 04:32:53 -0400812 S_IRUSR |
Kim Phillips8e8ec592011-03-13 16:54:26 +0800813 S_IRGRP | S_IROTH,
814 ctrlpriv->ctl,
815 &ctrlpriv->ctl_tdsk_wrap);
816#endif
817 return 0;
Fabio Estevam31f44d12015-08-21 13:51:58 -0300818
819caam_remove:
820 caam_remove(pdev);
Russell Kingbdc67da2016-08-09 08:30:10 +0100821 return ret;
822
Fabio Estevam31f44d12015-08-21 13:51:58 -0300823iounmap_ctrl:
824 iounmap(ctrl);
825disable_caam_emi_slow:
Marcus Folkessonb80609a2016-11-28 12:53:28 -0500826 if (ctrlpriv->caam_emi_slow)
Marcus Folkesson4e518812016-10-17 13:28:00 +0200827 clk_disable_unprepare(ctrlpriv->caam_emi_slow);
Fabio Estevam31f44d12015-08-21 13:51:58 -0300828disable_caam_aclk:
829 clk_disable_unprepare(ctrlpriv->caam_aclk);
830disable_caam_mem:
831 clk_disable_unprepare(ctrlpriv->caam_mem);
832disable_caam_ipg:
833 clk_disable_unprepare(ctrlpriv->caam_ipg);
834 return ret;
Kim Phillips8e8ec592011-03-13 16:54:26 +0800835}
836
Kim Phillips2930d492011-05-14 22:07:55 -0500837static struct platform_driver caam_driver = {
Kim Phillips8e8ec592011-03-13 16:54:26 +0800838 .driver = {
839 .name = "caam",
Kim Phillips8e8ec592011-03-13 16:54:26 +0800840 .of_match_table = caam_match,
841 },
842 .probe = caam_probe,
Greg Kroah-Hartman49cfe4d2012-12-21 13:14:09 -0800843 .remove = caam_remove,
Kim Phillips8e8ec592011-03-13 16:54:26 +0800844};
845
Axel Lin741e8c22011-11-26 21:26:19 +0800846module_platform_driver(caam_driver);
Kim Phillips8e8ec592011-03-13 16:54:26 +0800847
848MODULE_LICENSE("GPL");
849MODULE_DESCRIPTION("FSL CAAM request backend");
850MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");