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Sam Ravnborg1d059952011-02-25 23:01:19 -08001#include <linux/platform_device.h>
2
David Howellsd550bbd2012-03-28 18:30:03 +01003#include <asm/cpu_type.h>
Al Viro32231a62007-07-21 19:18:57 -07004
Sam Ravnborg6baa9b22011-04-18 11:25:44 +00005struct irq_bucket {
6 struct irq_bucket *next;
7 unsigned int real_irq;
8 unsigned int irq;
9 unsigned int pil;
10};
11
Sam Ravnborg4ba22b12012-05-14 15:14:36 +020012#define SUN4M_HARD_INT(x) (0x000000001 << (x))
13#define SUN4M_SOFT_INT(x) (0x000010000 << (x))
14
Sam Ravnborg6baa9b22011-04-18 11:25:44 +000015#define SUN4D_MAX_BOARD 10
16#define SUN4D_MAX_IRQ ((SUN4D_MAX_BOARD + 2) << 5)
17
18/* Map between the irq identifier used in hw to the
19 * irq_bucket. The map is sufficient large to hold
20 * the sun4d hw identifiers.
21 */
22extern struct irq_bucket *irq_map[SUN4D_MAX_IRQ];
23
24
Sam Ravnborg0399bb52011-02-25 23:02:11 -080025/* sun4m specific type definitions */
26
27/* This maps direct to CPU specific interrupt registers */
28struct sun4m_irq_percpu {
29 u32 pending;
30 u32 clear;
31 u32 set;
32};
33
34/* This maps direct to global interrupt registers */
35struct sun4m_irq_global {
36 u32 pending;
37 u32 mask;
38 u32 mask_clear;
39 u32 mask_set;
40 u32 interrupt_target;
41};
42
43extern struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS];
44extern struct sun4m_irq_global __iomem *sun4m_irq_global;
45
Tkhai Kirill62f08282012-04-04 21:49:26 +020046/* The following definitions describe the individual platform features: */
47#define FEAT_L10_CLOCKSOURCE (1 << 0) /* L10 timer is used as a clocksource */
48#define FEAT_L10_CLOCKEVENT (1 << 1) /* L10 timer is used as a clockevent */
49#define FEAT_L14_ONESHOT (1 << 2) /* L14 timer clockevent can oneshot */
50
Sam Ravnborgbbdc2662011-02-25 23:00:19 -080051/*
Sam Ravnborg472bc4f2012-04-04 13:21:13 +020052 * Platform specific configuration
Sam Ravnborgbbdc2662011-02-25 23:00:19 -080053 * The individual platforms assign their platform
54 * specifics in their init functions.
55 */
Sam Ravnborg472bc4f2012-04-04 13:21:13 +020056struct sparc_config {
Tkhai Kirill62f08282012-04-04 21:49:26 +020057 void (*init_timers)(void);
Sam Ravnborg1d059952011-02-25 23:01:19 -080058 unsigned int (*build_device_irq)(struct platform_device *op,
59 unsigned int real_irq);
Tkhai Kirill62f08282012-04-04 21:49:26 +020060
61 /* generic clockevent features - see FEAT_* above */
62 int features;
63
64 /* clock rate used for clock event timer */
65 int clock_rate;
66
67 /* one period for clock source timer */
68 unsigned int cs_period;
69
70 /* function to obtain offsett for cs period */
71 unsigned int (*get_cycles_offset)(void);
Sam Ravnborg08c93882012-05-14 17:30:35 +020072
73 void (*clear_clock_irq)(void);
74 void (*load_profile_irq)(int cpu, unsigned int limit);
Sam Ravnborgbbdc2662011-02-25 23:00:19 -080075};
Sam Ravnborg472bc4f2012-04-04 13:21:13 +020076extern struct sparc_config sparc_config;
Sam Ravnborgbbdc2662011-02-25 23:00:19 -080077
Sam Ravnborg6baa9b22011-04-18 11:25:44 +000078unsigned int irq_alloc(unsigned int real_irq, unsigned int pil);
79void irq_link(unsigned int irq);
80void irq_unlink(unsigned int irq);
81void handler_irq(unsigned int pil, struct pt_regs *regs);
Sam Ravnborgbbdc2662011-02-25 23:00:19 -080082
Sam Ravnborg4ba22b12012-05-14 15:14:36 +020083unsigned long leon_get_irqmask(unsigned int irq);
Al Viro32231a62007-07-21 19:18:57 -070084
Sam Ravnborg2b399172014-04-21 21:39:22 +020085/* sun4m_irq.c */
86void sun4m_nmi(struct pt_regs *regs);
87
Sam Ravnborg4ba22b12012-05-14 15:14:36 +020088#ifdef CONFIG_SMP
Daniel Hellstrom55dd23e2011-05-02 00:08:54 +000089
90/* All SUN4D IPIs are sent on this IRQ, may be shared with hard IRQs */
Kjetil Oftedal38f7f8f2011-08-29 00:16:28 +020091#define SUN4D_IPI_IRQ 13
Daniel Hellstrom55dd23e2011-05-02 00:08:54 +000092
93extern void sun4d_ipi_interrupt(void);
94
Al Viro32231a62007-07-21 19:18:57 -070095#endif