Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Real Time Clock interface for Linux on Atmel AT91RM9200 |
| 4 | * |
| 5 | * Copyright (C) 2002 Rick Bronson |
| 6 | * |
| 7 | * Converted to RTC class model by Andrew Victor |
| 8 | * |
| 9 | * Ported to Linux 2.6 by Steven Scholz |
| 10 | * Based on s3c2410-rtc.c Simtec Electronics |
| 11 | * |
| 12 | * Based on sa1100-rtc.c by Nils Faerber |
| 13 | * Based on rtc.c by Paul Gortmaker |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 16 | #include <linux/bcd.h> |
Alexandre Belloni | 11f67a8 | 2015-07-31 11:39:51 +0200 | [diff] [blame] | 17 | #include <linux/clk.h> |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 18 | #include <linux/completion.h> |
Alexandre Belloni | 74000eb | 2015-07-29 02:01:33 +0200 | [diff] [blame] | 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/ioctl.h> |
Arnd Bergmann | 14070ad | 2012-07-04 07:45:16 +0000 | [diff] [blame] | 21 | #include <linux/io.h> |
Alexandre Belloni | 74000eb | 2015-07-29 02:01:33 +0200 | [diff] [blame] | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/module.h> |
Joachim Eastwood | 7c1b68d | 2013-04-29 16:20:15 -0700 | [diff] [blame] | 24 | #include <linux/of_device.h> |
Alexandre Belloni | 74000eb | 2015-07-29 02:01:33 +0200 | [diff] [blame] | 25 | #include <linux/of.h> |
| 26 | #include <linux/platform_device.h> |
| 27 | #include <linux/rtc.h> |
| 28 | #include <linux/spinlock.h> |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 29 | #include <linux/suspend.h> |
Alexandre Belloni | 74000eb | 2015-07-29 02:01:33 +0200 | [diff] [blame] | 30 | #include <linux/time.h> |
Sachin Kamat | 8ecc0bf | 2013-07-03 15:05:44 -0700 | [diff] [blame] | 31 | #include <linux/uaccess.h> |
Andrew Victor | fb0d4ec | 2008-10-15 22:03:08 -0700 | [diff] [blame] | 32 | |
Jean-Christophe PLAGNIOL-VILLARD | 75984df | 2012-10-30 08:03:39 +0800 | [diff] [blame] | 33 | #include "rtc-at91rm9200.h" |
David Brownell | d73e3cd | 2007-01-05 16:36:25 -0800 | [diff] [blame] | 34 | |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 35 | #define at91_rtc_read(field) \ |
Ben Dooks | 6da7bb1 | 2015-04-16 12:49:32 -0700 | [diff] [blame] | 36 | readl_relaxed(at91_rtc_regs + field) |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 37 | #define at91_rtc_write(field, val) \ |
Ben Dooks | 6da7bb1 | 2015-04-16 12:49:32 -0700 | [diff] [blame] | 38 | writel_relaxed((val), at91_rtc_regs + field) |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 39 | |
Johan Hovold | de64547 | 2013-06-12 14:04:53 -0700 | [diff] [blame] | 40 | struct at91_rtc_config { |
Johan Hovold | e9f08bb | 2013-06-12 14:04:56 -0700 | [diff] [blame] | 41 | bool use_shadow_imr; |
Johan Hovold | de64547 | 2013-06-12 14:04:53 -0700 | [diff] [blame] | 42 | }; |
| 43 | |
| 44 | static const struct at91_rtc_config *at91_rtc_config; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 45 | static DECLARE_COMPLETION(at91_rtc_updated); |
Boris BREZILLON | 2fe121e | 2014-06-06 14:36:09 -0700 | [diff] [blame] | 46 | static DECLARE_COMPLETION(at91_rtc_upd_rdy); |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 47 | static void __iomem *at91_rtc_regs; |
| 48 | static int irq; |
Johan Hovold | e9f08bb | 2013-06-12 14:04:56 -0700 | [diff] [blame] | 49 | static DEFINE_SPINLOCK(at91_rtc_lock); |
| 50 | static u32 at91_rtc_shadow_imr; |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 51 | static bool suspended; |
| 52 | static DEFINE_SPINLOCK(suspended_lock); |
| 53 | static unsigned long cached_events; |
| 54 | static u32 at91_rtc_imr; |
Alexandre Belloni | 11f67a8 | 2015-07-31 11:39:51 +0200 | [diff] [blame] | 55 | static struct clk *sclk; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 56 | |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 57 | static void at91_rtc_write_ier(u32 mask) |
| 58 | { |
Johan Hovold | e9f08bb | 2013-06-12 14:04:56 -0700 | [diff] [blame] | 59 | unsigned long flags; |
| 60 | |
| 61 | spin_lock_irqsave(&at91_rtc_lock, flags); |
| 62 | at91_rtc_shadow_imr |= mask; |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 63 | at91_rtc_write(AT91_RTC_IER, mask); |
Johan Hovold | e9f08bb | 2013-06-12 14:04:56 -0700 | [diff] [blame] | 64 | spin_unlock_irqrestore(&at91_rtc_lock, flags); |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | static void at91_rtc_write_idr(u32 mask) |
| 68 | { |
Johan Hovold | e9f08bb | 2013-06-12 14:04:56 -0700 | [diff] [blame] | 69 | unsigned long flags; |
| 70 | |
| 71 | spin_lock_irqsave(&at91_rtc_lock, flags); |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 72 | at91_rtc_write(AT91_RTC_IDR, mask); |
Johan Hovold | e9f08bb | 2013-06-12 14:04:56 -0700 | [diff] [blame] | 73 | /* |
| 74 | * Register read back (of any RTC-register) needed to make sure |
| 75 | * IDR-register write has reached the peripheral before updating |
| 76 | * shadow mask. |
| 77 | * |
| 78 | * Note that there is still a possibility that the mask is updated |
| 79 | * before interrupts have actually been disabled in hardware. The only |
| 80 | * way to be certain would be to poll the IMR-register, which is is |
| 81 | * the very register we are trying to emulate. The register read back |
| 82 | * is a reasonable heuristic. |
| 83 | */ |
| 84 | at91_rtc_read(AT91_RTC_SR); |
| 85 | at91_rtc_shadow_imr &= ~mask; |
| 86 | spin_unlock_irqrestore(&at91_rtc_lock, flags); |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 87 | } |
| 88 | |
| 89 | static u32 at91_rtc_read_imr(void) |
| 90 | { |
Johan Hovold | e9f08bb | 2013-06-12 14:04:56 -0700 | [diff] [blame] | 91 | unsigned long flags; |
| 92 | u32 mask; |
| 93 | |
| 94 | if (at91_rtc_config->use_shadow_imr) { |
| 95 | spin_lock_irqsave(&at91_rtc_lock, flags); |
| 96 | mask = at91_rtc_shadow_imr; |
| 97 | spin_unlock_irqrestore(&at91_rtc_lock, flags); |
| 98 | } else { |
| 99 | mask = at91_rtc_read(AT91_RTC_IMR); |
| 100 | } |
| 101 | |
| 102 | return mask; |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 103 | } |
| 104 | |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 105 | /* |
| 106 | * Decode time/date into rtc_time structure |
| 107 | */ |
Andrew Morton | e7a8bb1 | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 108 | static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg, |
| 109 | struct rtc_time *tm) |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 110 | { |
| 111 | unsigned int time, date; |
| 112 | |
| 113 | /* must read twice in case it changes */ |
| 114 | do { |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 115 | time = at91_rtc_read(timereg); |
| 116 | date = at91_rtc_read(calreg); |
| 117 | } while ((time != at91_rtc_read(timereg)) || |
| 118 | (date != at91_rtc_read(calreg))); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 119 | |
Adrian Bunk | fe20ba7 | 2008-10-18 20:28:41 -0700 | [diff] [blame] | 120 | tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0); |
| 121 | tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8); |
| 122 | tm->tm_hour = bcd2bin((time & AT91_RTC_HOUR) >> 16); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 123 | |
| 124 | /* |
| 125 | * The Calendar Alarm register does not have a field for |
Alexandre Belloni | eaa1dc7 | 2017-11-10 09:59:31 +0100 | [diff] [blame] | 126 | * the year - so these will return an invalid value. |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 127 | */ |
Adrian Bunk | fe20ba7 | 2008-10-18 20:28:41 -0700 | [diff] [blame] | 128 | tm->tm_year = bcd2bin(date & AT91_RTC_CENT) * 100; /* century */ |
| 129 | tm->tm_year += bcd2bin((date & AT91_RTC_YEAR) >> 8); /* year */ |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 130 | |
Adrian Bunk | fe20ba7 | 2008-10-18 20:28:41 -0700 | [diff] [blame] | 131 | tm->tm_wday = bcd2bin((date & AT91_RTC_DAY) >> 21) - 1; /* day of the week [0-6], Sunday=0 */ |
| 132 | tm->tm_mon = bcd2bin((date & AT91_RTC_MONTH) >> 16) - 1; |
| 133 | tm->tm_mday = bcd2bin((date & AT91_RTC_DATE) >> 24); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 134 | } |
| 135 | |
| 136 | /* |
| 137 | * Read current time and date in RTC |
| 138 | */ |
| 139 | static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm) |
| 140 | { |
| 141 | at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm); |
| 142 | tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); |
| 143 | tm->tm_year = tm->tm_year - 1900; |
| 144 | |
Andy Shevchenko | d422f88 | 2018-12-04 23:23:13 +0200 | [diff] [blame] | 145 | dev_dbg(dev, "%s(): %ptR\n", __func__, tm); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | |
| 150 | /* |
| 151 | * Set current time and date in RTC |
| 152 | */ |
| 153 | static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) |
| 154 | { |
| 155 | unsigned long cr; |
| 156 | |
Andy Shevchenko | d422f88 | 2018-12-04 23:23:13 +0200 | [diff] [blame] | 157 | dev_dbg(dev, "%s(): %ptR\n", __func__, tm); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 158 | |
Boris BREZILLON | 2fe121e | 2014-06-06 14:36:09 -0700 | [diff] [blame] | 159 | wait_for_completion(&at91_rtc_upd_rdy); |
| 160 | |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 161 | /* Stop Time/Calendar from counting */ |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 162 | cr = at91_rtc_read(AT91_RTC_CR); |
| 163 | at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 164 | |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 165 | at91_rtc_write_ier(AT91_RTC_ACKUPD); |
Andrew Morton | e7a8bb1 | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 166 | wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 167 | at91_rtc_write_idr(AT91_RTC_ACKUPD); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 168 | |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 169 | at91_rtc_write(AT91_RTC_TIMR, |
Adrian Bunk | fe20ba7 | 2008-10-18 20:28:41 -0700 | [diff] [blame] | 170 | bin2bcd(tm->tm_sec) << 0 |
| 171 | | bin2bcd(tm->tm_min) << 8 |
| 172 | | bin2bcd(tm->tm_hour) << 16); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 173 | |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 174 | at91_rtc_write(AT91_RTC_CALR, |
Adrian Bunk | fe20ba7 | 2008-10-18 20:28:41 -0700 | [diff] [blame] | 175 | bin2bcd((tm->tm_year + 1900) / 100) /* century */ |
| 176 | | bin2bcd(tm->tm_year % 100) << 8 /* year */ |
| 177 | | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ |
| 178 | | bin2bcd(tm->tm_wday + 1) << 21 /* day of the week [0-6], Sunday=0 */ |
| 179 | | bin2bcd(tm->tm_mday) << 24); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 180 | |
| 181 | /* Restart Time/Calendar */ |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 182 | cr = at91_rtc_read(AT91_RTC_CR); |
Boris BREZILLON | 2fe121e | 2014-06-06 14:36:09 -0700 | [diff] [blame] | 183 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV); |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 184 | at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); |
Boris BREZILLON | 2fe121e | 2014-06-06 14:36:09 -0700 | [diff] [blame] | 185 | at91_rtc_write_ier(AT91_RTC_SECEV); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 186 | |
| 187 | return 0; |
| 188 | } |
| 189 | |
| 190 | /* |
| 191 | * Read alarm time and date in RTC |
| 192 | */ |
| 193 | static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 194 | { |
| 195 | struct rtc_time *tm = &alrm->time; |
| 196 | |
| 197 | at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm); |
Alexandre Belloni | eaa1dc7 | 2017-11-10 09:59:31 +0100 | [diff] [blame] | 198 | tm->tm_year = -1; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 199 | |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 200 | alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM) |
David Brownell | a2db8df | 2006-12-13 00:35:08 -0800 | [diff] [blame] | 201 | ? 1 : 0; |
| 202 | |
Andy Shevchenko | d422f88 | 2018-12-04 23:23:13 +0200 | [diff] [blame] | 203 | dev_dbg(dev, "%s(): %ptR %sabled\n", __func__, tm, |
Alexandre Belloni | eaa1dc7 | 2017-11-10 09:59:31 +0100 | [diff] [blame] | 204 | alrm->enabled ? "en" : "dis"); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 205 | |
| 206 | return 0; |
| 207 | } |
| 208 | |
| 209 | /* |
| 210 | * Set alarm time and date in RTC |
| 211 | */ |
| 212 | static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 213 | { |
| 214 | struct rtc_time tm; |
| 215 | |
| 216 | at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm); |
| 217 | |
Linus Pizunski | eb3c227 | 2013-12-12 17:12:23 -0800 | [diff] [blame] | 218 | tm.tm_mon = alrm->time.tm_mon; |
| 219 | tm.tm_mday = alrm->time.tm_mday; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 220 | tm.tm_hour = alrm->time.tm_hour; |
| 221 | tm.tm_min = alrm->time.tm_min; |
| 222 | tm.tm_sec = alrm->time.tm_sec; |
| 223 | |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 224 | at91_rtc_write_idr(AT91_RTC_ALARM); |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 225 | at91_rtc_write(AT91_RTC_TIMALR, |
Adrian Bunk | fe20ba7 | 2008-10-18 20:28:41 -0700 | [diff] [blame] | 226 | bin2bcd(tm.tm_sec) << 0 |
| 227 | | bin2bcd(tm.tm_min) << 8 |
| 228 | | bin2bcd(tm.tm_hour) << 16 |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 229 | | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 230 | at91_rtc_write(AT91_RTC_CALALR, |
Adrian Bunk | fe20ba7 | 2008-10-18 20:28:41 -0700 | [diff] [blame] | 231 | bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ |
| 232 | | bin2bcd(tm.tm_mday) << 24 |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 233 | | AT91_RTC_DATEEN | AT91_RTC_MTHEN); |
| 234 | |
David Brownell | 449321b | 2008-07-23 21:30:46 -0700 | [diff] [blame] | 235 | if (alrm->enabled) { |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 236 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 237 | at91_rtc_write_ier(AT91_RTC_ALARM); |
David Brownell | 449321b | 2008-07-23 21:30:46 -0700 | [diff] [blame] | 238 | } |
David Brownell | 5d4675a | 2007-02-20 13:58:14 -0800 | [diff] [blame] | 239 | |
Andy Shevchenko | d422f88 | 2018-12-04 23:23:13 +0200 | [diff] [blame] | 240 | dev_dbg(dev, "%s(): %ptR\n", __func__, &tm); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 241 | |
| 242 | return 0; |
| 243 | } |
| 244 | |
John Stultz | 16380c1 | 2011-02-02 17:02:41 -0800 | [diff] [blame] | 245 | static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
| 246 | { |
Jingoo Han | 6588208 | 2013-02-21 16:45:28 -0800 | [diff] [blame] | 247 | dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled); |
John Stultz | 16380c1 | 2011-02-02 17:02:41 -0800 | [diff] [blame] | 248 | |
| 249 | if (enabled) { |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 250 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 251 | at91_rtc_write_ier(AT91_RTC_ALARM); |
Johan Hovold | e24b0bf | 2013-04-05 18:16:34 +0200 | [diff] [blame] | 252 | } else |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 253 | at91_rtc_write_idr(AT91_RTC_ALARM); |
John Stultz | 16380c1 | 2011-02-02 17:02:41 -0800 | [diff] [blame] | 254 | |
| 255 | return 0; |
| 256 | } |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 257 | /* |
| 258 | * Provide additional RTC information in /proc/driver/rtc |
| 259 | */ |
| 260 | static int at91_rtc_proc(struct device *dev, struct seq_file *seq) |
| 261 | { |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 262 | unsigned long imr = at91_rtc_read_imr(); |
Johan Hovold | e24b0bf | 2013-04-05 18:16:34 +0200 | [diff] [blame] | 263 | |
Andrew Morton | e7a8bb1 | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 264 | seq_printf(seq, "update_IRQ\t: %s\n", |
Johan Hovold | e24b0bf | 2013-04-05 18:16:34 +0200 | [diff] [blame] | 265 | (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); |
Andrew Morton | e7a8bb1 | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 266 | seq_printf(seq, "periodic_IRQ\t: %s\n", |
Johan Hovold | e24b0bf | 2013-04-05 18:16:34 +0200 | [diff] [blame] | 267 | (imr & AT91_RTC_SECEV) ? "yes" : "no"); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 268 | |
| 269 | return 0; |
| 270 | } |
| 271 | |
| 272 | /* |
| 273 | * IRQ handler for the RTC |
| 274 | */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 275 | static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 276 | { |
Andrew Morton | e7a8bb1 | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 277 | struct platform_device *pdev = dev_id; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 278 | struct rtc_device *rtc = platform_get_drvdata(pdev); |
| 279 | unsigned int rtsr; |
| 280 | unsigned long events = 0; |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 281 | int ret = IRQ_NONE; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 282 | |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 283 | spin_lock(&suspended_lock); |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 284 | rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr(); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 285 | if (rtsr) { /* this interrupt is shared! Is it ours? */ |
| 286 | if (rtsr & AT91_RTC_ALARM) |
| 287 | events |= (RTC_AF | RTC_IRQF); |
Boris BREZILLON | 2fe121e | 2014-06-06 14:36:09 -0700 | [diff] [blame] | 288 | if (rtsr & AT91_RTC_SECEV) { |
| 289 | complete(&at91_rtc_upd_rdy); |
| 290 | at91_rtc_write_idr(AT91_RTC_SECEV); |
| 291 | } |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 292 | if (rtsr & AT91_RTC_ACKUPD) |
| 293 | complete(&at91_rtc_updated); |
| 294 | |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 295 | at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 296 | |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 297 | if (!suspended) { |
| 298 | rtc_update_irq(rtc, 1, events); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 299 | |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 300 | dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n", |
| 301 | __func__, events >> 8, events & 0x000000FF); |
| 302 | } else { |
| 303 | cached_events |= events; |
| 304 | at91_rtc_write_idr(at91_rtc_imr); |
| 305 | pm_system_wakeup(); |
| 306 | } |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 307 | |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 308 | ret = IRQ_HANDLED; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 309 | } |
Dan Carpenter | 8860168 | 2015-03-17 16:38:10 +0100 | [diff] [blame] | 310 | spin_unlock(&suspended_lock); |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 311 | |
| 312 | return ret; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 313 | } |
| 314 | |
Johan Hovold | de64547 | 2013-06-12 14:04:53 -0700 | [diff] [blame] | 315 | static const struct at91_rtc_config at91rm9200_config = { |
| 316 | }; |
| 317 | |
Johan Hovold | bba00e5 | 2013-06-12 14:04:57 -0700 | [diff] [blame] | 318 | static const struct at91_rtc_config at91sam9x5_config = { |
| 319 | .use_shadow_imr = true, |
| 320 | }; |
| 321 | |
Johan Hovold | de64547 | 2013-06-12 14:04:53 -0700 | [diff] [blame] | 322 | static const struct of_device_id at91_rtc_dt_ids[] = { |
| 323 | { |
| 324 | .compatible = "atmel,at91rm9200-rtc", |
| 325 | .data = &at91rm9200_config, |
| 326 | }, { |
Johan Hovold | bba00e5 | 2013-06-12 14:04:57 -0700 | [diff] [blame] | 327 | .compatible = "atmel,at91sam9x5-rtc", |
| 328 | .data = &at91sam9x5_config, |
| 329 | }, { |
Johan Hovold | de64547 | 2013-06-12 14:04:53 -0700 | [diff] [blame] | 330 | /* sentinel */ |
| 331 | } |
| 332 | }; |
| 333 | MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids); |
Johan Hovold | de64547 | 2013-06-12 14:04:53 -0700 | [diff] [blame] | 334 | |
David Brownell | ff8371a | 2006-09-30 23:28:17 -0700 | [diff] [blame] | 335 | static const struct rtc_class_ops at91_rtc_ops = { |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 336 | .read_time = at91_rtc_readtime, |
| 337 | .set_time = at91_rtc_settime, |
| 338 | .read_alarm = at91_rtc_readalarm, |
| 339 | .set_alarm = at91_rtc_setalarm, |
| 340 | .proc = at91_rtc_proc, |
John Stultz | 16380c1 | 2011-02-02 17:02:41 -0800 | [diff] [blame] | 341 | .alarm_irq_enable = at91_rtc_alarm_irq_enable, |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 342 | }; |
| 343 | |
| 344 | /* |
| 345 | * Initialize and install RTC driver |
| 346 | */ |
| 347 | static int __init at91_rtc_probe(struct platform_device *pdev) |
| 348 | { |
| 349 | struct rtc_device *rtc; |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 350 | struct resource *regs; |
| 351 | int ret = 0; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 352 | |
Claudiu Beznea | 288d9cf | 2019-09-26 15:15:32 +0300 | [diff] [blame^] | 353 | at91_rtc_config = of_device_get_match_data(&pdev->dev); |
Johan Hovold | de64547 | 2013-06-12 14:04:53 -0700 | [diff] [blame] | 354 | if (!at91_rtc_config) |
| 355 | return -ENODEV; |
| 356 | |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 357 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 358 | if (!regs) { |
| 359 | dev_err(&pdev->dev, "no mmio resource defined\n"); |
| 360 | return -ENXIO; |
| 361 | } |
| 362 | |
| 363 | irq = platform_get_irq(pdev, 0); |
Stephen Boyd | faac910 | 2019-07-30 11:15:39 -0700 | [diff] [blame] | 364 | if (irq < 0) |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 365 | return -ENXIO; |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 366 | |
Sachin Kamat | f376625 | 2013-11-12 15:10:29 -0800 | [diff] [blame] | 367 | at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start, |
| 368 | resource_size(regs)); |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 369 | if (!at91_rtc_regs) { |
| 370 | dev_err(&pdev->dev, "failed to map registers, aborting.\n"); |
| 371 | return -ENOMEM; |
| 372 | } |
| 373 | |
Alexandre Belloni | 735ae20 | 2017-07-06 11:42:01 +0200 | [diff] [blame] | 374 | rtc = devm_rtc_allocate_device(&pdev->dev); |
| 375 | if (IS_ERR(rtc)) |
| 376 | return PTR_ERR(rtc); |
| 377 | platform_set_drvdata(pdev, rtc); |
| 378 | |
Alexandre Belloni | 11f67a8 | 2015-07-31 11:39:51 +0200 | [diff] [blame] | 379 | sclk = devm_clk_get(&pdev->dev, NULL); |
| 380 | if (IS_ERR(sclk)) |
| 381 | return PTR_ERR(sclk); |
| 382 | |
| 383 | ret = clk_prepare_enable(sclk); |
| 384 | if (ret) { |
| 385 | dev_err(&pdev->dev, "Could not enable slow clock\n"); |
| 386 | return ret; |
| 387 | } |
| 388 | |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 389 | at91_rtc_write(AT91_RTC_CR, 0); |
| 390 | at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */ |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 391 | |
| 392 | /* Disable all interrupts */ |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 393 | at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM | |
Andrew Morton | e7a8bb1 | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 394 | AT91_RTC_SECEV | AT91_RTC_TIMEV | |
| 395 | AT91_RTC_CALEV); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 396 | |
Sachin Kamat | f376625 | 2013-11-12 15:10:29 -0800 | [diff] [blame] | 397 | ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt, |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 398 | IRQF_SHARED | IRQF_COND_SUSPEND, |
| 399 | "at91_rtc", pdev); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 400 | if (ret) { |
Jingoo Han | 6588208 | 2013-02-21 16:45:28 -0800 | [diff] [blame] | 401 | dev_err(&pdev->dev, "IRQ %d already in use.\n", irq); |
Alexandre Belloni | 11f67a8 | 2015-07-31 11:39:51 +0200 | [diff] [blame] | 402 | goto err_clk; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 403 | } |
| 404 | |
David Brownell | 5d4675a | 2007-02-20 13:58:14 -0800 | [diff] [blame] | 405 | /* cpu init code should really have flagged this device as |
| 406 | * being wake-capable; if it didn't, do that here. |
| 407 | */ |
| 408 | if (!device_can_wakeup(&pdev->dev)) |
| 409 | device_init_wakeup(&pdev->dev, 1); |
| 410 | |
Alexandre Belloni | 735ae20 | 2017-07-06 11:42:01 +0200 | [diff] [blame] | 411 | rtc->ops = &at91_rtc_ops; |
Alexandre Belloni | 6c78a87 | 2018-05-17 22:17:28 +0200 | [diff] [blame] | 412 | rtc->range_min = RTC_TIMESTAMP_BEGIN_1900; |
| 413 | rtc->range_max = RTC_TIMESTAMP_END_2099; |
Alexandre Belloni | 735ae20 | 2017-07-06 11:42:01 +0200 | [diff] [blame] | 414 | ret = rtc_register_device(rtc); |
| 415 | if (ret) |
Alexandre Belloni | 11f67a8 | 2015-07-31 11:39:51 +0200 | [diff] [blame] | 416 | goto err_clk; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 417 | |
Boris BREZILLON | 2fe121e | 2014-06-06 14:36:09 -0700 | [diff] [blame] | 418 | /* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy |
| 419 | * completion. |
| 420 | */ |
| 421 | at91_rtc_write_ier(AT91_RTC_SECEV); |
| 422 | |
Jingoo Han | 6588208 | 2013-02-21 16:45:28 -0800 | [diff] [blame] | 423 | dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n"); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 424 | return 0; |
Alexandre Belloni | 11f67a8 | 2015-07-31 11:39:51 +0200 | [diff] [blame] | 425 | |
| 426 | err_clk: |
| 427 | clk_disable_unprepare(sclk); |
| 428 | |
| 429 | return ret; |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 430 | } |
| 431 | |
| 432 | /* |
| 433 | * Disable and remove the RTC driver |
| 434 | */ |
David Brownell | 5d4675a | 2007-02-20 13:58:14 -0800 | [diff] [blame] | 435 | static int __exit at91_rtc_remove(struct platform_device *pdev) |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 436 | { |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 437 | /* Disable all interrupts */ |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 438 | at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM | |
Andrew Morton | e7a8bb1 | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 439 | AT91_RTC_SECEV | AT91_RTC_TIMEV | |
| 440 | AT91_RTC_CALEV); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 441 | |
Alexandre Belloni | 11f67a8 | 2015-07-31 11:39:51 +0200 | [diff] [blame] | 442 | clk_disable_unprepare(sclk); |
| 443 | |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 444 | return 0; |
| 445 | } |
| 446 | |
Johan Hovold | 51a0d03 | 2013-11-21 14:32:04 -0800 | [diff] [blame] | 447 | static void at91_rtc_shutdown(struct platform_device *pdev) |
| 448 | { |
| 449 | /* Disable all interrupts */ |
| 450 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | |
| 451 | AT91_RTC_SECEV | AT91_RTC_TIMEV | |
| 452 | AT91_RTC_CALEV); |
| 453 | } |
| 454 | |
Jingoo Han | 6975a9c | 2013-04-29 16:19:56 -0700 | [diff] [blame] | 455 | #ifdef CONFIG_PM_SLEEP |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 456 | |
| 457 | /* AT91RM9200 RTC Power management control */ |
| 458 | |
David Brownell | dac94d9 | 2009-09-22 16:46:31 -0700 | [diff] [blame] | 459 | static int at91_rtc_suspend(struct device *dev) |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 460 | { |
David Brownell | 90b4d64 | 2006-09-30 23:28:17 -0700 | [diff] [blame] | 461 | /* this IRQ is shared with DBGU and other hardware which isn't |
| 462 | * necessarily doing PM like we are... |
| 463 | */ |
Wenyou Yang | 921372b | 2015-10-12 16:39:23 +0800 | [diff] [blame] | 464 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); |
| 465 | |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 466 | at91_rtc_imr = at91_rtc_read_imr() |
Johan Hovold | e24b0bf | 2013-04-05 18:16:34 +0200 | [diff] [blame] | 467 | & (AT91_RTC_ALARM|AT91_RTC_SECEV); |
| 468 | if (at91_rtc_imr) { |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 469 | if (device_may_wakeup(dev)) { |
| 470 | unsigned long flags; |
| 471 | |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 472 | enable_irq_wake(irq); |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 473 | |
| 474 | spin_lock_irqsave(&suspended_lock, flags); |
| 475 | suspended = true; |
| 476 | spin_unlock_irqrestore(&suspended_lock, flags); |
| 477 | } else { |
Johan Hovold | e304fcd0 | 2013-06-12 14:04:55 -0700 | [diff] [blame] | 478 | at91_rtc_write_idr(at91_rtc_imr); |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 479 | } |
Johan Hovold | e24b0bf | 2013-04-05 18:16:34 +0200 | [diff] [blame] | 480 | } |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 481 | return 0; |
| 482 | } |
| 483 | |
David Brownell | dac94d9 | 2009-09-22 16:46:31 -0700 | [diff] [blame] | 484 | static int at91_rtc_resume(struct device *dev) |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 485 | { |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 486 | struct rtc_device *rtc = dev_get_drvdata(dev); |
| 487 | |
Johan Hovold | e24b0bf | 2013-04-05 18:16:34 +0200 | [diff] [blame] | 488 | if (at91_rtc_imr) { |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 489 | if (device_may_wakeup(dev)) { |
| 490 | unsigned long flags; |
| 491 | |
| 492 | spin_lock_irqsave(&suspended_lock, flags); |
| 493 | |
| 494 | if (cached_events) { |
| 495 | rtc_update_irq(rtc, 1, cached_events); |
| 496 | cached_events = 0; |
| 497 | } |
| 498 | |
| 499 | suspended = false; |
| 500 | spin_unlock_irqrestore(&suspended_lock, flags); |
| 501 | |
Jean-Christophe PLAGNIOL-VILLARD | d28bdfc | 2011-11-14 14:24:53 +0800 | [diff] [blame] | 502 | disable_irq_wake(irq); |
Boris BREZILLON | dd1f1f3 | 2015-03-02 10:18:15 +0100 | [diff] [blame] | 503 | } |
| 504 | at91_rtc_write_ier(at91_rtc_imr); |
David Brownell | 90b4d64 | 2006-09-30 23:28:17 -0700 | [diff] [blame] | 505 | } |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 506 | return 0; |
| 507 | } |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 508 | #endif |
| 509 | |
Jingoo Han | 6975a9c | 2013-04-29 16:19:56 -0700 | [diff] [blame] | 510 | static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume); |
| 511 | |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 512 | static struct platform_driver at91_rtc_driver = { |
David Brownell | 5d4675a | 2007-02-20 13:58:14 -0800 | [diff] [blame] | 513 | .remove = __exit_p(at91_rtc_remove), |
Johan Hovold | 51a0d03 | 2013-11-21 14:32:04 -0800 | [diff] [blame] | 514 | .shutdown = at91_rtc_shutdown, |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 515 | .driver = { |
| 516 | .name = "at91_rtc", |
Jingoo Han | 6975a9c | 2013-04-29 16:19:56 -0700 | [diff] [blame] | 517 | .pm = &at91_rtc_pm_ops, |
Joachim Eastwood | 7c1b68d | 2013-04-29 16:20:15 -0700 | [diff] [blame] | 518 | .of_match_table = of_match_ptr(at91_rtc_dt_ids), |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 519 | }, |
| 520 | }; |
| 521 | |
Jingoo Han | ac36960 | 2013-04-29 16:18:36 -0700 | [diff] [blame] | 522 | module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe); |
Andrew Victor | 788b1fc | 2006-06-25 05:48:27 -0700 | [diff] [blame] | 523 | |
| 524 | MODULE_AUTHOR("Rick Bronson"); |
| 525 | MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200"); |
| 526 | MODULE_LICENSE("GPL"); |
Kay Sievers | ad28a07 | 2008-04-10 21:29:25 -0700 | [diff] [blame] | 527 | MODULE_ALIAS("platform:at91_rtc"); |