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Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
Dave Jones32ee8c32006-02-28 00:43:23 -05003 * elanfreq: cpufreq driver for the AMD ELAN family
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 *
5 * (c) Copyright 2002 Robert Schwebel <r.schwebel@pengutronix.de>
6 *
Dave Jones32ee8c32006-02-28 00:43:23 -05007 * Parts of this code are (c) Sven Geggus <sven@geggus.net>
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 *
Dave Jones32ee8c32006-02-28 00:43:23 -05009 * All Rights Reserved.
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 * 2002-02-13: - initial revision for 2.4.18-pre9 by Robert Schwebel
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
13
Joe Perches1c5864e2016-04-05 13:28:25 -070014#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <linux/delay.h>
21#include <linux/cpufreq.h>
22
Andi Kleenfa8031a2012-01-26 00:09:12 +010023#include <asm/cpu_device_id.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070024#include <asm/msr.h>
Paolo Ciarrocchi18c6faa2008-07-28 13:00:49 +020025#include <linux/timex.h>
26#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Dave Jones32ee8c32006-02-28 00:43:23 -050028#define REG_CSCIR 0x22 /* Chip Setup and Control Index Register */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029#define REG_CSCDR 0x23 /* Chip Setup and Control Data Register */
30
31/* Module parameter */
32static int max_freq;
33
34struct s_elan_multiplier {
35 int clock; /* frequency in kHz */
36 int val40h; /* PMU Force Mode register */
37 int val80h; /* CPU Clock Speed Register */
38};
39
40/*
Dave Jones32ee8c32006-02-28 00:43:23 -050041 * It is important that the frequencies
Linus Torvalds1da177e2005-04-16 15:20:36 -070042 * are listed in ascending order here!
43 */
Dave Jones460f5ef2008-07-30 13:01:42 -040044static struct s_elan_multiplier elan_multiplier[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070045 {1000, 0x02, 0x18},
46 {2000, 0x02, 0x10},
47 {4000, 0x02, 0x08},
48 {8000, 0x00, 0x00},
49 {16000, 0x00, 0x02},
50 {33000, 0x00, 0x04},
51 {66000, 0x01, 0x04},
52 {99000, 0x01, 0x05}
53};
54
55static struct cpufreq_frequency_table elanfreq_table[] = {
Viresh Kumar7f4b0462014-03-28 19:11:47 +053056 {0, 0, 1000},
57 {0, 1, 2000},
58 {0, 2, 4000},
59 {0, 3, 8000},
60 {0, 4, 16000},
61 {0, 5, 33000},
62 {0, 6, 66000},
63 {0, 7, 99000},
64 {0, 0, CPUFREQ_TABLE_END},
Linus Torvalds1da177e2005-04-16 15:20:36 -070065};
66
67
68/**
69 * elanfreq_get_cpu_frequency: determine current cpu speed
70 *
71 * Finds out at which frequency the CPU of the Elan SOC runs
Dave Jones32ee8c32006-02-28 00:43:23 -050072 * at the moment. Frequencies from 1 to 33 MHz are generated
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 * the normal way, 66 and 99 MHz are called "Hyperspeed Mode"
Dave Jones32ee8c32006-02-28 00:43:23 -050074 * and have the rest of the chip running with 33 MHz.
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 */
76
77static unsigned int elanfreq_get_cpu_frequency(unsigned int cpu)
78{
Dave Jones32ee8c32006-02-28 00:43:23 -050079 u8 clockspeed_reg; /* Clock Speed Register */
80
Linus Torvalds1da177e2005-04-16 15:20:36 -070081 local_irq_disable();
Paolo Ciarrocchi18c6faa2008-07-28 13:00:49 +020082 outb_p(0x80, REG_CSCIR);
Dave Jones32ee8c32006-02-28 00:43:23 -050083 clockspeed_reg = inb_p(REG_CSCDR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070084 local_irq_enable();
85
Dave Jones32ee8c32006-02-28 00:43:23 -050086 if ((clockspeed_reg & 0xE0) == 0xE0)
87 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
Dave Jones32ee8c32006-02-28 00:43:23 -050089 /* Are we in CPU clock multiplied mode (66/99 MHz)? */
90 if ((clockspeed_reg & 0xE0) == 0xC0) {
91 if ((clockspeed_reg & 0x01) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070092 return 66000;
Dave Jones32ee8c32006-02-28 00:43:23 -050093 else
94 return 99000;
95 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070096
97 /* 33 MHz is not 32 MHz... */
Paolo Ciarrocchi18c6faa2008-07-28 13:00:49 +020098 if ((clockspeed_reg & 0xE0) == 0xA0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070099 return 33000;
100
Paolo Ciarrocchi18c6faa2008-07-28 13:00:49 +0200101 return (1<<((clockspeed_reg & 0xE0) >> 5)) * 1000;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102}
103
104
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530105static int elanfreq_target(struct cpufreq_policy *policy,
106 unsigned int state)
Dave Jones32ee8c32006-02-28 00:43:23 -0500107{
Dave Jones32ee8c32006-02-28 00:43:23 -0500108 /*
109 * Access to the Elan's internal registers is indexed via
110 * 0x22: Chip Setup & Control Register Index Register (CSCI)
111 * 0x23: Chip Setup & Control Register Data Register (CSCD)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112 *
113 */
114
Dave Jones32ee8c32006-02-28 00:43:23 -0500115 /*
116 * 0x40 is the Power Management Unit's Force Mode Register.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117 * Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency)
118 */
119
120 local_irq_disable();
Paolo Ciarrocchi18c6faa2008-07-28 13:00:49 +0200121 outb_p(0x40, REG_CSCIR); /* Disable hyperspeed mode */
122 outb_p(0x00, REG_CSCDR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123 local_irq_enable(); /* wait till internal pipelines and */
124 udelay(1000); /* buffers have cleaned up */
125
126 local_irq_disable();
127
128 /* now, set the CPU clock speed register (0x80) */
Paolo Ciarrocchi18c6faa2008-07-28 13:00:49 +0200129 outb_p(0x80, REG_CSCIR);
130 outb_p(elan_multiplier[state].val80h, REG_CSCDR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131
132 /* now, the hyperspeed bit in PMU Force Mode Register (0x40) */
Paolo Ciarrocchi18c6faa2008-07-28 13:00:49 +0200133 outb_p(0x40, REG_CSCIR);
134 outb_p(elan_multiplier[state].val40h, REG_CSCDR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135 udelay(10000);
136 local_irq_enable();
137
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138 return 0;
139}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140/*
141 * Module init and exit code
142 */
143
144static int elanfreq_cpu_init(struct cpufreq_policy *policy)
145{
Mike Travis92cb7612007-10-19 20:35:04 +0200146 struct cpuinfo_x86 *c = &cpu_data(0);
Stratos Karafotis041526f2014-04-25 23:15:38 +0300147 struct cpufreq_frequency_table *pos;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148
149 /* capability check */
150 if ((c->x86_vendor != X86_VENDOR_AMD) ||
Paolo Ciarrocchi18c6faa2008-07-28 13:00:49 +0200151 (c->x86 != 4) || (c->x86_model != 10))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 return -ENODEV;
153
154 /* max freq */
155 if (!max_freq)
156 max_freq = elanfreq_get_cpu_frequency(0);
157
158 /* table init */
Stratos Karafotis041526f2014-04-25 23:15:38 +0300159 cpufreq_for_each_entry(pos, elanfreq_table)
160 if (pos->frequency > max_freq)
161 pos->frequency = CPUFREQ_ENTRY_INVALID;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162
Viresh Kumarc3e3cc82018-02-26 10:38:52 +0530163 policy->freq_table = elanfreq_table;
164 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165}
166
167
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168#ifndef MODULE
169/**
170 * elanfreq_setup - elanfreq command line parameter parsing
171 *
172 * elanfreq command line parameter. Use:
173 * elanfreq=66000
174 * to set the maximum CPU frequency to 66 MHz. Note that in
175 * case you do not give this boot parameter, the maximum
176 * frequency will fall back to _current_ CPU frequency which
177 * might be lower. If you build this as a module, use the
178 * max_freq module parameter instead.
179 */
180static int __init elanfreq_setup(char *str)
181{
182 max_freq = simple_strtoul(str, &str, 0);
Joe Perchesb49c22a2016-04-05 13:28:24 -0700183 pr_warn("You're using the deprecated elanfreq command line option. Use elanfreq.max_freq instead, please!\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184 return 1;
185}
186__setup("elanfreq=", elanfreq_setup);
187#endif
188
189
Linus Torvalds221dee22007-02-26 14:55:48 -0800190static struct cpufreq_driver elanfreq_driver = {
Dave Jones32ee8c32006-02-28 00:43:23 -0500191 .get = elanfreq_get_cpu_frequency,
Viresh Kumarfe829ed2017-07-19 15:42:48 +0530192 .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
Viresh Kumar06494eb2013-10-03 20:28:05 +0530193 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530194 .target_index = elanfreq_target,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195 .init = elanfreq_cpu_init,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196 .name = "elanfreq",
Viresh Kumar06494eb2013-10-03 20:28:05 +0530197 .attr = cpufreq_generic_attr,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198};
199
Andi Kleenfa8031a2012-01-26 00:09:12 +0100200static const struct x86_cpu_id elan_id[] = {
201 { X86_VENDOR_AMD, 4, 10, },
202 {}
203};
204MODULE_DEVICE_TABLE(x86cpu, elan_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700205
Dave Jones32ee8c32006-02-28 00:43:23 -0500206static int __init elanfreq_init(void)
207{
Andi Kleenfa8031a2012-01-26 00:09:12 +0100208 if (!x86_match_cpu(elan_id))
Paolo Ciarrocchi18c6faa2008-07-28 13:00:49 +0200209 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 return cpufreq_register_driver(&elanfreq_driver);
211}
212
213
Dave Jones32ee8c32006-02-28 00:43:23 -0500214static void __exit elanfreq_exit(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215{
216 cpufreq_unregister_driver(&elanfreq_driver);
217}
218
219
Paolo Ciarrocchi18c6faa2008-07-28 13:00:49 +0200220module_param(max_freq, int, 0444);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221
222MODULE_LICENSE("GPL");
Dave Jones04cd1a92009-01-17 22:50:33 -0500223MODULE_AUTHOR("Robert Schwebel <r.schwebel@pengutronix.de>, "
224 "Sven Geggus <sven@geggus.net>");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225MODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs");
226
227module_init(elanfreq_init);
228module_exit(elanfreq_exit);