Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2012 Avionic Design GmbH |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <linux/bcd.h> |
Alexandre Belloni | f8d4e4f | 2021-10-18 17:36:50 +0200 | [diff] [blame] | 7 | #include <linux/bitfield.h> |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 8 | #include <linux/i2c.h> |
| 9 | #include <linux/module.h> |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 10 | #include <linux/regmap.h> |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 11 | #include <linux/rtc.h> |
| 12 | #include <linux/of.h> |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 13 | #include <linux/pm_wakeirq.h> |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 14 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 15 | #define PCF8523_REG_CONTROL1 0x00 |
| 16 | #define PCF8523_CONTROL1_CAP_SEL BIT(7) |
| 17 | #define PCF8523_CONTROL1_STOP BIT(5) |
| 18 | #define PCF8523_CONTROL1_AIE BIT(1) |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 19 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 20 | #define PCF8523_REG_CONTROL2 0x01 |
| 21 | #define PCF8523_CONTROL2_AF BIT(3) |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 22 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 23 | #define PCF8523_REG_CONTROL3 0x02 |
Alexandre Belloni | f8d4e4f | 2021-10-18 17:36:50 +0200 | [diff] [blame] | 24 | #define PCF8523_CONTROL3_PM GENMASK(7,5) |
| 25 | #define PCF8523_PM_STANDBY 0x7 |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 26 | #define PCF8523_CONTROL3_BLF BIT(2) /* battery low bit, read-only */ |
Alexandre Belloni | 7d7234a | 2021-10-15 21:24:00 +0200 | [diff] [blame] | 27 | #define PCF8523_CONTROL3_BSF BIT(3) |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 28 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 29 | #define PCF8523_REG_SECONDS 0x03 |
| 30 | #define PCF8523_SECONDS_OS BIT(7) |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 31 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 32 | #define PCF8523_REG_MINUTES 0x04 |
| 33 | #define PCF8523_REG_HOURS 0x05 |
| 34 | #define PCF8523_REG_DAYS 0x06 |
| 35 | #define PCF8523_REG_WEEKDAYS 0x07 |
| 36 | #define PCF8523_REG_MONTHS 0x08 |
| 37 | #define PCF8523_REG_YEARS 0x09 |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 38 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 39 | #define PCF8523_REG_MINUTE_ALARM 0x0a |
| 40 | #define PCF8523_REG_HOUR_ALARM 0x0b |
| 41 | #define PCF8523_REG_DAY_ALARM 0x0c |
| 42 | #define PCF8523_REG_WEEKDAY_ALARM 0x0d |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 43 | #define ALARM_DIS BIT(7) |
| 44 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 45 | #define PCF8523_REG_OFFSET 0x0e |
| 46 | #define PCF8523_OFFSET_MODE BIT(7) |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 47 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 48 | #define PCF8523_TMR_CLKOUT_CTRL 0x0f |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 49 | |
| 50 | struct pcf8523 { |
| 51 | struct rtc_device *rtc; |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 52 | struct regmap *regmap; |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 53 | }; |
| 54 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 55 | static int pcf8523_load_capacitance(struct pcf8523 *pcf8523, struct device_node *node) |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 56 | { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 57 | u32 load, value = 0; |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 58 | |
Sam Ravnborg | 189927e | 2019-01-19 10:00:30 +0100 | [diff] [blame] | 59 | load = 12500; |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 60 | of_property_read_u32(node, "quartz-load-femtofarads", &load); |
Sam Ravnborg | 189927e | 2019-01-19 10:00:30 +0100 | [diff] [blame] | 61 | |
| 62 | switch (load) { |
| 63 | default: |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 64 | dev_warn(&pcf8523->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 12500", |
Sam Ravnborg | 189927e | 2019-01-19 10:00:30 +0100 | [diff] [blame] | 65 | load); |
Gustavo A. R. Silva | df561f66 | 2020-08-23 17:36:59 -0500 | [diff] [blame] | 66 | fallthrough; |
Sam Ravnborg | 189927e | 2019-01-19 10:00:30 +0100 | [diff] [blame] | 67 | case 12500: |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 68 | value |= PCF8523_CONTROL1_CAP_SEL; |
Sam Ravnborg | 189927e | 2019-01-19 10:00:30 +0100 | [diff] [blame] | 69 | break; |
| 70 | case 7000: |
Sam Ravnborg | 189927e | 2019-01-19 10:00:30 +0100 | [diff] [blame] | 71 | break; |
| 72 | } |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 73 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 74 | return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1, |
| 75 | PCF8523_CONTROL1_CAP_SEL, value); |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 76 | } |
| 77 | |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 78 | static irqreturn_t pcf8523_irq(int irq, void *dev_id) |
| 79 | { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 80 | struct pcf8523 *pcf8523 = dev_id; |
| 81 | u32 value; |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 82 | int err; |
| 83 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 84 | err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 85 | if (err < 0) |
| 86 | return IRQ_HANDLED; |
| 87 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 88 | if (value & PCF8523_CONTROL2_AF) { |
| 89 | value &= ~PCF8523_CONTROL2_AF; |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 90 | regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, value); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 91 | rtc_update_irq(pcf8523->rtc, 1, RTC_IRQF | RTC_AF); |
| 92 | |
| 93 | return IRQ_HANDLED; |
| 94 | } |
| 95 | |
| 96 | return IRQ_NONE; |
| 97 | } |
| 98 | |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 99 | static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm) |
| 100 | { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 101 | struct pcf8523 *pcf8523 = dev_get_drvdata(dev); |
| 102 | u8 regs[7]; |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 103 | int err; |
| 104 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 105 | err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_SECONDS, regs, |
| 106 | sizeof(regs)); |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 107 | if (err < 0) |
| 108 | return err; |
| 109 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 110 | if (regs[0] & PCF8523_SECONDS_OS) |
Alexandre Belloni | ede44c9 | 2016-03-03 09:55:47 +0100 | [diff] [blame] | 111 | return -EINVAL; |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 112 | |
| 113 | tm->tm_sec = bcd2bin(regs[0] & 0x7f); |
| 114 | tm->tm_min = bcd2bin(regs[1] & 0x7f); |
| 115 | tm->tm_hour = bcd2bin(regs[2] & 0x3f); |
| 116 | tm->tm_mday = bcd2bin(regs[3] & 0x3f); |
| 117 | tm->tm_wday = regs[4] & 0x7; |
Chris Cui | 3573839 | 2014-05-06 12:49:58 -0700 | [diff] [blame] | 118 | tm->tm_mon = bcd2bin(regs[5] & 0x1f) - 1; |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 119 | tm->tm_year = bcd2bin(regs[6]) + 100; |
| 120 | |
Alexandre Belloni | 22652ba | 2018-02-19 16:23:56 +0100 | [diff] [blame] | 121 | return 0; |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 122 | } |
| 123 | |
| 124 | static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm) |
| 125 | { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 126 | struct pcf8523 *pcf8523 = dev_get_drvdata(dev); |
| 127 | u8 regs[7]; |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 128 | int err; |
| 129 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 130 | err = regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1, |
| 131 | PCF8523_CONTROL1_STOP, PCF8523_CONTROL1_STOP); |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 132 | if (err < 0) |
| 133 | return err; |
| 134 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 135 | /* This will purposely overwrite PCF8523_SECONDS_OS */ |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 136 | regs[0] = bin2bcd(tm->tm_sec); |
| 137 | regs[1] = bin2bcd(tm->tm_min); |
| 138 | regs[2] = bin2bcd(tm->tm_hour); |
| 139 | regs[3] = bin2bcd(tm->tm_mday); |
| 140 | regs[4] = tm->tm_wday; |
| 141 | regs[5] = bin2bcd(tm->tm_mon + 1); |
| 142 | regs[6] = bin2bcd(tm->tm_year - 100); |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 143 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 144 | err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_SECONDS, regs, |
| 145 | sizeof(regs)); |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 146 | if (err < 0) { |
| 147 | /* |
| 148 | * If the time cannot be set, restart the RTC anyway. Note |
| 149 | * that errors are ignored if the RTC cannot be started so |
| 150 | * that we have a chance to propagate the original error. |
| 151 | */ |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 152 | regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1, |
| 153 | PCF8523_CONTROL1_STOP, 0); |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 154 | return err; |
| 155 | } |
| 156 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 157 | return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1, |
| 158 | PCF8523_CONTROL1_STOP, 0); |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 159 | } |
| 160 | |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 161 | static int pcf8523_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *tm) |
| 162 | { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 163 | struct pcf8523 *pcf8523 = dev_get_drvdata(dev); |
| 164 | u8 regs[4]; |
| 165 | u32 value; |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 166 | int err; |
| 167 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 168 | err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs, |
| 169 | sizeof(regs)); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 170 | if (err < 0) |
| 171 | return err; |
| 172 | |
| 173 | tm->time.tm_sec = 0; |
| 174 | tm->time.tm_min = bcd2bin(regs[0] & 0x7F); |
| 175 | tm->time.tm_hour = bcd2bin(regs[1] & 0x3F); |
| 176 | tm->time.tm_mday = bcd2bin(regs[2] & 0x3F); |
| 177 | tm->time.tm_wday = bcd2bin(regs[3] & 0x7); |
| 178 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 179 | err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL1, &value); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 180 | if (err < 0) |
| 181 | return err; |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 182 | tm->enabled = !!(value & PCF8523_CONTROL1_AIE); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 183 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 184 | err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 185 | if (err < 0) |
| 186 | return err; |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 187 | tm->pending = !!(value & PCF8523_CONTROL2_AF); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 188 | |
| 189 | return 0; |
| 190 | } |
| 191 | |
| 192 | static int pcf8523_irq_enable(struct device *dev, unsigned int enabled) |
| 193 | { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 194 | struct pcf8523 *pcf8523 = dev_get_drvdata(dev); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 195 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 196 | return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1, |
| 197 | PCF8523_CONTROL1_AIE, enabled ? |
| 198 | PCF8523_CONTROL1_AIE : 0); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 199 | } |
| 200 | |
| 201 | static int pcf8523_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *tm) |
| 202 | { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 203 | struct pcf8523 *pcf8523 = dev_get_drvdata(dev); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 204 | u8 regs[5]; |
| 205 | int err; |
| 206 | |
| 207 | err = pcf8523_irq_enable(dev, 0); |
| 208 | if (err) |
| 209 | return err; |
| 210 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 211 | err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, 0); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 212 | if (err < 0) |
| 213 | return err; |
| 214 | |
| 215 | /* The alarm has no seconds, round up to nearest minute */ |
| 216 | if (tm->time.tm_sec) { |
| 217 | time64_t alarm_time = rtc_tm_to_time64(&tm->time); |
| 218 | |
| 219 | alarm_time += 60 - tm->time.tm_sec; |
| 220 | rtc_time64_to_tm(alarm_time, &tm->time); |
| 221 | } |
| 222 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 223 | regs[0] = bin2bcd(tm->time.tm_min); |
| 224 | regs[1] = bin2bcd(tm->time.tm_hour); |
| 225 | regs[2] = bin2bcd(tm->time.tm_mday); |
| 226 | regs[3] = ALARM_DIS; |
| 227 | |
| 228 | err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs, |
| 229 | sizeof(regs)); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 230 | if (err < 0) |
| 231 | return err; |
| 232 | |
| 233 | if (tm->enabled) |
| 234 | return pcf8523_irq_enable(dev, tm->enabled); |
| 235 | |
| 236 | return 0; |
| 237 | } |
| 238 | |
Alexandre Belloni | f8d4e4f | 2021-10-18 17:36:50 +0200 | [diff] [blame] | 239 | static int pcf8523_param_get(struct device *dev, struct rtc_param *param) |
| 240 | { |
| 241 | struct pcf8523 *pcf8523 = dev_get_drvdata(dev); |
| 242 | int ret; |
| 243 | |
| 244 | switch(param->param) { |
| 245 | u32 value; |
| 246 | |
| 247 | case RTC_PARAM_BACKUP_SWITCH_MODE: |
| 248 | ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value); |
| 249 | if (ret < 0) |
| 250 | return ret; |
| 251 | |
| 252 | value = FIELD_GET(PCF8523_CONTROL3_PM, value); |
| 253 | |
| 254 | switch(value) { |
| 255 | case 0x0: |
| 256 | case 0x4: |
| 257 | param->uvalue = RTC_BSM_LEVEL; |
| 258 | break; |
| 259 | case 0x1: |
| 260 | case 0x5: |
| 261 | param->uvalue = RTC_BSM_DIRECT; |
| 262 | break; |
| 263 | case PCF8523_PM_STANDBY: |
| 264 | param->uvalue = RTC_BSM_STANDBY; |
| 265 | break; |
| 266 | default: |
| 267 | param->uvalue = RTC_BSM_DISABLED; |
| 268 | } |
| 269 | |
| 270 | break; |
| 271 | |
| 272 | default: |
| 273 | return -EINVAL; |
| 274 | } |
| 275 | |
| 276 | return 0; |
| 277 | } |
| 278 | |
| 279 | static int pcf8523_param_set(struct device *dev, struct rtc_param *param) |
| 280 | { |
| 281 | struct pcf8523 *pcf8523 = dev_get_drvdata(dev); |
| 282 | |
| 283 | switch(param->param) { |
| 284 | u8 mode; |
| 285 | case RTC_PARAM_BACKUP_SWITCH_MODE: |
| 286 | switch (param->uvalue) { |
| 287 | case RTC_BSM_DISABLED: |
| 288 | mode = 0x2; |
| 289 | break; |
| 290 | case RTC_BSM_DIRECT: |
| 291 | mode = 0x1; |
| 292 | break; |
| 293 | case RTC_BSM_LEVEL: |
| 294 | mode = 0x0; |
| 295 | break; |
| 296 | case RTC_BSM_STANDBY: |
| 297 | mode = PCF8523_PM_STANDBY; |
| 298 | break; |
| 299 | default: |
| 300 | return -EINVAL; |
| 301 | } |
| 302 | |
| 303 | return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL3, |
| 304 | PCF8523_CONTROL3_PM, |
| 305 | FIELD_PREP(PCF8523_CONTROL3_PM, mode)); |
| 306 | |
| 307 | break; |
| 308 | |
| 309 | default: |
| 310 | return -EINVAL; |
| 311 | } |
| 312 | |
| 313 | return 0; |
| 314 | } |
| 315 | |
Jesper Nilsson | f32bc70 | 2013-02-21 16:44:27 -0800 | [diff] [blame] | 316 | static int pcf8523_rtc_ioctl(struct device *dev, unsigned int cmd, |
| 317 | unsigned long arg) |
| 318 | { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 319 | struct pcf8523 *pcf8523 = dev_get_drvdata(dev); |
Alexandre Belloni | a1cfe7c | 2021-04-18 02:20:23 +0200 | [diff] [blame] | 320 | unsigned int flags = 0; |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 321 | u32 value; |
Baruch Siach | ecb4a35 | 2018-12-05 17:00:09 +0200 | [diff] [blame] | 322 | int ret; |
Jesper Nilsson | f32bc70 | 2013-02-21 16:44:27 -0800 | [diff] [blame] | 323 | |
| 324 | switch (cmd) { |
| 325 | case RTC_VL_READ: |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 326 | ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value); |
Baruch Siach | ecb4a35 | 2018-12-05 17:00:09 +0200 | [diff] [blame] | 327 | if (ret < 0) |
| 328 | return ret; |
Alexandre Belloni | 7d7234a | 2021-10-15 21:24:00 +0200 | [diff] [blame] | 329 | |
| 330 | if (value & PCF8523_CONTROL3_BLF) |
Alexandre Belloni | a1cfe7c | 2021-04-18 02:20:23 +0200 | [diff] [blame] | 331 | flags |= RTC_VL_BACKUP_LOW; |
Jesper Nilsson | f32bc70 | 2013-02-21 16:44:27 -0800 | [diff] [blame] | 332 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 333 | ret = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value); |
Alexandre Belloni | a1cfe7c | 2021-04-18 02:20:23 +0200 | [diff] [blame] | 334 | if (ret < 0) |
| 335 | return ret; |
| 336 | |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 337 | if (value & PCF8523_SECONDS_OS) |
Alexandre Belloni | a1cfe7c | 2021-04-18 02:20:23 +0200 | [diff] [blame] | 338 | flags |= RTC_VL_DATA_INVALID; |
| 339 | |
| 340 | return put_user(flags, (unsigned int __user *)arg); |
Jesper Nilsson | f32bc70 | 2013-02-21 16:44:27 -0800 | [diff] [blame] | 341 | |
Jesper Nilsson | f32bc70 | 2013-02-21 16:44:27 -0800 | [diff] [blame] | 342 | default: |
| 343 | return -ENOIOCTLCMD; |
| 344 | } |
| 345 | } |
Jesper Nilsson | f32bc70 | 2013-02-21 16:44:27 -0800 | [diff] [blame] | 346 | |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 347 | static int pcf8523_rtc_read_offset(struct device *dev, long *offset) |
| 348 | { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 349 | struct pcf8523 *pcf8523 = dev_get_drvdata(dev); |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 350 | int err; |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 351 | u32 value; |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 352 | s8 val; |
| 353 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 354 | err = regmap_read(pcf8523->regmap, PCF8523_REG_OFFSET, &value); |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 355 | if (err < 0) |
| 356 | return err; |
| 357 | |
| 358 | /* sign extend the 7-bit offset value */ |
| 359 | val = value << 1; |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 360 | *offset = (value & PCF8523_OFFSET_MODE ? 4069 : 4340) * (val >> 1); |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 361 | |
| 362 | return 0; |
| 363 | } |
| 364 | |
| 365 | static int pcf8523_rtc_set_offset(struct device *dev, long offset) |
| 366 | { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 367 | struct pcf8523 *pcf8523 = dev_get_drvdata(dev); |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 368 | long reg_m0, reg_m1; |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 369 | u32 value; |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 370 | |
| 371 | reg_m0 = clamp(DIV_ROUND_CLOSEST(offset, 4340), -64L, 63L); |
| 372 | reg_m1 = clamp(DIV_ROUND_CLOSEST(offset, 4069), -64L, 63L); |
| 373 | |
| 374 | if (abs(reg_m0 * 4340 - offset) < abs(reg_m1 * 4069 - offset)) |
| 375 | value = reg_m0 & 0x7f; |
| 376 | else |
Alexandre Belloni | 4aa90c0 | 2021-07-10 23:14:31 +0200 | [diff] [blame] | 377 | value = (reg_m1 & 0x7f) | PCF8523_OFFSET_MODE; |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 378 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 379 | return regmap_write(pcf8523->regmap, PCF8523_REG_OFFSET, value); |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 380 | } |
| 381 | |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 382 | static const struct rtc_class_ops pcf8523_rtc_ops = { |
| 383 | .read_time = pcf8523_rtc_read_time, |
| 384 | .set_time = pcf8523_rtc_set_time, |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 385 | .read_alarm = pcf8523_rtc_read_alarm, |
| 386 | .set_alarm = pcf8523_rtc_set_alarm, |
| 387 | .alarm_irq_enable = pcf8523_irq_enable, |
Jesper Nilsson | f32bc70 | 2013-02-21 16:44:27 -0800 | [diff] [blame] | 388 | .ioctl = pcf8523_rtc_ioctl, |
Russell King | bc3bee0 | 2017-09-29 11:23:36 +0100 | [diff] [blame] | 389 | .read_offset = pcf8523_rtc_read_offset, |
| 390 | .set_offset = pcf8523_rtc_set_offset, |
Alexandre Belloni | f8d4e4f | 2021-10-18 17:36:50 +0200 | [diff] [blame] | 391 | .param_get = pcf8523_param_get, |
| 392 | .param_set = pcf8523_param_set, |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 393 | }; |
| 394 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 395 | static const struct regmap_config regmap_config = { |
| 396 | .reg_bits = 8, |
| 397 | .val_bits = 8, |
| 398 | .max_register = 0x13, |
| 399 | }; |
| 400 | |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 401 | static int pcf8523_probe(struct i2c_client *client, |
| 402 | const struct i2c_device_id *id) |
| 403 | { |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 404 | struct pcf8523 *pcf8523; |
Nobuhiro Iwamatsu | 9396624 | 2019-11-23 18:08:38 +0900 | [diff] [blame] | 405 | struct rtc_device *rtc; |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 406 | bool wakeup_source = false; |
Alexandre Belloni | f8d4e4f | 2021-10-18 17:36:50 +0200 | [diff] [blame] | 407 | u32 value; |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 408 | int err; |
| 409 | |
| 410 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) |
| 411 | return -ENODEV; |
| 412 | |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 413 | pcf8523 = devm_kzalloc(&client->dev, sizeof(struct pcf8523), GFP_KERNEL); |
| 414 | if (!pcf8523) |
| 415 | return -ENOMEM; |
| 416 | |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 417 | pcf8523->regmap = devm_regmap_init_i2c(client, ®map_config); |
| 418 | if (IS_ERR(pcf8523->regmap)) |
| 419 | return PTR_ERR(pcf8523->regmap); |
| 420 | |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 421 | i2c_set_clientdata(client, pcf8523); |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 422 | |
Alexandre Belloni | 8861440 | 2020-11-18 01:27:45 +0100 | [diff] [blame] | 423 | rtc = devm_rtc_allocate_device(&client->dev); |
Nobuhiro Iwamatsu | 9396624 | 2019-11-23 18:08:38 +0900 | [diff] [blame] | 424 | if (IS_ERR(rtc)) |
| 425 | return PTR_ERR(rtc); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 426 | pcf8523->rtc = rtc; |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 427 | |
| 428 | err = pcf8523_load_capacitance(pcf8523, client->dev.of_node); |
| 429 | if (err < 0) |
| 430 | dev_warn(&client->dev, "failed to set xtal load capacitance: %d", |
| 431 | err); |
| 432 | |
Alexandre Belloni | f8d4e4f | 2021-10-18 17:36:50 +0200 | [diff] [blame] | 433 | err = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value); |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 434 | if (err < 0) |
| 435 | return err; |
| 436 | |
Alexandre Belloni | f8d4e4f | 2021-10-18 17:36:50 +0200 | [diff] [blame] | 437 | if (value & PCF8523_SECONDS_OS) { |
| 438 | err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value); |
| 439 | if (err < 0) |
| 440 | return err; |
| 441 | |
| 442 | if (FIELD_GET(PCF8523_CONTROL3_PM, value) == PCF8523_PM_STANDBY) { |
| 443 | err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL3, |
| 444 | value & ~PCF8523_CONTROL3_PM); |
| 445 | if (err < 0) |
| 446 | return err; |
| 447 | } |
| 448 | } |
| 449 | |
Alexandre Belloni | 8861440 | 2020-11-18 01:27:45 +0100 | [diff] [blame] | 450 | rtc->ops = &pcf8523_rtc_ops; |
Alexandre Belloni | 219cc0f | 2020-11-18 01:27:46 +0100 | [diff] [blame] | 451 | rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; |
| 452 | rtc->range_max = RTC_TIMESTAMP_END_2099; |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 453 | rtc->uie_unsupported = 1; |
| 454 | |
| 455 | if (client->irq > 0) { |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 456 | err = regmap_write(pcf8523->regmap, PCF8523_TMR_CLKOUT_CTRL, 0x38); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 457 | if (err < 0) |
| 458 | return err; |
| 459 | |
| 460 | err = devm_request_threaded_irq(&client->dev, client->irq, |
| 461 | NULL, pcf8523_irq, |
| 462 | IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_LOW, |
Alexandre Belloni | 91f3849 | 2021-10-18 17:36:46 +0200 | [diff] [blame] | 463 | dev_name(&rtc->dev), pcf8523); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 464 | if (err) |
| 465 | return err; |
| 466 | |
| 467 | dev_pm_set_wake_irq(&client->dev, client->irq); |
| 468 | } |
| 469 | |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 470 | wakeup_source = of_property_read_bool(client->dev.of_node, "wakeup-source"); |
Alexandre Belloni | 13e37b7 | 2021-04-18 02:20:22 +0200 | [diff] [blame] | 471 | if (client->irq > 0 || wakeup_source) |
| 472 | device_init_wakeup(&client->dev, true); |
Alexandre Belloni | 8861440 | 2020-11-18 01:27:45 +0100 | [diff] [blame] | 473 | |
| 474 | return devm_rtc_register_device(rtc); |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 475 | } |
| 476 | |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 477 | static const struct i2c_device_id pcf8523_id[] = { |
| 478 | { "pcf8523", 0 }, |
| 479 | { } |
| 480 | }; |
| 481 | MODULE_DEVICE_TABLE(i2c, pcf8523_id); |
| 482 | |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 483 | static const struct of_device_id pcf8523_of_match[] = { |
| 484 | { .compatible = "nxp,pcf8523" }, |
Alexandre Belloni | 7c617e0 | 2018-12-18 22:52:12 +0100 | [diff] [blame] | 485 | { .compatible = "microcrystal,rv8523" }, |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 486 | { } |
| 487 | }; |
| 488 | MODULE_DEVICE_TABLE(of, pcf8523_of_match); |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 489 | |
| 490 | static struct i2c_driver pcf8523_driver = { |
| 491 | .driver = { |
Alexandre Belloni | 94959a3 | 2021-04-18 02:20:21 +0200 | [diff] [blame] | 492 | .name = "rtc-pcf8523", |
Alexandre Belloni | ebf48cb | 2021-10-18 17:36:49 +0200 | [diff] [blame] | 493 | .of_match_table = pcf8523_of_match, |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 494 | }, |
| 495 | .probe = pcf8523_probe, |
Thierry Reding | f803f0d | 2012-12-17 16:02:44 -0800 | [diff] [blame] | 496 | .id_table = pcf8523_id, |
| 497 | }; |
| 498 | module_i2c_driver(pcf8523_driver); |
| 499 | |
| 500 | MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>"); |
| 501 | MODULE_DESCRIPTION("NXP PCF8523 RTC driver"); |
| 502 | MODULE_LICENSE("GPL v2"); |