Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 1 | /* |
Andreas Bofjall | 24ccef3 | 2015-03-09 21:55:13 +0100 | [diff] [blame^] | 2 | * GPIO driver for Fintek Super-I/O F71869, F71882 and F71889 |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2010-2013 LaCie |
| 5 | * |
| 6 | * Author: Simon Guinot <simon.guinot@sequanux.org> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/io.h> |
| 18 | #include <linux/gpio.h> |
| 19 | |
| 20 | #define DRVNAME "gpio-f7188x" |
| 21 | |
| 22 | /* |
| 23 | * Super-I/O registers |
| 24 | */ |
| 25 | #define SIO_LDSEL 0x07 /* Logical device select */ |
| 26 | #define SIO_DEVID 0x20 /* Device ID (2 bytes) */ |
| 27 | #define SIO_DEVREV 0x22 /* Device revision */ |
| 28 | #define SIO_MANID 0x23 /* Fintek ID (2 bytes) */ |
| 29 | |
| 30 | #define SIO_LD_GPIO 0x06 /* GPIO logical device */ |
| 31 | #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ |
| 32 | #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */ |
| 33 | |
| 34 | #define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */ |
Andreas Bofjall | 24ccef3 | 2015-03-09 21:55:13 +0100 | [diff] [blame^] | 35 | #define SIO_F71869_ID 0x0814 /* F71869 chipset ID */ |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 36 | #define SIO_F71882_ID 0x0541 /* F71882 chipset ID */ |
| 37 | #define SIO_F71889_ID 0x0909 /* F71889 chipset ID */ |
| 38 | |
Andreas Bofjall | 24ccef3 | 2015-03-09 21:55:13 +0100 | [diff] [blame^] | 39 | enum chips { f71869, f71882fg, f71889f }; |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 40 | |
| 41 | static const char * const f7188x_names[] = { |
Andreas Bofjall | 24ccef3 | 2015-03-09 21:55:13 +0100 | [diff] [blame^] | 42 | "f71869", |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 43 | "f71882fg", |
| 44 | "f71889f", |
| 45 | }; |
| 46 | |
| 47 | struct f7188x_sio { |
| 48 | int addr; |
| 49 | enum chips type; |
| 50 | }; |
| 51 | |
| 52 | struct f7188x_gpio_bank { |
| 53 | struct gpio_chip chip; |
| 54 | unsigned int regbase; |
| 55 | struct f7188x_gpio_data *data; |
| 56 | }; |
| 57 | |
| 58 | struct f7188x_gpio_data { |
| 59 | struct f7188x_sio *sio; |
| 60 | int nr_bank; |
| 61 | struct f7188x_gpio_bank *bank; |
| 62 | }; |
| 63 | |
| 64 | /* |
| 65 | * Super-I/O functions. |
| 66 | */ |
| 67 | |
| 68 | static inline int superio_inb(int base, int reg) |
| 69 | { |
| 70 | outb(reg, base); |
| 71 | return inb(base + 1); |
| 72 | } |
| 73 | |
| 74 | static int superio_inw(int base, int reg) |
| 75 | { |
| 76 | int val; |
| 77 | |
| 78 | outb(reg++, base); |
| 79 | val = inb(base + 1) << 8; |
| 80 | outb(reg, base); |
| 81 | val |= inb(base + 1); |
| 82 | |
| 83 | return val; |
| 84 | } |
| 85 | |
| 86 | static inline void superio_outb(int base, int reg, int val) |
| 87 | { |
| 88 | outb(reg, base); |
| 89 | outb(val, base + 1); |
| 90 | } |
| 91 | |
| 92 | static inline int superio_enter(int base) |
| 93 | { |
| 94 | /* Don't step on other drivers' I/O space by accident. */ |
| 95 | if (!request_muxed_region(base, 2, DRVNAME)) { |
| 96 | pr_err(DRVNAME "I/O address 0x%04x already in use\n", base); |
| 97 | return -EBUSY; |
| 98 | } |
| 99 | |
| 100 | /* According to the datasheet the key must be send twice. */ |
| 101 | outb(SIO_UNLOCK_KEY, base); |
| 102 | outb(SIO_UNLOCK_KEY, base); |
| 103 | |
| 104 | return 0; |
| 105 | } |
| 106 | |
| 107 | static inline void superio_select(int base, int ld) |
| 108 | { |
| 109 | outb(SIO_LDSEL, base); |
| 110 | outb(ld, base + 1); |
| 111 | } |
| 112 | |
| 113 | static inline void superio_exit(int base) |
| 114 | { |
| 115 | outb(SIO_LOCK_KEY, base); |
| 116 | release_region(base, 2); |
| 117 | } |
| 118 | |
| 119 | /* |
| 120 | * GPIO chip. |
| 121 | */ |
| 122 | |
| 123 | static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset); |
| 124 | static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset); |
| 125 | static int f7188x_gpio_direction_out(struct gpio_chip *chip, |
| 126 | unsigned offset, int value); |
| 127 | static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value); |
| 128 | |
| 129 | #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \ |
| 130 | { \ |
| 131 | .chip = { \ |
| 132 | .label = DRVNAME, \ |
| 133 | .owner = THIS_MODULE, \ |
| 134 | .direction_input = f7188x_gpio_direction_in, \ |
| 135 | .get = f7188x_gpio_get, \ |
| 136 | .direction_output = f7188x_gpio_direction_out, \ |
| 137 | .set = f7188x_gpio_set, \ |
| 138 | .base = _base, \ |
| 139 | .ngpio = _ngpio, \ |
Simon Guinot | aeccc1b | 2014-01-03 16:04:08 +0100 | [diff] [blame] | 140 | .can_sleep = true, \ |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 141 | }, \ |
| 142 | .regbase = _regbase, \ |
| 143 | } |
| 144 | |
| 145 | #define gpio_dir(base) (base + 0) |
| 146 | #define gpio_data_out(base) (base + 1) |
| 147 | #define gpio_data_in(base) (base + 2) |
| 148 | /* Output mode register (0:open drain 1:push-pull). */ |
| 149 | #define gpio_out_mode(base) (base + 3) |
| 150 | |
Andreas Bofjall | 24ccef3 | 2015-03-09 21:55:13 +0100 | [diff] [blame^] | 151 | static struct f7188x_gpio_bank f71869_gpio_bank[] = { |
| 152 | F7188X_GPIO_BANK(0, 6, 0xF0), |
| 153 | F7188X_GPIO_BANK(10, 8, 0xE0), |
| 154 | F7188X_GPIO_BANK(20, 8, 0xD0), |
| 155 | F7188X_GPIO_BANK(30, 8, 0xC0), |
| 156 | F7188X_GPIO_BANK(40, 8, 0xB0), |
| 157 | F7188X_GPIO_BANK(50, 5, 0xA0), |
| 158 | F7188X_GPIO_BANK(60, 6, 0x90), |
| 159 | }; |
| 160 | |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 161 | static struct f7188x_gpio_bank f71882_gpio_bank[] = { |
| 162 | F7188X_GPIO_BANK(0 , 8, 0xF0), |
| 163 | F7188X_GPIO_BANK(10, 8, 0xE0), |
| 164 | F7188X_GPIO_BANK(20, 8, 0xD0), |
| 165 | F7188X_GPIO_BANK(30, 4, 0xC0), |
| 166 | F7188X_GPIO_BANK(40, 4, 0xB0), |
| 167 | }; |
| 168 | |
| 169 | static struct f7188x_gpio_bank f71889_gpio_bank[] = { |
| 170 | F7188X_GPIO_BANK(0 , 7, 0xF0), |
| 171 | F7188X_GPIO_BANK(10, 7, 0xE0), |
| 172 | F7188X_GPIO_BANK(20, 8, 0xD0), |
| 173 | F7188X_GPIO_BANK(30, 8, 0xC0), |
| 174 | F7188X_GPIO_BANK(40, 8, 0xB0), |
| 175 | F7188X_GPIO_BANK(50, 5, 0xA0), |
| 176 | F7188X_GPIO_BANK(60, 8, 0x90), |
| 177 | F7188X_GPIO_BANK(70, 8, 0x80), |
| 178 | }; |
| 179 | |
| 180 | static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) |
| 181 | { |
| 182 | int err; |
| 183 | struct f7188x_gpio_bank *bank = |
| 184 | container_of(chip, struct f7188x_gpio_bank, chip); |
| 185 | struct f7188x_sio *sio = bank->data->sio; |
| 186 | u8 dir; |
| 187 | |
| 188 | err = superio_enter(sio->addr); |
| 189 | if (err) |
| 190 | return err; |
| 191 | superio_select(sio->addr, SIO_LD_GPIO); |
| 192 | |
| 193 | dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); |
| 194 | dir &= ~(1 << offset); |
| 195 | superio_outb(sio->addr, gpio_dir(bank->regbase), dir); |
| 196 | |
| 197 | superio_exit(sio->addr); |
| 198 | |
| 199 | return 0; |
| 200 | } |
| 201 | |
| 202 | static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset) |
| 203 | { |
| 204 | int err; |
| 205 | struct f7188x_gpio_bank *bank = |
| 206 | container_of(chip, struct f7188x_gpio_bank, chip); |
| 207 | struct f7188x_sio *sio = bank->data->sio; |
| 208 | u8 dir, data; |
| 209 | |
| 210 | err = superio_enter(sio->addr); |
| 211 | if (err) |
| 212 | return err; |
| 213 | superio_select(sio->addr, SIO_LD_GPIO); |
| 214 | |
| 215 | dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); |
| 216 | dir = !!(dir & (1 << offset)); |
| 217 | if (dir) |
| 218 | data = superio_inb(sio->addr, gpio_data_out(bank->regbase)); |
| 219 | else |
| 220 | data = superio_inb(sio->addr, gpio_data_in(bank->regbase)); |
| 221 | |
| 222 | superio_exit(sio->addr); |
| 223 | |
| 224 | return !!(data & 1 << offset); |
| 225 | } |
| 226 | |
| 227 | static int f7188x_gpio_direction_out(struct gpio_chip *chip, |
| 228 | unsigned offset, int value) |
| 229 | { |
| 230 | int err; |
| 231 | struct f7188x_gpio_bank *bank = |
| 232 | container_of(chip, struct f7188x_gpio_bank, chip); |
| 233 | struct f7188x_sio *sio = bank->data->sio; |
| 234 | u8 dir, data_out; |
| 235 | |
| 236 | err = superio_enter(sio->addr); |
| 237 | if (err) |
| 238 | return err; |
| 239 | superio_select(sio->addr, SIO_LD_GPIO); |
| 240 | |
| 241 | data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase)); |
| 242 | if (value) |
| 243 | data_out |= (1 << offset); |
| 244 | else |
| 245 | data_out &= ~(1 << offset); |
| 246 | superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out); |
| 247 | |
| 248 | dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); |
| 249 | dir |= (1 << offset); |
| 250 | superio_outb(sio->addr, gpio_dir(bank->regbase), dir); |
| 251 | |
| 252 | superio_exit(sio->addr); |
| 253 | |
| 254 | return 0; |
| 255 | } |
| 256 | |
| 257 | static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 258 | { |
| 259 | int err; |
| 260 | struct f7188x_gpio_bank *bank = |
| 261 | container_of(chip, struct f7188x_gpio_bank, chip); |
| 262 | struct f7188x_sio *sio = bank->data->sio; |
| 263 | u8 data_out; |
| 264 | |
| 265 | err = superio_enter(sio->addr); |
| 266 | if (err) |
| 267 | return; |
| 268 | superio_select(sio->addr, SIO_LD_GPIO); |
| 269 | |
| 270 | data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase)); |
| 271 | if (value) |
| 272 | data_out |= (1 << offset); |
| 273 | else |
| 274 | data_out &= ~(1 << offset); |
| 275 | superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out); |
| 276 | |
| 277 | superio_exit(sio->addr); |
| 278 | } |
| 279 | |
| 280 | /* |
| 281 | * Platform device and driver. |
| 282 | */ |
| 283 | |
| 284 | static int f7188x_gpio_probe(struct platform_device *pdev) |
| 285 | { |
| 286 | int err; |
| 287 | int i; |
| 288 | struct f7188x_sio *sio = pdev->dev.platform_data; |
| 289 | struct f7188x_gpio_data *data; |
| 290 | |
| 291 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); |
| 292 | if (!data) |
| 293 | return -ENOMEM; |
| 294 | |
| 295 | switch (sio->type) { |
Andreas Bofjall | 24ccef3 | 2015-03-09 21:55:13 +0100 | [diff] [blame^] | 296 | case f71869: |
| 297 | data->nr_bank = ARRAY_SIZE(f71869_gpio_bank); |
| 298 | data->bank = f71869_gpio_bank; |
| 299 | break; |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 300 | case f71882fg: |
| 301 | data->nr_bank = ARRAY_SIZE(f71882_gpio_bank); |
| 302 | data->bank = f71882_gpio_bank; |
| 303 | break; |
| 304 | case f71889f: |
| 305 | data->nr_bank = ARRAY_SIZE(f71889_gpio_bank); |
| 306 | data->bank = f71889_gpio_bank; |
| 307 | break; |
| 308 | default: |
| 309 | return -ENODEV; |
| 310 | } |
| 311 | data->sio = sio; |
| 312 | |
| 313 | platform_set_drvdata(pdev, data); |
| 314 | |
| 315 | /* For each GPIO bank, register a GPIO chip. */ |
| 316 | for (i = 0; i < data->nr_bank; i++) { |
| 317 | struct f7188x_gpio_bank *bank = &data->bank[i]; |
| 318 | |
| 319 | bank->chip.dev = &pdev->dev; |
| 320 | bank->data = data; |
| 321 | |
| 322 | err = gpiochip_add(&bank->chip); |
| 323 | if (err) { |
| 324 | dev_err(&pdev->dev, |
| 325 | "Failed to register gpiochip %d: %d\n", |
| 326 | i, err); |
| 327 | goto err_gpiochip; |
| 328 | } |
| 329 | } |
| 330 | |
| 331 | return 0; |
| 332 | |
| 333 | err_gpiochip: |
| 334 | for (i = i - 1; i >= 0; i--) { |
| 335 | struct f7188x_gpio_bank *bank = &data->bank[i]; |
abdoulaye berthe | 9f5132a | 2014-07-12 22:30:12 +0200 | [diff] [blame] | 336 | gpiochip_remove(&bank->chip); |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 337 | } |
| 338 | |
| 339 | return err; |
| 340 | } |
| 341 | |
| 342 | static int f7188x_gpio_remove(struct platform_device *pdev) |
| 343 | { |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 344 | int i; |
| 345 | struct f7188x_gpio_data *data = platform_get_drvdata(pdev); |
| 346 | |
| 347 | for (i = 0; i < data->nr_bank; i++) { |
| 348 | struct f7188x_gpio_bank *bank = &data->bank[i]; |
abdoulaye berthe | 9f5132a | 2014-07-12 22:30:12 +0200 | [diff] [blame] | 349 | gpiochip_remove(&bank->chip); |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 350 | } |
| 351 | |
| 352 | return 0; |
| 353 | } |
| 354 | |
| 355 | static int __init f7188x_find(int addr, struct f7188x_sio *sio) |
| 356 | { |
| 357 | int err; |
| 358 | u16 devid; |
| 359 | |
| 360 | err = superio_enter(addr); |
| 361 | if (err) |
| 362 | return err; |
| 363 | |
| 364 | err = -ENODEV; |
| 365 | devid = superio_inw(addr, SIO_MANID); |
| 366 | if (devid != SIO_FINTEK_ID) { |
| 367 | pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr); |
| 368 | goto err; |
| 369 | } |
| 370 | |
| 371 | devid = superio_inw(addr, SIO_DEVID); |
| 372 | switch (devid) { |
Andreas Bofjall | 24ccef3 | 2015-03-09 21:55:13 +0100 | [diff] [blame^] | 373 | case SIO_F71869_ID: |
| 374 | sio->type = f71869; |
| 375 | break; |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 376 | case SIO_F71882_ID: |
| 377 | sio->type = f71882fg; |
| 378 | break; |
| 379 | case SIO_F71889_ID: |
| 380 | sio->type = f71889f; |
| 381 | break; |
| 382 | default: |
| 383 | pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid); |
| 384 | goto err; |
| 385 | } |
| 386 | sio->addr = addr; |
| 387 | err = 0; |
| 388 | |
| 389 | pr_info(DRVNAME ": Found %s at %#x, revision %d\n", |
| 390 | f7188x_names[sio->type], |
| 391 | (unsigned int) addr, |
| 392 | (int) superio_inb(addr, SIO_DEVREV)); |
| 393 | |
| 394 | err: |
| 395 | superio_exit(addr); |
| 396 | return err; |
| 397 | } |
| 398 | |
| 399 | static struct platform_device *f7188x_gpio_pdev; |
| 400 | |
| 401 | static int __init |
| 402 | f7188x_gpio_device_add(const struct f7188x_sio *sio) |
| 403 | { |
| 404 | int err; |
| 405 | |
| 406 | f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1); |
| 407 | if (!f7188x_gpio_pdev) |
| 408 | return -ENOMEM; |
| 409 | |
| 410 | err = platform_device_add_data(f7188x_gpio_pdev, |
| 411 | sio, sizeof(*sio)); |
| 412 | if (err) { |
| 413 | pr_err(DRVNAME "Platform data allocation failed\n"); |
| 414 | goto err; |
| 415 | } |
| 416 | |
| 417 | err = platform_device_add(f7188x_gpio_pdev); |
| 418 | if (err) { |
| 419 | pr_err(DRVNAME "Device addition failed\n"); |
| 420 | goto err; |
| 421 | } |
| 422 | |
| 423 | return 0; |
| 424 | |
| 425 | err: |
| 426 | platform_device_put(f7188x_gpio_pdev); |
| 427 | |
| 428 | return err; |
| 429 | } |
| 430 | |
| 431 | /* |
Andreas Bofjall | 3f8f4f1 | 2015-03-09 21:55:12 +0100 | [diff] [blame] | 432 | * Try to match a supported Fintek device by reading the (hard-wired) |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 433 | * configuration I/O ports. If available, then register both the platform |
| 434 | * device and driver to support the GPIOs. |
| 435 | */ |
| 436 | |
| 437 | static struct platform_driver f7188x_gpio_driver = { |
| 438 | .driver = { |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 439 | .name = DRVNAME, |
| 440 | }, |
| 441 | .probe = f7188x_gpio_probe, |
| 442 | .remove = f7188x_gpio_remove, |
| 443 | }; |
| 444 | |
| 445 | static int __init f7188x_gpio_init(void) |
| 446 | { |
| 447 | int err; |
| 448 | struct f7188x_sio sio; |
| 449 | |
| 450 | if (f7188x_find(0x2e, &sio) && |
| 451 | f7188x_find(0x4e, &sio)) |
| 452 | return -ENODEV; |
| 453 | |
| 454 | err = platform_driver_register(&f7188x_gpio_driver); |
| 455 | if (!err) { |
| 456 | err = f7188x_gpio_device_add(&sio); |
| 457 | if (err) |
| 458 | platform_driver_unregister(&f7188x_gpio_driver); |
| 459 | } |
| 460 | |
| 461 | return err; |
| 462 | } |
| 463 | subsys_initcall(f7188x_gpio_init); |
| 464 | |
| 465 | static void __exit f7188x_gpio_exit(void) |
| 466 | { |
| 467 | platform_device_unregister(f7188x_gpio_pdev); |
| 468 | platform_driver_unregister(&f7188x_gpio_driver); |
| 469 | } |
| 470 | module_exit(f7188x_gpio_exit); |
| 471 | |
Andreas Bofjall | 24ccef3 | 2015-03-09 21:55:13 +0100 | [diff] [blame^] | 472 | MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71882FG and F71889F"); |
Simon Guinot | 6c17aa0 | 2013-08-29 22:56:56 +0200 | [diff] [blame] | 473 | MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>"); |
| 474 | MODULE_LICENSE("GPL"); |