Krzysztof Kozlowski | cc4637f | 2017-12-25 11:40:09 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Sachin Kamat | 9dd51c9 | 2013-12-12 07:32:39 +0900 | [diff] [blame] | 2 | /* |
| 3 | * Samsung's Exynos5420 based Arndale Octa board device tree source |
| 4 | * |
| 5 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| 6 | * http://www.samsung.com |
Krzysztof Kozlowski | cc4637f | 2017-12-25 11:40:09 +0100 | [diff] [blame] | 7 | */ |
Sachin Kamat | 9dd51c9 | 2013-12-12 07:32:39 +0900 | [diff] [blame] | 8 | |
| 9 | /dts-v1/; |
| 10 | #include "exynos5420.dtsi" |
Krzysztof Kozlowski | 4f0d20e | 2015-12-11 15:05:56 +0900 | [diff] [blame] | 11 | #include "exynos5420-cpus.dtsi" |
Javier Martinez Canillas | 31b9903 | 2015-10-08 07:39:58 +0900 | [diff] [blame] | 12 | #include <dt-bindings/gpio/gpio.h> |
Sachin Kamat | f4deb68 | 2014-02-24 08:47:29 +0900 | [diff] [blame] | 13 | #include <dt-bindings/interrupt-controller/irq.h> |
Sachin Kamat | 0c6f651 | 2014-02-24 08:54:51 +0900 | [diff] [blame] | 14 | #include <dt-bindings/input/input.h> |
Krzysztof Kozlowski | ce9940a | 2015-05-02 14:40:08 +0900 | [diff] [blame] | 15 | #include <dt-bindings/clock/samsung,s2mps11.h> |
Sachin Kamat | 9dd51c9 | 2013-12-12 07:32:39 +0900 | [diff] [blame] | 16 | |
| 17 | / { |
| 18 | model = "Insignal Arndale Octa evaluation board based on EXYNOS5420"; |
Sachin Kamat | 8bdb31b | 2014-03-21 02:17:22 +0900 | [diff] [blame] | 19 | compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5"; |
Sachin Kamat | 9dd51c9 | 2013-12-12 07:32:39 +0900 | [diff] [blame] | 20 | |
Javier Martinez Canillas | a0eb109 | 2016-09-01 11:06:56 +0200 | [diff] [blame] | 21 | memory@20000000 { |
Javier Martinez Canillas | 12676ee | 2016-09-01 11:06:53 +0200 | [diff] [blame] | 22 | device_type = "memory"; |
Sachin Kamat | 9dd51c9 | 2013-12-12 07:32:39 +0900 | [diff] [blame] | 23 | reg = <0x20000000 0x80000000>; |
| 24 | }; |
| 25 | |
| 26 | chosen { |
Krzysztof Kozlowski | f35020b | 2019-02-18 18:32:56 +0100 | [diff] [blame] | 27 | stdout-path = "serial3:115200n8"; |
Sachin Kamat | 9dd51c9 | 2013-12-12 07:32:39 +0900 | [diff] [blame] | 28 | }; |
| 29 | |
Rob Herring | 8dccafa | 2017-10-13 12:54:51 -0500 | [diff] [blame] | 30 | firmware@2073000 { |
Tushar Behera | 345e9bf | 2014-05-31 02:21:50 +0900 | [diff] [blame] | 31 | compatible = "samsung,secure-firmware"; |
| 32 | reg = <0x02073000 0x1000>; |
| 33 | }; |
| 34 | |
Sachin Kamat | 9dd51c9 | 2013-12-12 07:32:39 +0900 | [diff] [blame] | 35 | fixed-rate-clocks { |
| 36 | oscclk { |
| 37 | compatible = "samsung,exynos5420-oscclk"; |
| 38 | clock-frequency = <24000000>; |
| 39 | }; |
| 40 | }; |
| 41 | |
Sachin Kamat | 0c6f651 | 2014-02-24 08:54:51 +0900 | [diff] [blame] | 42 | gpio_keys { |
| 43 | compatible = "gpio-keys"; |
| 44 | |
| 45 | wakeup { |
| 46 | label = "SW-TACT1"; |
Javier Martinez Canillas | 31b9903 | 2015-10-08 07:39:58 +0900 | [diff] [blame] | 47 | gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; |
Sachin Kamat | 0c6f651 | 2014-02-24 08:54:51 +0900 | [diff] [blame] | 48 | linux,code = <KEY_WAKEUP>; |
Sudeep Holla | 36a0282 | 2016-01-28 15:59:58 +0000 | [diff] [blame] | 49 | wakeup-source; |
Sachin Kamat | 0c6f651 | 2014-02-24 08:54:51 +0900 | [diff] [blame] | 50 | }; |
| 51 | }; |
Sachin Kamat | 9dd51c9 | 2013-12-12 07:32:39 +0900 | [diff] [blame] | 52 | }; |
Sjoerd Simons | 4e03394 | 2014-09-25 17:32:31 +0900 | [diff] [blame] | 53 | |
Krzysztof Kozlowski | 23c8567 | 2019-02-23 21:29:32 +0100 | [diff] [blame^] | 54 | &adc { |
| 55 | vdd-supply = <&ldo4_reg>; |
| 56 | status = "okay"; |
| 57 | }; |
| 58 | |
Krzysztof Kozlowski | eb1d0a5 | 2019-02-18 20:48:41 +0100 | [diff] [blame] | 59 | &cci { |
| 60 | status = "disabled"; |
| 61 | }; |
| 62 | |
Bartlomiej Zolnierkiewicz | 8b51c5e | 2015-12-15 18:33:15 +0100 | [diff] [blame] | 63 | &cpu0 { |
| 64 | cpu-supply = <&buck2_reg>; |
| 65 | }; |
| 66 | |
| 67 | &cpu4 { |
| 68 | cpu-supply = <&buck6_reg>; |
| 69 | }; |
| 70 | |
Krzysztof Kozlowski | 29a0a2a | 2019-02-18 20:48:40 +0100 | [diff] [blame] | 71 | &cpu0_thermal { |
| 72 | trips { |
| 73 | cpu0_alert0: cpu-alert-0 { |
| 74 | temperature = <60000>; /* millicelsius */ |
| 75 | hysteresis = <5000>; /* millicelsius */ |
| 76 | type = "passive"; |
| 77 | }; |
| 78 | cpu0_alert1: cpu-alert-1 { |
| 79 | temperature = <80000>; /* millicelsius */ |
| 80 | hysteresis = <10000>; /* millicelsius */ |
| 81 | type = "passive"; |
| 82 | }; |
| 83 | cpu0_alert2: cpu-alert-2 { |
| 84 | temperature = <110000>; /* millicelsius */ |
| 85 | hysteresis = <10000>; /* millicelsius */ |
| 86 | type = "passive"; |
| 87 | }; |
| 88 | cpu0_crit0: cpu-crit-0 { |
| 89 | temperature = <120000>; /* millicelsius */ |
| 90 | hysteresis = <0>; /* millicelsius */ |
| 91 | type = "critical"; |
| 92 | }; |
| 93 | }; |
| 94 | |
| 95 | cooling-maps { |
| 96 | /* |
| 97 | * Reduce the CPU speed by 2 steps, down to: 1600 MHz |
| 98 | * and 1100 MHz. |
| 99 | */ |
| 100 | map0 { |
| 101 | trip = <&cpu0_alert0>; |
| 102 | cooling-device = <&cpu0 0 2>, |
| 103 | <&cpu1 0 2>, |
| 104 | <&cpu2 0 2>, |
| 105 | <&cpu3 0 2>, |
| 106 | <&cpu4 0 2>, |
| 107 | <&cpu5 0 2>, |
| 108 | <&cpu6 0 2>, |
| 109 | <&cpu7 0 2>; |
| 110 | }; |
| 111 | |
| 112 | /* |
| 113 | * Reduce the CPU speed down to 1200 MHz big (6 steps) |
| 114 | * and 800 MHz LITTLE (5 steps). |
| 115 | */ |
| 116 | map1 { |
| 117 | trip = <&cpu0_alert1>; |
| 118 | cooling-device = <&cpu0 3 6>, |
| 119 | <&cpu1 3 6>, |
| 120 | <&cpu2 3 6>, |
| 121 | <&cpu3 3 6>, |
| 122 | <&cpu4 3 5>, |
| 123 | <&cpu5 3 5>, |
| 124 | <&cpu6 3 5>, |
| 125 | <&cpu7 3 5>; |
| 126 | }; |
| 127 | |
| 128 | /* |
| 129 | * Reduce the CPU speed as much as possible, down to 700 MHz |
| 130 | * big (11 steps) and 600 MHz LITTLE (7 steps). |
| 131 | */ |
| 132 | map2 { |
| 133 | trip = <&cpu0_alert2>; |
| 134 | cooling-device = <&cpu0 6 11>, |
| 135 | <&cpu1 6 11>, |
| 136 | <&cpu2 6 11>, |
| 137 | <&cpu3 6 11>, |
| 138 | <&cpu4 5 7>, |
| 139 | <&cpu5 5 7>, |
| 140 | <&cpu6 5 7>, |
| 141 | <&cpu7 5 7>; |
| 142 | }; |
| 143 | }; |
| 144 | }; |
| 145 | |
| 146 | &cpu1_thermal { |
| 147 | trips { |
| 148 | cpu1_alert0: cpu-alert-0 { |
| 149 | temperature = <60000>; /* millicelsius */ |
| 150 | hysteresis = <5000>; /* millicelsius */ |
| 151 | type = "passive"; |
| 152 | }; |
| 153 | cpu1_alert1: cpu-alert-1 { |
| 154 | temperature = <80000>; /* millicelsius */ |
| 155 | hysteresis = <10000>; /* millicelsius */ |
| 156 | type = "passive"; |
| 157 | }; |
| 158 | cpu1_alert2: cpu-alert-2 { |
| 159 | temperature = <110000>; /* millicelsius */ |
| 160 | hysteresis = <10000>; /* millicelsius */ |
| 161 | type = "passive"; |
| 162 | }; |
| 163 | cpu1_crit0: cpu-crit-0 { |
| 164 | temperature = <120000>; /* millicelsius */ |
| 165 | hysteresis = <0>; /* millicelsius */ |
| 166 | type = "critical"; |
| 167 | }; |
| 168 | }; |
| 169 | |
| 170 | cooling-maps { |
| 171 | map0 { |
| 172 | trip = <&cpu1_alert0>; |
| 173 | cooling-device = <&cpu0 0 2>, |
| 174 | <&cpu1 0 2>, |
| 175 | <&cpu2 0 2>, |
| 176 | <&cpu3 0 2>, |
| 177 | <&cpu4 0 2>, |
| 178 | <&cpu5 0 2>, |
| 179 | <&cpu6 0 2>, |
| 180 | <&cpu7 0 2>; |
| 181 | }; |
| 182 | |
| 183 | map1 { |
| 184 | trip = <&cpu1_alert1>; |
| 185 | cooling-device = <&cpu0 3 6>, |
| 186 | <&cpu1 3 6>, |
| 187 | <&cpu2 3 6>, |
| 188 | <&cpu3 3 6>, |
| 189 | <&cpu4 3 5>, |
| 190 | <&cpu5 3 5>, |
| 191 | <&cpu6 3 5>, |
| 192 | <&cpu7 3 5>; |
| 193 | }; |
| 194 | |
| 195 | map2 { |
| 196 | trip = <&cpu1_alert2>; |
| 197 | cooling-device = <&cpu0 6 11>, |
| 198 | <&cpu1 6 11>, |
| 199 | <&cpu2 6 11>, |
| 200 | <&cpu3 6 11>, |
| 201 | <&cpu4 5 7>, |
| 202 | <&cpu5 5 7>, |
| 203 | <&cpu6 5 7>, |
| 204 | <&cpu7 5 7>; |
| 205 | }; |
| 206 | }; |
| 207 | }; |
| 208 | |
| 209 | &cpu2_thermal { |
| 210 | trips { |
| 211 | cpu2_alert0: cpu-alert-0 { |
| 212 | temperature = <60000>; /* millicelsius */ |
| 213 | hysteresis = <5000>; /* millicelsius */ |
| 214 | type = "passive"; |
| 215 | }; |
| 216 | cpu2_alert1: cpu-alert-1 { |
| 217 | temperature = <80000>; /* millicelsius */ |
| 218 | hysteresis = <10000>; /* millicelsius */ |
| 219 | type = "passive"; |
| 220 | }; |
| 221 | cpu2_alert2: cpu-alert-2 { |
| 222 | temperature = <110000>; /* millicelsius */ |
| 223 | hysteresis = <10000>; /* millicelsius */ |
| 224 | type = "passive"; |
| 225 | }; |
| 226 | cpu2_crit0: cpu-crit-0 { |
| 227 | temperature = <120000>; /* millicelsius */ |
| 228 | hysteresis = <0>; /* millicelsius */ |
| 229 | type = "critical"; |
| 230 | }; |
| 231 | }; |
| 232 | |
| 233 | cooling-maps { |
| 234 | map0 { |
| 235 | trip = <&cpu2_alert0>; |
| 236 | cooling-device = <&cpu0 0 2>, |
| 237 | <&cpu1 0 2>, |
| 238 | <&cpu2 0 2>, |
| 239 | <&cpu3 0 2>, |
| 240 | <&cpu4 0 2>, |
| 241 | <&cpu5 0 2>, |
| 242 | <&cpu6 0 2>, |
| 243 | <&cpu7 0 2>; |
| 244 | }; |
| 245 | |
| 246 | map1 { |
| 247 | trip = <&cpu2_alert1>; |
| 248 | cooling-device = <&cpu0 3 6>, |
| 249 | <&cpu1 3 6>, |
| 250 | <&cpu2 3 6>, |
| 251 | <&cpu3 3 6>, |
| 252 | <&cpu4 3 5>, |
| 253 | <&cpu5 3 5>, |
| 254 | <&cpu6 3 5>, |
| 255 | <&cpu7 3 5>; |
| 256 | }; |
| 257 | |
| 258 | map2 { |
| 259 | trip = <&cpu2_alert2>; |
| 260 | cooling-device = <&cpu0 6 11>, |
| 261 | <&cpu1 6 11>, |
| 262 | <&cpu2 6 11>, |
| 263 | <&cpu3 6 11>, |
| 264 | <&cpu4 6 7>, |
| 265 | <&cpu5 6 7>, |
| 266 | <&cpu6 6 7>, |
| 267 | <&cpu7 6 7>; |
| 268 | }; |
| 269 | }; |
| 270 | }; |
| 271 | |
| 272 | &cpu3_thermal { |
| 273 | trips { |
| 274 | cpu3_alert0: cpu-alert-0 { |
| 275 | temperature = <60000>; /* millicelsius */ |
| 276 | hysteresis = <5000>; /* millicelsius */ |
| 277 | type = "passive"; |
| 278 | }; |
| 279 | cpu3_alert1: cpu-alert-1 { |
| 280 | temperature = <80000>; /* millicelsius */ |
| 281 | hysteresis = <10000>; /* millicelsius */ |
| 282 | type = "passive"; |
| 283 | }; |
| 284 | cpu3_alert2: cpu-alert-2 { |
| 285 | temperature = <110000>; /* millicelsius */ |
| 286 | hysteresis = <10000>; /* millicelsius */ |
| 287 | type = "passive"; |
| 288 | }; |
| 289 | cpu3_crit0: cpu-crit-0 { |
| 290 | temperature = <120000>; /* millicelsius */ |
| 291 | hysteresis = <0>; /* millicelsius */ |
| 292 | type = "critical"; |
| 293 | }; |
| 294 | }; |
| 295 | |
| 296 | cooling-maps { |
| 297 | map0 { |
| 298 | trip = <&cpu3_alert0>; |
| 299 | cooling-device = <&cpu0 0 2>, |
| 300 | <&cpu1 0 2>, |
| 301 | <&cpu2 0 2>, |
| 302 | <&cpu3 0 2>, |
| 303 | <&cpu4 0 2>, |
| 304 | <&cpu5 0 2>, |
| 305 | <&cpu6 0 2>, |
| 306 | <&cpu7 0 2>; |
| 307 | }; |
| 308 | |
| 309 | map1 { |
| 310 | trip = <&cpu3_alert1>; |
| 311 | cooling-device = <&cpu0 3 6>, |
| 312 | <&cpu1 3 6>, |
| 313 | <&cpu2 3 6>, |
| 314 | <&cpu3 3 6>, |
| 315 | <&cpu4 3 5>, |
| 316 | <&cpu5 3 5>, |
| 317 | <&cpu6 3 5>, |
| 318 | <&cpu7 3 5>; |
| 319 | }; |
| 320 | |
| 321 | map2 { |
| 322 | trip = <&cpu3_alert2>; |
| 323 | cooling-device = <&cpu0 6 11>, |
| 324 | <&cpu1 6 11>, |
| 325 | <&cpu2 6 11>, |
| 326 | <&cpu3 6 11>, |
| 327 | <&cpu4 5 7>, |
| 328 | <&cpu5 5 7>, |
| 329 | <&cpu6 5 7>, |
| 330 | <&cpu7 5 7>; |
| 331 | }; |
| 332 | }; |
| 333 | }; |
| 334 | |
Milo Kim | d7ec05c | 2016-08-31 15:08:47 +0900 | [diff] [blame] | 335 | &hdmi { |
| 336 | hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; |
| 337 | vdd_osc-supply = <&ldo7_reg>; |
| 338 | vdd_pll-supply = <&ldo6_reg>; |
| 339 | vdd-supply = <&ldo6_reg>; |
| 340 | ddc = <&i2c_2>; |
| 341 | status = "okay"; |
| 342 | }; |
| 343 | |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 344 | &hsi2c_4 { |
| 345 | status = "okay"; |
| 346 | |
| 347 | s2mps11_pmic@66 { |
| 348 | compatible = "samsung,s2mps11-pmic"; |
| 349 | reg = <0x66>; |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 350 | |
| 351 | interrupt-parent = <&gpx3>; |
| 352 | interrupts = <2 IRQ_TYPE_EDGE_FALLING>; |
| 353 | pinctrl-names = "default"; |
| 354 | pinctrl-0 = <&s2mps11_irq>; |
| 355 | |
| 356 | s2mps11_osc: clocks { |
Krzysztof Kozlowski | 3f9d867 | 2018-07-25 17:55:16 +0200 | [diff] [blame] | 357 | compatible = "samsung,s2mps11-clk"; |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 358 | #clock-cells = <1>; |
| 359 | clock-output-names = "s2mps11_ap", |
| 360 | "s2mps11_cp", "s2mps11_bt"; |
| 361 | }; |
| 362 | |
| 363 | regulators { |
| 364 | ldo1_reg: LDO1 { |
| 365 | regulator-name = "PVDD_ALIVE_1V0"; |
| 366 | regulator-min-microvolt = <1000000>; |
| 367 | regulator-max-microvolt = <1000000>; |
| 368 | regulator-always-on; |
| 369 | }; |
| 370 | |
| 371 | ldo2_reg: LDO2 { |
| 372 | regulator-name = "PVDD_APIO_1V8"; |
| 373 | regulator-min-microvolt = <1800000>; |
| 374 | regulator-max-microvolt = <1800000>; |
| 375 | }; |
| 376 | |
| 377 | ldo3_reg: LDO3 { |
| 378 | regulator-name = "PVDD_APIO_MMCON_1V8"; |
| 379 | regulator-min-microvolt = <1800000>; |
| 380 | regulator-max-microvolt = <1800000>; |
| 381 | regulator-always-on; |
| 382 | }; |
| 383 | |
| 384 | ldo4_reg: LDO4 { |
| 385 | regulator-name = "PVDD_ADC_1V8"; |
| 386 | regulator-min-microvolt = <1800000>; |
| 387 | regulator-max-microvolt = <1800000>; |
| 388 | }; |
| 389 | |
| 390 | ldo5_reg: LDO5 { |
| 391 | regulator-name = "PVDD_PLL_1V8"; |
| 392 | regulator-min-microvolt = <1800000>; |
| 393 | regulator-max-microvolt = <1800000>; |
| 394 | regulator-always-on; |
| 395 | }; |
| 396 | |
| 397 | ldo6_reg: LDO6 { |
| 398 | regulator-name = "PVDD_ANAIP_1V0"; |
| 399 | regulator-min-microvolt = <1000000>; |
| 400 | regulator-max-microvolt = <1000000>; |
| 401 | }; |
| 402 | |
| 403 | ldo7_reg: LDO7 { |
| 404 | regulator-name = "PVDD_ANAIP_1V8"; |
| 405 | regulator-min-microvolt = <1800000>; |
| 406 | regulator-max-microvolt = <1800000>; |
| 407 | }; |
| 408 | |
| 409 | ldo8_reg: LDO8 { |
| 410 | regulator-name = "PVDD_ABB_1V8"; |
| 411 | regulator-min-microvolt = <1800000>; |
| 412 | regulator-max-microvolt = <1800000>; |
| 413 | }; |
| 414 | |
| 415 | ldo9_reg: LDO9 { |
| 416 | regulator-name = "PVDD_USB_3V3"; |
| 417 | regulator-min-microvolt = <3000000>; |
| 418 | regulator-max-microvolt = <3000000>; |
| 419 | regulator-always-on; |
| 420 | }; |
| 421 | |
| 422 | ldo10_reg: LDO10 { |
| 423 | regulator-name = "PVDD_PRE_1V8"; |
| 424 | regulator-min-microvolt = <1800000>; |
| 425 | regulator-max-microvolt = <1800000>; |
| 426 | regulator-always-on; |
| 427 | }; |
| 428 | |
| 429 | ldo11_reg: LDO11 { |
| 430 | regulator-name = "PVDD_USB_1V0"; |
| 431 | regulator-min-microvolt = <1000000>; |
| 432 | regulator-max-microvolt = <1000000>; |
| 433 | regulator-always-on; |
| 434 | }; |
| 435 | |
| 436 | ldo12_reg: LDO12 { |
| 437 | regulator-name = "PVDD_HSIC_1V8"; |
| 438 | regulator-min-microvolt = <1800000>; |
| 439 | regulator-max-microvolt = <1800000>; |
| 440 | }; |
| 441 | |
| 442 | ldo13_reg: LDO13 { |
| 443 | regulator-name = "PVDD_APIO_MMCOFF_2V8"; |
| 444 | regulator-min-microvolt = <2800000>; |
| 445 | regulator-max-microvolt = <2800000>; |
| 446 | }; |
| 447 | |
Krzysztof Kozlowski | 3619452 | 2019-02-18 18:32:57 +0100 | [diff] [blame] | 448 | ldo14_reg: LDO14 { |
| 449 | /* Unused */ |
| 450 | regulator-name = "PVDD_LDO14"; |
| 451 | regulator-min-microvolt = <800000>; |
| 452 | regulator-max-microvolt = <3950000>; |
| 453 | }; |
| 454 | |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 455 | ldo15_reg: LDO15 { |
| 456 | regulator-name = "PVDD_PERI_2V8"; |
| 457 | regulator-min-microvolt = <3300000>; |
| 458 | regulator-max-microvolt = <3300000>; |
| 459 | }; |
| 460 | |
| 461 | ldo16_reg: LDO16 { |
| 462 | regulator-name = "PVDD_PERI_3V3"; |
| 463 | regulator-min-microvolt = <2200000>; |
| 464 | regulator-max-microvolt = <2200000>; |
| 465 | }; |
| 466 | |
Krzysztof Kozlowski | 3619452 | 2019-02-18 18:32:57 +0100 | [diff] [blame] | 467 | ldo17_reg: LDO17 { |
| 468 | /* Unused */ |
| 469 | regulator-name = "PVDD_LDO17"; |
| 470 | regulator-min-microvolt = <800000>; |
| 471 | regulator-max-microvolt = <3950000>; |
| 472 | }; |
| 473 | |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 474 | ldo18_reg: LDO18 { |
| 475 | regulator-name = "PVDD_EMMC_1V8"; |
| 476 | regulator-min-microvolt = <1800000>; |
| 477 | regulator-max-microvolt = <1800000>; |
| 478 | }; |
| 479 | |
| 480 | ldo19_reg: LDO19 { |
| 481 | regulator-name = "PVDD_TFLASH_2V8"; |
| 482 | regulator-min-microvolt = <2800000>; |
| 483 | regulator-max-microvolt = <2800000>; |
| 484 | }; |
| 485 | |
| 486 | ldo20_reg: LDO20 { |
| 487 | regulator-name = "PVDD_BTWIFI_1V8"; |
| 488 | regulator-min-microvolt = <1800000>; |
| 489 | regulator-max-microvolt = <1800000>; |
| 490 | }; |
| 491 | |
| 492 | ldo21_reg: LDO21 { |
| 493 | regulator-name = "PVDD_CAM1IO_1V8"; |
| 494 | regulator-min-microvolt = <1800000>; |
| 495 | regulator-max-microvolt = <1800000>; |
| 496 | }; |
| 497 | |
Krzysztof Kozlowski | 3619452 | 2019-02-18 18:32:57 +0100 | [diff] [blame] | 498 | ldo22_reg: LDO22 { |
| 499 | /* Unused */ |
| 500 | regulator-name = "PVDD_LDO22"; |
| 501 | regulator-min-microvolt = <800000>; |
| 502 | regulator-max-microvolt = <2375000>; |
| 503 | }; |
| 504 | |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 505 | ldo23_reg: LDO23 { |
| 506 | regulator-name = "PVDD_MIFS_1V1"; |
| 507 | regulator-min-microvolt = <1200000>; |
| 508 | regulator-max-microvolt = <1200000>; |
| 509 | regulator-always-on; |
| 510 | }; |
| 511 | |
| 512 | ldo24_reg: LDO24 { |
| 513 | regulator-name = "PVDD_CAM1_AVDD_2V8"; |
| 514 | regulator-min-microvolt = <2800000>; |
| 515 | regulator-max-microvolt = <2800000>; |
| 516 | }; |
| 517 | |
Krzysztof Kozlowski | 3619452 | 2019-02-18 18:32:57 +0100 | [diff] [blame] | 518 | ldo25_reg: LDO25 { |
| 519 | /* Unused */ |
| 520 | regulator-name = "PVDD_LDO25"; |
| 521 | regulator-min-microvolt = <800000>; |
| 522 | regulator-max-microvolt = <3950000>; |
| 523 | }; |
| 524 | |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 525 | ldo26_reg: LDO26 { |
| 526 | regulator-name = "PVDD_CAM0_AF_2V8"; |
| 527 | regulator-min-microvolt = <3000000>; |
| 528 | regulator-max-microvolt = <3000000>; |
| 529 | }; |
| 530 | |
| 531 | ldo27_reg: LDO27 { |
| 532 | regulator-name = "PVDD_G3DS_1V0"; |
| 533 | regulator-min-microvolt = <1200000>; |
| 534 | regulator-max-microvolt = <1200000>; |
| 535 | }; |
| 536 | |
| 537 | ldo28_reg: LDO28 { |
| 538 | regulator-name = "PVDD_TSP_3V3"; |
| 539 | regulator-min-microvolt = <3300000>; |
| 540 | regulator-max-microvolt = <3300000>; |
| 541 | }; |
| 542 | |
| 543 | ldo29_reg: LDO29 { |
| 544 | regulator-name = "PVDD_AUDIO_1V8"; |
| 545 | regulator-min-microvolt = <1800000>; |
| 546 | regulator-max-microvolt = <1800000>; |
| 547 | }; |
| 548 | |
Krzysztof Kozlowski | 3619452 | 2019-02-18 18:32:57 +0100 | [diff] [blame] | 549 | ldo30_reg: LDO30 { |
| 550 | /* Unused */ |
| 551 | regulator-name = "PVDD_LDO30"; |
| 552 | regulator-min-microvolt = <800000>; |
| 553 | regulator-max-microvolt = <3950000>; |
| 554 | }; |
| 555 | |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 556 | ldo31_reg: LDO31 { |
| 557 | regulator-name = "PVDD_PERI_1V8"; |
| 558 | regulator-min-microvolt = <1800000>; |
| 559 | regulator-max-microvolt = <1800000>; |
| 560 | }; |
| 561 | |
| 562 | ldo32_reg: LDO32 { |
| 563 | regulator-name = "PVDD_LCD_1V8"; |
| 564 | regulator-min-microvolt = <1800000>; |
| 565 | regulator-max-microvolt = <1800000>; |
| 566 | }; |
| 567 | |
| 568 | ldo33_reg: LDO33 { |
| 569 | regulator-name = "PVDD_CAM0IO_1V8"; |
| 570 | regulator-min-microvolt = <1800000>; |
| 571 | regulator-max-microvolt = <1800000>; |
| 572 | }; |
| 573 | |
Krzysztof Kozlowski | 3619452 | 2019-02-18 18:32:57 +0100 | [diff] [blame] | 574 | ldo34_reg: LDO34 { |
| 575 | /* Unused */ |
| 576 | regulator-name = "PVDD_LDO34"; |
| 577 | regulator-min-microvolt = <800000>; |
| 578 | regulator-max-microvolt = <3950000>; |
| 579 | }; |
| 580 | |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 581 | ldo35_reg: LDO35 { |
| 582 | regulator-name = "PVDD_CAM0_DVDD_1V2"; |
| 583 | regulator-min-microvolt = <1200000>; |
| 584 | regulator-max-microvolt = <1200000>; |
| 585 | }; |
| 586 | |
Krzysztof Kozlowski | 3619452 | 2019-02-18 18:32:57 +0100 | [diff] [blame] | 587 | ldo36_reg: LDO36 { |
| 588 | /* Unused */ |
| 589 | regulator-name = "PVDD_LDO36"; |
| 590 | regulator-min-microvolt = <800000>; |
| 591 | regulator-max-microvolt = <3950000>; |
| 592 | }; |
| 593 | |
| 594 | ldo37_reg: LDO37 { |
| 595 | /* Unused */ |
| 596 | regulator-name = "PVDD_LDO37"; |
| 597 | regulator-min-microvolt = <800000>; |
| 598 | regulator-max-microvolt = <3950000>; |
| 599 | }; |
| 600 | |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 601 | ldo38_reg: LDO38 { |
| 602 | regulator-name = "PVDD_CAM0_AVDD_2V8"; |
| 603 | regulator-min-microvolt = <2800000>; |
| 604 | regulator-max-microvolt = <2800000>; |
| 605 | }; |
| 606 | |
| 607 | buck1_reg: BUCK1 { |
| 608 | regulator-name = "PVDD_MIF_1V1"; |
| 609 | regulator-min-microvolt = <800000>; |
| 610 | regulator-max-microvolt = <1100000>; |
| 611 | regulator-always-on; |
| 612 | }; |
| 613 | |
| 614 | buck2_reg: BUCK2 { |
| 615 | regulator-name = "vdd_arm"; |
| 616 | regulator-min-microvolt = <800000>; |
| 617 | regulator-max-microvolt = <1000000>; |
| 618 | regulator-always-on; |
| 619 | }; |
| 620 | |
| 621 | buck3_reg: BUCK3 { |
| 622 | regulator-name = "PVDD_INT_1V0"; |
| 623 | regulator-min-microvolt = <800000>; |
| 624 | regulator-max-microvolt = <1000000>; |
| 625 | regulator-always-on; |
| 626 | }; |
| 627 | |
| 628 | buck4_reg: BUCK4 { |
| 629 | regulator-name = "PVDD_G3D_1V0"; |
| 630 | regulator-min-microvolt = <800000>; |
| 631 | regulator-max-microvolt = <1000000>; |
| 632 | }; |
| 633 | |
| 634 | buck5_reg: BUCK5 { |
| 635 | regulator-name = "PVDD_LPDDR3_1V2"; |
| 636 | regulator-min-microvolt = <800000>; |
| 637 | regulator-max-microvolt = <1200000>; |
| 638 | regulator-always-on; |
| 639 | }; |
| 640 | |
| 641 | buck6_reg: BUCK6 { |
| 642 | regulator-name = "PVDD_KFC_1V0"; |
| 643 | regulator-min-microvolt = <800000>; |
| 644 | regulator-max-microvolt = <1000000>; |
| 645 | regulator-always-on; |
| 646 | }; |
| 647 | |
| 648 | buck7_reg: BUCK7 { |
| 649 | regulator-name = "VIN_LLDO_1V4"; |
| 650 | regulator-min-microvolt = <800000>; |
| 651 | regulator-max-microvolt = <1400000>; |
| 652 | regulator-always-on; |
| 653 | }; |
| 654 | |
| 655 | buck8_reg: BUCK8 { |
| 656 | regulator-name = "VIN_MLDO_2V0"; |
| 657 | regulator-min-microvolt = <800000>; |
| 658 | regulator-max-microvolt = <2000000>; |
| 659 | regulator-always-on; |
| 660 | }; |
| 661 | |
| 662 | buck9_reg: BUCK9 { |
| 663 | regulator-name = "VIN_HLDO_3V5"; |
| 664 | regulator-min-microvolt = <3000000>; |
| 665 | regulator-max-microvolt = <3500000>; |
| 666 | regulator-always-on; |
| 667 | }; |
| 668 | |
| 669 | buck10_reg: BUCK10 { |
| 670 | regulator-name = "PVDD_EMMCF_2V8"; |
| 671 | regulator-min-microvolt = <2800000>; |
| 672 | regulator-max-microvolt = <2800000>; |
| 673 | }; |
| 674 | }; |
| 675 | }; |
| 676 | }; |
| 677 | |
Milo Kim | d7ec05c | 2016-08-31 15:08:47 +0900 | [diff] [blame] | 678 | &i2c_2 { |
| 679 | status = "okay"; |
| 680 | }; |
| 681 | |
Marek Szyprowski | 1cb686c | 2017-09-15 11:11:23 +0200 | [diff] [blame] | 682 | &mixer { |
| 683 | status = "okay"; |
| 684 | }; |
| 685 | |
Krzysztof Kozlowski | 5e6b288 | 2015-04-12 20:56:51 +0900 | [diff] [blame] | 686 | &mmc_0 { |
| 687 | status = "okay"; |
| 688 | broken-cd; |
| 689 | card-detect-delay = <200>; |
| 690 | samsung,dw-mshc-ciu-div = <3>; |
| 691 | samsung,dw-mshc-sdr-timing = <0 4>; |
| 692 | samsung,dw-mshc-ddr-timing = <0 2>; |
| 693 | pinctrl-names = "default"; |
| 694 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; |
| 695 | vmmc-supply = <&ldo10_reg>; |
| 696 | bus-width = <8>; |
| 697 | cap-mmc-highspeed; |
| 698 | }; |
| 699 | |
| 700 | &mmc_2 { |
| 701 | status = "okay"; |
| 702 | card-detect-delay = <200>; |
| 703 | samsung,dw-mshc-ciu-div = <3>; |
| 704 | samsung,dw-mshc-sdr-timing = <2 3>; |
| 705 | samsung,dw-mshc-ddr-timing = <1 2>; |
| 706 | pinctrl-names = "default"; |
| 707 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; |
| 708 | vmmc-supply = <&ldo19_reg>; |
| 709 | vqmmc-supply = <&ldo13_reg>; |
| 710 | bus-width = <4>; |
| 711 | cap-sd-highspeed; |
| 712 | }; |
| 713 | |
Krzysztof Kozlowski | 1fed225 | 2015-04-02 16:15:20 +0200 | [diff] [blame] | 714 | &pinctrl_0 { |
| 715 | s2mps11_irq: s2mps11-irq { |
| 716 | samsung,pins = "gpx3-2"; |
Krzysztof Kozlowski | a2f2bc3 | 2016-09-04 13:04:14 +0200 | [diff] [blame] | 717 | samsung,pin-function = <EXYNOS_PIN_FUNC_F>; |
| 718 | samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; |
| 719 | samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; |
Krzysztof Kozlowski | 1fed225 | 2015-04-02 16:15:20 +0200 | [diff] [blame] | 720 | }; |
| 721 | }; |
Krzysztof Kozlowski | ce9940a | 2015-05-02 14:40:08 +0900 | [diff] [blame] | 722 | |
| 723 | &rtc { |
| 724 | status = "okay"; |
| 725 | clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; |
| 726 | clock-names = "rtc", "rtc_src"; |
| 727 | }; |
Krzysztof Kozlowski | eb1d0a5 | 2019-02-18 20:48:41 +0100 | [diff] [blame] | 728 | |
| 729 | &usbdrd_dwc3_1 { |
| 730 | dr_mode = "host"; |
| 731 | }; |