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Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2020 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
Krzysztof Kozlowskid8fa4792020-09-17 20:54:49 +02009#include <dt-bindings/interrupt-controller/irq.h>
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +020010#include "dt-bindings/pwm/pwm.h"
11#include "dt-bindings/usb/pd.h"
12#include "imx8mq.dtsi"
13
14/ {
15 model = "Purism Librem 5";
16 compatible = "purism,librem5", "fsl,imx8mq";
17
18 backlight_dsi: backlight-dsi {
19 compatible = "led-backlight";
20 leds = <&led_backlight>;
21 };
22
23 pmic_osc: clock-pmic {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <32768>;
27 clock-output-names = "pmic_osc";
28 };
29
30 chosen {
31 stdout-path = &uart1;
32 };
33
34 gpio-keys {
35 compatible = "gpio-keys";
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_keys>;
38
39 vol-down {
40 label = "VOL_DOWN";
41 gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_VOLUMEDOWN>;
43 };
44
45 vol-up {
46 label = "VOL_UP";
47 gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
48 linux,code = <KEY_VOLUMEUP>;
49 };
50 };
51
52 reg_aud_1v8: regulator-audio-1v8 {
53 compatible = "regulator-fixed";
54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_audiopwr>;
56 regulator-name = "AUDIO_PWR_EN";
57 regulator-min-microvolt = <1800000>;
58 regulator-max-microvolt = <1800000>;
59 gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
60 enable-active-high;
61 };
62
63 reg_gnss: regulator-gnss {
64 compatible = "regulator-fixed";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_gnsspwr>;
67 regulator-name = "GNSS";
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>;
71 enable-active-high;
72 };
73
74 reg_hub: regulator-hub {
75 compatible = "regulator-fixed";
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_hub_pwr>;
78 regulator-name = "HUB";
79 regulator-min-microvolt = <3300000>;
80 regulator-max-microvolt = <3300000>;
81 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
82 enable-active-high;
83 };
84
Guido Günther7127e3b2021-01-18 11:54:21 +010085 reg_lcd_1v8: regulator-lcd-1v8 {
86 compatible = "regulator-fixed";
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_dsien>;
89 regulator-name = "LCD_1V8";
90 regulator-min-microvolt = <1800000>;
91 regulator-max-microvolt = <1800000>;
92 vin-supply = <&reg_vdd_1v8>;
93 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
94 enable-active-high;
95 /* Otherwise i2c3 is not functional */
96 regulator-always-on;
97 };
98
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +020099 reg_lcd_3v4: regulator-lcd-3v4 {
100 compatible = "regulator-fixed";
101 regulator-name = "LCD_3V4";
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_dsibiasen>;
104 vin-supply = <&reg_vsys_3v4>;
105 gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
106 enable-active-high;
107 };
108
109 reg_vdd_sen: regulator-vdd-sen {
110 compatible = "regulator-fixed";
111 regulator-name = "VDD_SEN";
112 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <3300000>;
114 };
115
Martin Kepplinger84b1f572020-12-22 16:13:44 +0100116 reg_vdd_1v8: regulator-vdd-1v8 {
117 compatible = "regulator-fixed";
118 regulator-name = "VDD_1V8";
119 regulator-min-microvolt = <1800000>;
120 regulator-max-microvolt = <1800000>;
121 vin-supply = <&buck7_reg>;
122 };
123
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200124 reg_vdd_3v3: regulator-vdd-3v3 {
125 compatible = "regulator-fixed";
126 regulator-name = "VDD_3V3";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
129 };
130
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200131 reg_vsys_3v4: regulator-vsys-3v4 {
132 compatible = "regulator-fixed";
133 regulator-name = "VSYS_3V4";
134 regulator-min-microvolt = <3400000>;
135 regulator-max-microvolt = <3400000>;
136 regulator-always-on;
137 };
138
139 reg_wifi_3v3: regulator-wifi-3v3 {
140 compatible = "regulator-fixed";
Guido Günther924025e2021-10-05 15:48:58 +0200141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_wifi_pwr>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200143 regulator-name = "3V3_WIFI";
144 regulator-min-microvolt = <3300000>;
145 regulator-max-microvolt = <3300000>;
Guido Günther924025e2021-10-05 15:48:58 +0200146 gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;
147 enable-active-high;
148 vin-supply = <&reg_vdd_3v3>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200149 };
150
151 sound {
152 compatible = "simple-audio-card";
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_hp>;
155 simple-audio-card,name = "Librem 5";
156 simple-audio-card,format = "i2s";
157 simple-audio-card,widgets =
158 "Headphone", "Headphones",
159 "Microphone", "Headset Mic",
160 "Microphone", "Digital Mic",
161 "Speaker", "Speaker";
162 simple-audio-card,routing =
163 "Headphones", "HPOUTL",
164 "Headphones", "HPOUTR",
165 "Speaker", "SPKOUTL",
166 "Speaker", "SPKOUTR",
167 "Headset Mic", "MICBIAS",
168 "IN3R", "Headset Mic",
169 "DMICDAT", "Digital Mic";
170 simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
171
172 simple-audio-card,cpu {
173 sound-dai = <&sai2>;
174 };
175
176 simple-audio-card,codec {
177 sound-dai = <&codec>;
178 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
179 frame-master;
180 bitclock-master;
181 };
182 };
183
184 sound-wwan {
185 compatible = "simple-audio-card";
186 simple-audio-card,name = "Modem";
187 simple-audio-card,format = "i2s";
188
189 simple-audio-card,cpu {
190 sound-dai = <&sai6>;
191 frame-inversion;
192 };
193
194 simple-audio-card,codec {
195 sound-dai = <&bm818_codec>;
196 frame-master;
197 bitclock-master;
198 };
199 };
200
Angus Ainslie2344af02021-10-05 15:49:00 +0200201 usdhc2_pwrseq: pwrseq {
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>;
204 compatible = "mmc-pwrseq-simple";
205 reset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>,
206 <&gpio4 29 GPIO_ACTIVE_HIGH>;
207 };
208
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200209 bm818_codec: sound-wwan-codec {
210 compatible = "broadmobi,bm818", "option,gtm601";
211 #sound-dai-cells = <0>;
212 };
213
214 vibrator {
215 compatible = "pwm-vibrator";
216 pwms = <&pwm1 0 1000000000 0>;
217 pwm-names = "enable";
218 vcc-supply = <&reg_vdd_3v3>;
219 };
220};
221
222&A53_0 {
223 cpu-supply = <&buck2_reg>;
224};
225
226&A53_1 {
227 cpu-supply = <&buck2_reg>;
228};
229
230&A53_2 {
231 cpu-supply = <&buck2_reg>;
232};
233
234&A53_3 {
235 cpu-supply = <&buck2_reg>;
236};
237
238&ddrc {
239 operating-points-v2 = <&ddrc_opp_table>;
240
Krzysztof Kozlowski91db1672021-08-20 10:15:57 +0200241 ddrc_opp_table: opp-table {
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200242 compatible = "operating-points-v2";
243
244 opp-25M {
245 opp-hz = /bits/ 64 <25000000>;
246 };
247
248 opp-100M {
249 opp-hz = /bits/ 64 <100000000>;
250 };
251
252 opp-800M {
253 opp-hz = /bits/ 64 <800000000>;
254 };
255 };
256};
257
258&dphy {
259 status = "okay";
260};
261
262&ecspi1 {
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_ecspi1>;
265 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
266 #address-cells = <1>;
267 #size-cells = <0>;
268 status = "okay";
269
270 nor_flash: flash@0 {
271 compatible = "jedec,spi-nor";
272 reg = <0>;
273 spi-max-frequency = <1000000>;
Angus Ainslie3a0eac42021-02-19 11:04:38 +0100274 #address-cells = <1>;
275 #size-cells = <1>;
276
277 partition@0 {
278 label = "protected0";
279 reg = <0x0 0x30000>;
280 read-only;
281 };
282
283 partition@30000 {
284 label = "protected1";
285 reg = <0x30000 0x10000>;
286 read-only;
287 };
288
289 partition@40000 {
290 label = "rw";
291 reg = <0x40000 0x1C0000>;
292 };
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200293 };
294};
295
296&gpio1 {
297 pinctrl-names = "default";
298 pinctrl-0 = <&pinctrl_pmic_5v>;
299
Krzysztof Kozlowskidfedd2a2020-09-20 21:57:48 +0200300 pmic-5v-hog {
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200301 gpio-hog;
Guido Günther7fffadc2021-03-15 09:35:29 +0100302 gpios = <1 GPIO_ACTIVE_HIGH>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200303 input;
Guido Günther7fffadc2021-03-15 09:35:29 +0100304 lane-mapping = "pmic-5v";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200305 };
306};
307
308&iomuxc {
309 pinctrl_audiopwr: audiopwrgrp {
310 fsl,pins = <
311 /* AUDIO_POWER_EN_3V3 */
312 MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x83
313 >;
314 };
315
316 pinctrl_bl: blgrp {
317 fsl,pins = <
318 /* BACKLINGE_EN */
319 MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14 0x83
320 >;
321 };
322
Angus Ainslie2344af02021-10-05 15:49:00 +0200323 pinctrl_bt: btgrp {
324 fsl,pins = <
325 /* BT_REG_ON */
326 MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x83
327 >;
328 };
329
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200330 pinctrl_charger_in: chargeringrp {
331 fsl,pins = <
332 /* CHRG_INT */
Guido Güntherf3dbb292021-01-18 11:54:18 +0100333 MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x80
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200334 /* CHG_STATUS_B */
335 MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x80
336 >;
337 };
338
339 pinctrl_dsibiasen: dsibiasengrp {
340 fsl,pins = <
341 /* DSI_BIAS_EN */
342 MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20 0x83
343 >;
344 };
345
346 pinctrl_dsien: dsiengrp {
347 fsl,pins = <
348 /* DSI_EN_3V3 */
349 MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x83
350 >;
351 };
352
Martin Kepplinger584ea5b2021-01-18 11:54:22 +0100353 pinctrl_dsirst: dsirstgrp {
354 fsl,pins = <
355 /* DSI_RST */
356 MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29 0x83
357 /* DSI_TE */
358 MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28 0x83
359 /* TP_RST */
360 MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24 0x83
361 >;
362 };
363
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200364 pinctrl_ecspi1: ecspigrp {
365 fsl,pins = <
366 MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x83
367 MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x83
368 MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
369 MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x83
370 >;
371 };
372
373 pinctrl_gauge: gaugegrp {
374 fsl,pins = <
375 /* BAT_LOW */
376 MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x80
377 >;
378 };
379
380 pinctrl_gnsspwr: gnsspwrgrp {
381 fsl,pins = <
382 /* GPS3V3_EN */
383 MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x83
384 >;
385 };
386
387 pinctrl_haptic: hapticgrp {
388 fsl,pins = <
389 /* MOTO */
390 MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x83
391 >;
392 };
393
394 pinctrl_hp: hpgrp {
395 fsl,pins = <
396 /* HEADPHONE_DET_1V8 */
397 MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x180
398 >;
399 };
400
401 pinctrl_hub_pwr: hubpwrgrp {
402 fsl,pins = <
403 /* HUB_PWR_3V3_EN */
404 MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x83
405 >;
406 };
407
408 pinctrl_i2c1: i2c1grp {
409 fsl,pins = <
410 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000026
411 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000026
412 >;
413 };
414
415 pinctrl_i2c2: i2c2grp {
416 fsl,pins = <
417 MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000026
418 MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000026
419 >;
420 };
421
422 pinctrl_i2c3: i2c3grp {
423 fsl,pins = <
424 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000026
425 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000026
426 >;
427 };
428
429 pinctrl_i2c4: i2c4grp {
430 fsl,pins = <
431 MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000026
432 MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000026
433 >;
434 };
435
436 pinctrl_keys: keysgrp {
437 fsl,pins = <
438 /* VOL- */
439 MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01C0
440 /* VOL+ */
441 MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01C0
442 >;
443 };
444
445 pinctrl_led_b: ledbgrp {
446 fsl,pins = <
447 /* LED_B */
448 MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT 0x06
449 >;
450 };
451
452 pinctrl_led_g: ledggrp {
453 fsl,pins = <
454 /* LED_G */
455 MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT 0x06
456 >;
457 };
458
459 pinctrl_led_r: ledrgrp {
460 fsl,pins = <
461 /* LED_R */
462 MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT 0x06
463 >;
464 };
465
466 pinctrl_mag: maggrp {
467 fsl,pins = <
468 /* INT_MAG */
469 MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x80
470 >;
471 };
472
473 pinctrl_pmic: pmicgrp {
474 fsl,pins = <
475 /* PMIC_NINT */
476 MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x80
477 >;
478 };
479
480 pinctrl_pmic_5v: pmic5vgrp {
481 fsl,pins = <
482 /* PMIC_5V */
483 MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x80
484 >;
485 };
486
487 pinctrl_prox: proxgrp {
488 fsl,pins = <
489 /* INT_LIGHT */
490 MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x80
491 >;
492 };
493
494 pinctrl_rtc: rtcgrp {
495 fsl,pins = <
496 /* RTC_INT */
497 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x80
498 >;
499 };
500
501 pinctrl_sai2: sai2grp {
502 fsl,pins = <
503 MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
504 MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
505 MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6
506 MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
507 MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
508 >;
509 };
510
511 pinctrl_sai6: sai6grp {
512 fsl,pins = <
513 MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0xd6
514 MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0xd6
515 MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0xd6
516 MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6
517 >;
518 };
519
520 pinctrl_tcpc: tcpcgrp {
521 fsl,pins = <
522 /* TCPC_INT */
523 MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01C0
524 >;
525 };
526
Martin Kepplingerc003b152020-12-22 16:13:45 +0100527 pinctrl_touch: touchgrp {
528 fsl,pins = <
529 /* TP_INT */
530 MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27 0x80
531 >;
532 };
533
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200534 pinctrl_typec: typecgrp {
535 fsl,pins = <
536 /* TYPEC_MUX_EN */
537 MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x83
538 >;
539 };
540
541 pinctrl_uart1: uart1grp {
542 fsl,pins = <
543 MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49
544 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49
545 >;
546 };
547
548 pinctrl_uart2: uart2grp {
549 fsl,pins = <
550 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
551 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
552 >;
553 };
554
555 pinctrl_uart3: uart3grp {
556 fsl,pins = <
557 MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
558 MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
559 >;
560 };
561
562 pinctrl_uart4: uart4grp {
563 fsl,pins = <
564 MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49
565 MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49
566 MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49
567 MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49
568 >;
569 };
570
571 pinctrl_usdhc1: usdhc1grp {
572 fsl,pins = <
573 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
574 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
575 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
576 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
577 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
578 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
579 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
580 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
581 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
582 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
583 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83
584 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
585 >;
586 };
587
588 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
589 fsl,pins = <
590 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
591 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
592 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd
593 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd
594 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd
595 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd
596 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd
597 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd
598 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd
599 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd
600 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d
601 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
602 >;
603 };
604
605 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
606 fsl,pins = <
607 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
608 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
609 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf
610 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf
611 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf
612 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf
613 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf
614 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf
615 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf
616 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf
617 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f
618 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
619 >;
620 };
621
622 pinctrl_usdhc2: usdhc2grp {
623 fsl,pins = <
624 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
625 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
626 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
627 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
628 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
629 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
630 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
631 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
632 >;
633 };
634
635 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
636 fsl,pins = <
637 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
638 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
639 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd
640 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd
641 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd
642 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd
643 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd
644 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
645 >;
646 };
647
648 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
649 fsl,pins = <
650 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
651 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
652 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf
653 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf
654 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf
655 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf
656 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf
657 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
658 >;
659 };
660
Angus Ainslie2344af02021-10-05 15:49:00 +0200661 pinctrl_wifi_disable: wifidisablegrp {
662 fsl,pins = <
663 /* WIFI_REG_ON */
664 MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x83
665 >;
666 };
667
Guido Günther924025e2021-10-05 15:48:58 +0200668 pinctrl_wifi_pwr: wifipwrgrp {
669 fsl,pins = <
670 /* WIFI3V3_EN */
671 MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10 0x83
672 >;
673 };
674
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200675 pinctrl_wdog: wdoggrp {
676 fsl,pins = <
677 /* nWDOG */
678 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x1f
679 >;
680 };
681};
682
683&i2c1 {
684 clock-frequency = <387000>;
685 pinctrl-names = "default";
686 pinctrl-0 = <&pinctrl_i2c1>;
687 status = "okay";
688
689 typec_pd: usb-pd@3f {
690 compatible = "ti,tps6598x";
691 reg = <0x3f>;
692 pinctrl-names = "default";
693 pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
694 interrupt-parent = <&gpio1>;
695 interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
Krzysztof Kozlowskidd429a42020-09-04 16:53:12 +0200696 interrupt-names = "irq";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200697
698 connector {
699 ports {
700 #address-cells = <1>;
701 #size-cells = <0>;
702
703 port@0 {
704 reg = <0>;
705
706 usb_con_hs: endpoint {
707 remote-endpoint = <&typec_hs>;
708 };
709 };
710
711 port@1 {
712 reg = <1>;
713
714 usb_con_ss: endpoint {
715 remote-endpoint = <&typec_ss>;
716 };
717 };
718 };
719 };
720 };
721
722 pmic: pmic@4b {
723 compatible = "rohm,bd71837";
724 reg = <0x4b>;
725 pinctrl-names = "default";
726 pinctrl-0 = <&pinctrl_pmic>;
727 clocks = <&pmic_osc>;
728 clock-names = "osc";
729 clock-output-names = "pmic_clk";
730 interrupt-parent = <&gpio1>;
Krzysztof Kozlowskid8fa4792020-09-17 20:54:49 +0200731 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200732 rohm,reset-snvs-powered;
733
734 regulators {
735 buck1_reg: BUCK1 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200736 regulator-name = "buck1";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200737 regulator-min-microvolt = <700000>;
738 regulator-max-microvolt = <1300000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100739 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200740 regulator-ramp-delay = <1250>;
741 rohm,dvs-run-voltage = <900000>;
742 rohm,dvs-idle-voltage = <850000>;
743 rohm,dvs-suspend-voltage = <800000>;
744 regulator-always-on;
745 };
746
747 buck2_reg: BUCK2 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200748 regulator-name = "buck2";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200749 regulator-min-microvolt = <700000>;
750 regulator-max-microvolt = <1300000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100751 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200752 regulator-ramp-delay = <1250>;
753 rohm,dvs-run-voltage = <1000000>;
754 rohm,dvs-idle-voltage = <900000>;
755 regulator-always-on;
756 };
757
758 buck3_reg: BUCK3 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200759 regulator-name = "buck3";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200760 regulator-min-microvolt = <700000>;
761 regulator-max-microvolt = <1300000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100762 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200763 rohm,dvs-run-voltage = <900000>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200764 };
765
766 buck4_reg: BUCK4 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200767 regulator-name = "buck4";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200768 regulator-min-microvolt = <700000>;
769 regulator-max-microvolt = <1300000>;
770 rohm,dvs-run-voltage = <1000000>;
771 };
772
773 buck5_reg: BUCK5 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200774 regulator-name = "buck5";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200775 regulator-min-microvolt = <700000>;
776 regulator-max-microvolt = <1350000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100777 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200778 regulator-always-on;
779 };
780
781 buck6_reg: BUCK6 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200782 regulator-name = "buck6";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200783 regulator-min-microvolt = <3000000>;
784 regulator-max-microvolt = <3300000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100785 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200786 regulator-always-on;
787 };
788
789 buck7_reg: BUCK7 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200790 regulator-name = "buck7";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200791 regulator-min-microvolt = <1605000>;
792 regulator-max-microvolt = <1995000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100793 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200794 regulator-always-on;
795 };
796
797 buck8_reg: BUCK8 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200798 regulator-name = "buck8";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200799 regulator-min-microvolt = <800000>;
800 regulator-max-microvolt = <1400000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100801 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200802 regulator-always-on;
803 };
804
805 ldo1_reg: LDO1 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200806 regulator-name = "ldo1";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200807 regulator-min-microvolt = <3000000>;
808 regulator-max-microvolt = <3300000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100809 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200810 /* leave on for snvs power button */
811 regulator-always-on;
812 };
813
814 ldo2_reg: LDO2 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200815 regulator-name = "ldo2";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200816 regulator-min-microvolt = <900000>;
817 regulator-max-microvolt = <900000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100818 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200819 /* leave on for snvs power button */
820 regulator-always-on;
821 };
822
823 ldo3_reg: LDO3 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200824 regulator-name = "ldo3";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200825 regulator-min-microvolt = <1800000>;
826 regulator-max-microvolt = <3300000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100827 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200828 regulator-always-on;
829 };
830
831 ldo4_reg: LDO4 {
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200832 regulator-name = "ldo4";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200833 regulator-min-microvolt = <900000>;
834 regulator-max-microvolt = <1800000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100835 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200836 regulator-always-on;
837 };
838
839 ldo5_reg: LDO5 {
840 /* VDD_PHY_0V9 - MIPI and HDMI domains */
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200841 regulator-name = "ldo5";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200842 regulator-min-microvolt = <1800000>;
843 regulator-max-microvolt = <3300000>;
844 regulator-always-on;
845 };
846
847 ldo6_reg: LDO6 {
848 /* VDD_PHY_0V9 - MIPI, HDMI and USB domains */
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200849 regulator-name = "ldo6";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200850 regulator-min-microvolt = <900000>;
851 regulator-max-microvolt = <1800000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100852 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200853 regulator-always-on;
854 };
855
856 ldo7_reg: LDO7 {
857 /* VDD_PHY_3V3 - USB domain */
Krzysztof Kozlowski0188e992020-09-04 16:53:10 +0200858 regulator-name = "ldo7";
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200859 regulator-min-microvolt = <1800000>;
860 regulator-max-microvolt = <3300000>;
Martin Kepplingera8bb83c2021-01-18 11:54:23 +0100861 regulator-boot-on;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200862 regulator-always-on;
863 };
864 };
865 };
866
867 rtc@68 {
868 compatible = "microcrystal,rv4162";
869 reg = <0x68>;
870 pinctrl-names = "default";
871 pinctrl-0 = <&pinctrl_rtc>;
872 interrupt-parent = <&gpio1>;
873 interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
874 };
875};
876
877&i2c2 {
878 clock-frequency = <387000>;
879 pinctrl-names = "default";
880 pinctrl-0 = <&pinctrl_i2c2>;
881 status = "okay";
882
883 magnetometer@1e {
884 compatible = "st,lsm9ds1-magn";
885 reg = <0x1e>;
886 pinctrl-names = "default";
887 pinctrl-0 = <&pinctrl_mag>;
888 interrupt-parent = <&gpio3>;
889 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
890 vdd-supply = <&reg_vdd_sen>;
891 vddio-supply = <&reg_vdd_1v8>;
892 };
893
894 regulator@3e {
895 compatible = "tps65132";
896 reg = <0x3e>;
897
Martin Kepplinger584ea5b2021-01-18 11:54:22 +0100898 reg_lcd_avdd: outp {
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200899 regulator-name = "LCD_AVDD";
900 vin-supply = <&reg_lcd_3v4>;
901 };
902
Martin Kepplinger584ea5b2021-01-18 11:54:22 +0100903 reg_lcd_avee: outn {
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200904 regulator-name = "LCD_AVEE";
905 vin-supply = <&reg_lcd_3v4>;
906 };
907 };
908
909 proximity: prox@60 {
910 compatible = "vishay,vcnl4040";
911 reg = <0x60>;
912 pinctrl-names = "default";
913 pinctrl-0 = <&pinctrl_prox>;
914 interrupt-parent = <&gpio3>;
915 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
916 };
917
918 accel_gyro: accel-gyro@6a {
919 compatible = "st,lsm9ds1-imu";
920 reg = <0x6a>;
921 vdd-supply = <&reg_vdd_sen>;
922 vddio-supply = <&reg_vdd_1v8>;
923 };
924};
925
926&i2c3 {
927 clock-frequency = <387000>;
928 pinctrl-names = "default";
929 pinctrl-0 = <&pinctrl_i2c3>;
930 status = "okay";
931
932 codec: audio-codec@1a {
933 compatible = "wlf,wm8962";
934 reg = <0x1a>;
935 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
936 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
937 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
938 assigned-clock-rates = <24576000>;
939 #sound-dai-cells = <0>;
940 mic-cfg = <0x200>;
941 DCVDD-supply = <&reg_aud_1v8>;
942 DBVDD-supply = <&reg_aud_1v8>;
943 AVDD-supply = <&reg_aud_1v8>;
944 CPVDD-supply = <&reg_aud_1v8>;
945 MICVDD-supply = <&reg_aud_1v8>;
946 PLLVDD-supply = <&reg_aud_1v8>;
947 SPKVDD1-supply = <&reg_vsys_3v4>;
948 SPKVDD2-supply = <&reg_vsys_3v4>;
949 gpio-cfg = <
950 0x0000 /* n/c */
951 0x0001 /* gpio2, 1: default */
952 0x0013 /* gpio3, 2: dmicclk */
953 0x0000 /* n/c, 3: default */
954 0x8014 /* gpio5, 4: dmic_dat */
955 0x0000 /* gpio6, 5: default */
956 >;
957 };
958
959 backlight@36 {
960 compatible = "ti,lm36922";
961 reg = <0x36>;
962 pinctrl-names = "default";
963 pinctrl-0 = <&pinctrl_bl>;
964 #address-cells = <1>;
965 #size-cells = <0>;
966 enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
967 vled-supply = <&reg_vsys_3v4>;
968 ti,ovp-microvolt = <25000000>;
969
970 led_backlight: led@0 {
971 reg = <0>;
972 label = ":backlight";
973 linux,default-trigger = "backlight";
974 led-max-microamp = <20000>;
975 };
976 };
977
978 touchscreen@38 {
979 compatible = "edt,edt-ft5506";
980 reg = <0x38>;
Martin Kepplingerc003b152020-12-22 16:13:45 +0100981 pinctrl-names = "default";
982 pinctrl-0 = <&pinctrl_touch>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200983 interrupt-parent = <&gpio1>;
984 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
985 touchscreen-size-x = <720>;
986 touchscreen-size-y = <1440>;
Guido Günther7127e3b2021-01-18 11:54:21 +0100987 vcc-supply = <&reg_lcd_1v8>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +0200988 };
989};
990
991&i2c4 {
992 clock-frequency = <387000>;
993 pinctrl-names = "default";
994 pinctrl-0 = <&pinctrl_i2c4>;
995 status = "okay";
996
997 bat: fuel-gauge@36 {
998 compatible = "maxim,max17055";
999 reg = <0x36>;
1000 interrupt-parent = <&gpio3>;
1001 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1002 pinctrl-names = "default";
1003 pinctrl-0 = <&pinctrl_gauge>;
1004 maxim,over-heat-temp = <700>;
1005 maxim,over-volt = <4500>;
1006 maxim,rsns-microohm = <5000>;
1007 };
1008
1009 bq25895: charger@6a {
1010 compatible = "ti,bq25895", "ti,bq25890";
1011 reg = <0x6a>;
1012 pinctrl-names = "default";
1013 pinctrl-0 = <&pinctrl_charger_in>;
1014 interrupt-parent = <&gpio3>;
1015 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
1016 phys = <&usb3_phy0>;
1017 ti,precharge-current = <130000>; /* uA */
1018 ti,minimum-sys-voltage = <3700000>; /* uV */
1019 ti,boost-voltage = <5000000>; /* uV */
1020 ti,boost-max-current = <500000>; /* uA */
1021 ti,use-vinmin-threshold = <1>; /* enable VINDPM */
1022 ti,vinmin-threshold = <3900000>; /* uV */
1023 monitored-battery = <&bat>;
Guido Güntherd5edcf22021-01-18 11:54:20 +01001024 power-supplies = <&typec_pd>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +02001025 };
1026};
1027
Martin Kepplinger584ea5b2021-01-18 11:54:22 +01001028&lcdif {
1029 status = "okay";
1030};
1031
1032&mipi_dsi {
1033 #address-cells = <1>;
1034 #size-cells = <0>;
1035 status = "okay";
1036
1037 lcd_panel: panel@0 {
1038 compatible = "mantix,mlaf057we51-x";
1039 reg = <0>;
1040 pinctrl-names = "default";
1041 pinctrl-0 = <&pinctrl_dsirst>;
1042 avdd-supply = <&reg_lcd_avdd>;
1043 avee-supply = <&reg_lcd_avee>;
1044 vddi-supply = <&reg_lcd_1v8>;
1045 backlight = <&backlight_dsi>;
1046 reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
Martin Kepplingerca4fd342021-10-05 15:48:56 +02001047 mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
Martin Kepplinger584ea5b2021-01-18 11:54:22 +01001048
1049 port {
1050 panel_in: endpoint {
1051 remote-endpoint = <&mipi_dsi_out>;
1052 };
1053 };
1054 };
1055
1056 ports {
1057 port@1 {
1058 reg = <1>;
1059
1060 mipi_dsi_out: endpoint {
1061 remote-endpoint = <&panel_in>;
1062 };
1063 };
1064 };
1065};
1066
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +02001067&pgc_gpu {
1068 power-supply = <&buck3_reg>;
1069};
1070
1071&pgc_mipi {
1072 power-supply = <&ldo5_reg>;
1073};
1074
1075&pgc_vpu {
1076 power-supply = <&buck4_reg>;
1077};
1078
1079&pwm1 {
1080 pinctrl-names = "default";
1081 pinctrl-0 = <&pinctrl_haptic>;
1082 status = "okay";
1083};
1084
1085&pwm2 {
1086 pinctrl-names = "default";
1087 pinctrl-0 = <&pinctrl_led_b>;
1088 status = "okay";
1089};
1090
1091&pwm3 {
1092 pinctrl-names = "default";
Sebastian Krzyszkowiak1f8359d2021-10-05 15:48:57 +02001093 pinctrl-0 = <&pinctrl_led_r>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +02001094 status = "okay";
1095};
1096
1097&pwm4 {
1098 pinctrl-names = "default";
Sebastian Krzyszkowiak1f8359d2021-10-05 15:48:57 +02001099 pinctrl-0 = <&pinctrl_led_g>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +02001100 status = "okay";
1101};
1102
1103&sai2 {
1104 pinctrl-names = "default";
1105 pinctrl-0 = <&pinctrl_sai2>;
1106 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1107 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1108 assigned-clock-rates = <24576000>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +02001109 status = "okay";
1110};
1111
1112&sai6 {
1113 pinctrl-names = "default";
1114 pinctrl-0 = <&pinctrl_sai6>;
1115 assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
1116 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1117 assigned-clock-rates = <24576000>;
1118 fsl,sai-synchronous-rx;
1119 status = "okay";
1120};
1121
1122&snvs_pwrkey {
1123 status = "okay";
1124};
1125
1126&snvs_rtc {
1127 status = "disabled";
1128};
1129
1130&uart1 { /* console */
1131 pinctrl-names = "default";
1132 pinctrl-0 = <&pinctrl_uart1>;
1133 status = "okay";
1134};
1135
1136&uart2 { /* TPS - GPS - DEBUG */
1137 pinctrl-names = "default";
1138 pinctrl-0 = <&pinctrl_uart2>;
1139 status = "okay";
1140
1141 gnss {
1142 compatible = "globaltop,pa6h";
1143 vcc-supply = <&reg_gnss>;
1144 current-speed = <9600>;
1145 };
1146};
1147
1148&uart3 { /* SMC */
1149 pinctrl-names = "default";
1150 pinctrl-0 = <&pinctrl_uart3>;
1151 status = "okay";
1152};
1153
1154&uart4 { /* BT */
1155 pinctrl-names = "default";
1156 pinctrl-0 = <&pinctrl_uart4>;
1157 uart-has-rtscts;
1158 status = "okay";
1159};
1160
1161&usb3_phy0 {
1162 status = "okay";
1163};
1164
1165&usb3_phy1 {
1166 vbus-supply = <&reg_hub>;
1167 status = "okay";
1168};
1169
1170&usb_dwc3_0 {
1171 #address-cells = <1>;
1172 #size-cells = <0>;
1173 dr_mode = "otg";
1174 snps,dis_u3_susphy_quirk;
1175 status = "okay";
1176
1177 port@0 {
1178 reg = <0>;
1179
1180 typec_hs: endpoint {
1181 remote-endpoint = <&usb_con_hs>;
1182 };
1183 };
1184
1185 port@1 {
1186 reg = <1>;
1187
1188 typec_ss: endpoint {
1189 remote-endpoint = <&usb_con_ss>;
1190 };
1191 };
1192};
1193
1194&usb_dwc3_1 {
1195 dr_mode = "host";
1196 status = "okay";
1197 #address-cells = <1>;
1198 #size-cells = <0>;
1199
1200 /* Microchip USB2642 */
1201 hub@1 {
1202 compatible = "usb424,2640";
1203 reg = <1>;
1204 #address-cells = <1>;
1205 #size-cells = <0>;
1206
1207 mass-storage@1 {
1208 compatible = "usb424,4041";
1209 reg = <1>;
1210 };
1211 };
1212};
1213
1214&usdhc1 {
Martin Kepplinger6a67d8f2020-12-22 16:13:46 +01001215 assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
1216 assigned-clock-rates = <400000000>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +02001217 pinctrl-names = "default", "state_100mhz", "state_200mhz";
1218 pinctrl-0 = <&pinctrl_usdhc1>;
1219 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
1220 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
1221 bus-width = <8>;
1222 vmmc-supply = <&reg_vdd_3v3>;
1223 power-supply = <&reg_vdd_1v8>;
1224 non-removable;
1225 status = "okay";
1226};
1227
1228&usdhc2 {
Martin Kepplinger6a67d8f2020-12-22 16:13:46 +01001229 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
1230 assigned-clock-rates = <200000000>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +02001231 pinctrl-names = "default", "state_100mhz", "state_200mhz";
1232 pinctrl-0 = <&pinctrl_usdhc2>;
1233 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
1234 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
1235 bus-width = <4>;
1236 vmmc-supply = <&reg_wifi_3v3>;
Angus Ainslie2344af02021-10-05 15:49:00 +02001237 mmc-pwrseq = <&usdhc2_pwrseq>;
Angus Ainsliec3817592021-10-05 15:48:59 +02001238 post-power-on-delay-ms = <1000>;
Angus Ainslie (Purism)8f0216b2020-08-21 14:17:53 +02001239 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
1240 disable-wp;
1241 cap-sdio-irq;
1242 keep-power-in-suspend;
1243 wakeup-source;
1244 status = "okay";
1245};
1246
1247&wdog1 {
1248 pinctrl-names = "default";
1249 pinctrl-0 = <&pinctrl_wdog>;
1250 fsl,ext-reset-output;
1251 status = "okay";
1252};