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Carlo Caionecfb61a42014-05-01 14:29:27 +02001/*
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +08002 * MFD core driver for the X-Powers' Power Management ICs
Carlo Caionecfb61a42014-05-01 14:29:27 +02003 *
Jacob Panaf7e9062014-10-06 21:17:14 -07004 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6 * as well as configurable GPIOs.
Carlo Caionecfb61a42014-05-01 14:29:27 +02007 *
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +08008 * This file contains the interface independent core functions.
9 *
Chen-Yu Tsaie7402352016-02-12 10:02:41 +080010 * Copyright (C) 2014 Carlo Caione
11 *
Carlo Caionecfb61a42014-05-01 14:29:27 +020012 * Author: Carlo Caione <carlo@caione.org>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/err.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020020#include <linux/interrupt.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/pm_runtime.h>
24#include <linux/regmap.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020025#include <linux/regulator/consumer.h>
26#include <linux/mfd/axp20x.h>
27#include <linux/mfd/core.h>
28#include <linux/of_device.h>
Jacob Panaf7e9062014-10-06 21:17:14 -070029#include <linux/acpi.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020030
31#define AXP20X_OFF 0x80
32
Krzysztof Kozlowskic31e8582015-03-24 11:21:17 +010033static const char * const axp20x_model_names[] = {
Michal Suchanekd8d79f82015-07-11 14:59:56 +020034 "AXP152",
Jacob Panaf7e9062014-10-06 21:17:14 -070035 "AXP202",
36 "AXP209",
Boris BREZILLONf05be582015-04-10 12:09:01 +080037 "AXP221",
Jacob Panaf7e9062014-10-06 21:17:14 -070038 "AXP288",
39};
40
Michal Suchanekd8d79f82015-07-11 14:59:56 +020041static const struct regmap_range axp152_writeable_ranges[] = {
42 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
43 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
44};
45
46static const struct regmap_range axp152_volatile_ranges[] = {
47 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
48 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
49 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
50};
51
52static const struct regmap_access_table axp152_writeable_table = {
53 .yes_ranges = axp152_writeable_ranges,
54 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
55};
56
57static const struct regmap_access_table axp152_volatile_table = {
58 .yes_ranges = axp152_volatile_ranges,
59 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
60};
61
Carlo Caionecfb61a42014-05-01 14:29:27 +020062static const struct regmap_range axp20x_writeable_ranges[] = {
63 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
64 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
Bruno Prémont553ed4b2015-08-08 17:58:40 +020065 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
Carlo Caionecfb61a42014-05-01 14:29:27 +020066};
67
68static const struct regmap_range axp20x_volatile_ranges[] = {
Bruno Prémont553ed4b2015-08-08 17:58:40 +020069 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
70 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
Carlo Caionecfb61a42014-05-01 14:29:27 +020071 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
Bruno Prémont553ed4b2015-08-08 17:58:40 +020072 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
73 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
74 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
Carlo Caionecfb61a42014-05-01 14:29:27 +020075};
76
77static const struct regmap_access_table axp20x_writeable_table = {
78 .yes_ranges = axp20x_writeable_ranges,
79 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
80};
81
82static const struct regmap_access_table axp20x_volatile_table = {
83 .yes_ranges = axp20x_volatile_ranges,
84 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
85};
86
Boris BREZILLONf05be582015-04-10 12:09:01 +080087static const struct regmap_range axp22x_writeable_ranges[] = {
88 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
89 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
90};
91
92static const struct regmap_range axp22x_volatile_ranges[] = {
93 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
94};
95
96static const struct regmap_access_table axp22x_writeable_table = {
97 .yes_ranges = axp22x_writeable_ranges,
98 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
99};
100
101static const struct regmap_access_table axp22x_volatile_table = {
102 .yes_ranges = axp22x_volatile_ranges,
103 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
104};
105
Jacob Panaf7e9062014-10-06 21:17:14 -0700106static const struct regmap_range axp288_writeable_ranges[] = {
107 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
108 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
109};
110
111static const struct regmap_range axp288_volatile_ranges[] = {
112 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
113};
114
115static const struct regmap_access_table axp288_writeable_table = {
116 .yes_ranges = axp288_writeable_ranges,
117 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
118};
119
120static const struct regmap_access_table axp288_volatile_table = {
121 .yes_ranges = axp288_volatile_ranges,
122 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
123};
124
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200125static struct resource axp152_pek_resources[] = {
126 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
127 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
128};
129
Carlo Caionecfb61a42014-05-01 14:29:27 +0200130static struct resource axp20x_pek_resources[] = {
131 {
132 .name = "PEK_DBR",
133 .start = AXP20X_IRQ_PEK_RIS_EDGE,
134 .end = AXP20X_IRQ_PEK_RIS_EDGE,
135 .flags = IORESOURCE_IRQ,
136 }, {
137 .name = "PEK_DBF",
138 .start = AXP20X_IRQ_PEK_FAL_EDGE,
139 .end = AXP20X_IRQ_PEK_FAL_EDGE,
140 .flags = IORESOURCE_IRQ,
141 },
142};
143
Hans de Goede8de4efd2015-08-08 17:58:41 +0200144static struct resource axp20x_usb_power_supply_resources[] = {
145 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
146 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
147 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
148 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
149};
150
Boris BREZILLONf05be582015-04-10 12:09:01 +0800151static struct resource axp22x_pek_resources[] = {
152 {
153 .name = "PEK_DBR",
154 .start = AXP22X_IRQ_PEK_RIS_EDGE,
155 .end = AXP22X_IRQ_PEK_RIS_EDGE,
156 .flags = IORESOURCE_IRQ,
157 }, {
158 .name = "PEK_DBF",
159 .start = AXP22X_IRQ_PEK_FAL_EDGE,
160 .end = AXP22X_IRQ_PEK_FAL_EDGE,
161 .flags = IORESOURCE_IRQ,
162 },
163};
164
Borun Fue56e5ad2015-10-14 16:16:26 +0800165static struct resource axp288_power_button_resources[] = {
166 {
167 .name = "PEK_DBR",
168 .start = AXP288_IRQ_POKN,
169 .end = AXP288_IRQ_POKN,
170 .flags = IORESOURCE_IRQ,
171 },
172 {
173 .name = "PEK_DBF",
174 .start = AXP288_IRQ_POKP,
175 .end = AXP288_IRQ_POKP,
176 .flags = IORESOURCE_IRQ,
177 },
178};
179
Todd Brandtd63878742015-02-02 15:41:41 -0800180static struct resource axp288_fuel_gauge_resources[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700181 {
182 .start = AXP288_IRQ_QWBTU,
183 .end = AXP288_IRQ_QWBTU,
184 .flags = IORESOURCE_IRQ,
185 },
186 {
187 .start = AXP288_IRQ_WBTU,
188 .end = AXP288_IRQ_WBTU,
189 .flags = IORESOURCE_IRQ,
190 },
191 {
192 .start = AXP288_IRQ_QWBTO,
193 .end = AXP288_IRQ_QWBTO,
194 .flags = IORESOURCE_IRQ,
195 },
196 {
197 .start = AXP288_IRQ_WBTO,
198 .end = AXP288_IRQ_WBTO,
199 .flags = IORESOURCE_IRQ,
200 },
201 {
202 .start = AXP288_IRQ_WL2,
203 .end = AXP288_IRQ_WL2,
204 .flags = IORESOURCE_IRQ,
205 },
206 {
207 .start = AXP288_IRQ_WL1,
208 .end = AXP288_IRQ_WL1,
209 .flags = IORESOURCE_IRQ,
210 },
211};
212
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200213static const struct regmap_config axp152_regmap_config = {
214 .reg_bits = 8,
215 .val_bits = 8,
216 .wr_table = &axp152_writeable_table,
217 .volatile_table = &axp152_volatile_table,
218 .max_register = AXP152_PWM1_DUTY_CYCLE,
219 .cache_type = REGCACHE_RBTREE,
220};
221
Carlo Caionecfb61a42014-05-01 14:29:27 +0200222static const struct regmap_config axp20x_regmap_config = {
223 .reg_bits = 8,
224 .val_bits = 8,
225 .wr_table = &axp20x_writeable_table,
226 .volatile_table = &axp20x_volatile_table,
Bruno Prémont553ed4b2015-08-08 17:58:40 +0200227 .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200228 .cache_type = REGCACHE_RBTREE,
229};
230
Boris BREZILLONf05be582015-04-10 12:09:01 +0800231static const struct regmap_config axp22x_regmap_config = {
232 .reg_bits = 8,
233 .val_bits = 8,
234 .wr_table = &axp22x_writeable_table,
235 .volatile_table = &axp22x_volatile_table,
236 .max_register = AXP22X_BATLOW_THRES1,
237 .cache_type = REGCACHE_RBTREE,
238};
239
Jacob Panaf7e9062014-10-06 21:17:14 -0700240static const struct regmap_config axp288_regmap_config = {
241 .reg_bits = 8,
242 .val_bits = 8,
243 .wr_table = &axp288_writeable_table,
244 .volatile_table = &axp288_volatile_table,
245 .max_register = AXP288_FG_TUNE5,
246 .cache_type = REGCACHE_RBTREE,
247};
248
249#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
250 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
Carlo Caionecfb61a42014-05-01 14:29:27 +0200251
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200252static const struct regmap_irq axp152_regmap_irqs[] = {
253 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
254 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
255 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
256 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
257 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
258 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
259 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
260 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
261 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
262 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
263 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
264 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
265 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
266 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
267 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
268 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
269 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
270};
271
Carlo Caionecfb61a42014-05-01 14:29:27 +0200272static const struct regmap_irq axp20x_regmap_irqs[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700273 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
274 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
275 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
276 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
277 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
278 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
279 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
280 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
281 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
282 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
283 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
284 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
285 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
286 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
287 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
288 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
289 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
290 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
291 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
292 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
293 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
294 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
295 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
296 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
297 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
298 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
299 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
300 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
301 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
302 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
303 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
304 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
305 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
306 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
307 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
308 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
309 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
310};
311
Boris BREZILLONf05be582015-04-10 12:09:01 +0800312static const struct regmap_irq axp22x_regmap_irqs[] = {
313 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
314 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
315 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
316 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
317 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
318 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
319 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
320 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
321 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
322 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
323 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
324 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
325 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
326 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
327 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
328 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
329 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
330 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
331 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
332 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
333 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
334 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
335 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
336 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
337 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
338};
339
Jacob Panaf7e9062014-10-06 21:17:14 -0700340/* some IRQs are compatible with axp20x models */
341static const struct regmap_irq axp288_regmap_irqs[] = {
Jacob Panff3bbc52014-11-11 11:30:09 -0800342 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
343 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
344 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
Jacob Panaf7e9062014-10-06 21:17:14 -0700345
Jacob Panff3bbc52014-11-11 11:30:09 -0800346 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
347 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
Jacob Panaf7e9062014-10-06 21:17:14 -0700348 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
349 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
Jacob Panff3bbc52014-11-11 11:30:09 -0800350 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
351 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
Jacob Panaf7e9062014-10-06 21:17:14 -0700352
353 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
354 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
355 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
Jacob Panff3bbc52014-11-11 11:30:09 -0800356 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
Jacob Panaf7e9062014-10-06 21:17:14 -0700357 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
358 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
359 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
360 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
361
362 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
363 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
364 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
365 INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
366
367 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
368 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
369 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
370 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
371 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
372 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
373 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
Jacob Panff3bbc52014-11-11 11:30:09 -0800374 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
Jacob Panaf7e9062014-10-06 21:17:14 -0700375
376 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
377 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200378};
379
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200380static const struct regmap_irq_chip axp152_regmap_irq_chip = {
381 .name = "axp152_irq_chip",
382 .status_base = AXP152_IRQ1_STATE,
383 .ack_base = AXP152_IRQ1_STATE,
384 .mask_base = AXP152_IRQ1_EN,
385 .mask_invert = true,
386 .init_ack_masked = true,
387 .irqs = axp152_regmap_irqs,
388 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
389 .num_regs = 3,
390};
391
Carlo Caionecfb61a42014-05-01 14:29:27 +0200392static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
393 .name = "axp20x_irq_chip",
394 .status_base = AXP20X_IRQ1_STATE,
395 .ack_base = AXP20X_IRQ1_STATE,
396 .mask_base = AXP20X_IRQ1_EN,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200397 .mask_invert = true,
398 .init_ack_masked = true,
Jacob Panaf7e9062014-10-06 21:17:14 -0700399 .irqs = axp20x_regmap_irqs,
400 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
401 .num_regs = 5,
402
403};
404
Boris BREZILLONf05be582015-04-10 12:09:01 +0800405static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
406 .name = "axp22x_irq_chip",
407 .status_base = AXP20X_IRQ1_STATE,
408 .ack_base = AXP20X_IRQ1_STATE,
409 .mask_base = AXP20X_IRQ1_EN,
410 .mask_invert = true,
411 .init_ack_masked = true,
412 .irqs = axp22x_regmap_irqs,
413 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
414 .num_regs = 5,
415};
416
Jacob Panaf7e9062014-10-06 21:17:14 -0700417static const struct regmap_irq_chip axp288_regmap_irq_chip = {
418 .name = "axp288_irq_chip",
419 .status_base = AXP20X_IRQ1_STATE,
420 .ack_base = AXP20X_IRQ1_STATE,
421 .mask_base = AXP20X_IRQ1_EN,
422 .mask_invert = true,
423 .init_ack_masked = true,
424 .irqs = axp288_regmap_irqs,
425 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
426 .num_regs = 6,
427
Carlo Caionecfb61a42014-05-01 14:29:27 +0200428};
429
Carlo Caionecfb61a42014-05-01 14:29:27 +0200430static struct mfd_cell axp20x_cells[] = {
431 {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200432 .name = "axp20x-pek",
433 .num_resources = ARRAY_SIZE(axp20x_pek_resources),
434 .resources = axp20x_pek_resources,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200435 }, {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200436 .name = "axp20x-regulator",
437 }, {
438 .name = "axp20x-usb-power-supply",
439 .of_compatible = "x-powers,axp202-usb-power-supply",
440 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
441 .resources = axp20x_usb_power_supply_resources,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200442 },
443};
444
Boris BREZILLONf05be582015-04-10 12:09:01 +0800445static struct mfd_cell axp22x_cells[] = {
446 {
447 .name = "axp20x-pek",
448 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
449 .resources = axp22x_pek_resources,
Chen-Yu Tsai6d4fa892015-04-10 12:09:06 +0800450 }, {
451 .name = "axp20x-regulator",
Boris BREZILLONf05be582015-04-10 12:09:01 +0800452 },
453};
454
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200455static struct mfd_cell axp152_cells[] = {
456 {
457 .name = "axp20x-pek",
458 .num_resources = ARRAY_SIZE(axp152_pek_resources),
459 .resources = axp152_pek_resources,
460 },
461};
462
Jacob Panaf7e9062014-10-06 21:17:14 -0700463static struct resource axp288_adc_resources[] = {
464 {
465 .name = "GPADC",
466 .start = AXP288_IRQ_GPADC,
467 .end = AXP288_IRQ_GPADC,
468 .flags = IORESOURCE_IRQ,
469 },
470};
471
Ramakrishna Pallalabdb01f72015-04-03 00:49:47 +0530472static struct resource axp288_extcon_resources[] = {
473 {
474 .start = AXP288_IRQ_VBUS_FALL,
475 .end = AXP288_IRQ_VBUS_FALL,
476 .flags = IORESOURCE_IRQ,
477 },
478 {
479 .start = AXP288_IRQ_VBUS_RISE,
480 .end = AXP288_IRQ_VBUS_RISE,
481 .flags = IORESOURCE_IRQ,
482 },
483 {
484 .start = AXP288_IRQ_MV_CHNG,
485 .end = AXP288_IRQ_MV_CHNG,
486 .flags = IORESOURCE_IRQ,
487 },
488 {
489 .start = AXP288_IRQ_BC_USB_CHNG,
490 .end = AXP288_IRQ_BC_USB_CHNG,
491 .flags = IORESOURCE_IRQ,
492 },
493};
494
Jacob Panaf7e9062014-10-06 21:17:14 -0700495static struct resource axp288_charger_resources[] = {
496 {
497 .start = AXP288_IRQ_OV,
498 .end = AXP288_IRQ_OV,
499 .flags = IORESOURCE_IRQ,
500 },
501 {
502 .start = AXP288_IRQ_DONE,
503 .end = AXP288_IRQ_DONE,
504 .flags = IORESOURCE_IRQ,
505 },
506 {
507 .start = AXP288_IRQ_CHARGING,
508 .end = AXP288_IRQ_CHARGING,
509 .flags = IORESOURCE_IRQ,
510 },
511 {
512 .start = AXP288_IRQ_SAFE_QUIT,
513 .end = AXP288_IRQ_SAFE_QUIT,
514 .flags = IORESOURCE_IRQ,
515 },
516 {
517 .start = AXP288_IRQ_SAFE_ENTER,
518 .end = AXP288_IRQ_SAFE_ENTER,
519 .flags = IORESOURCE_IRQ,
520 },
521 {
522 .start = AXP288_IRQ_QCBTU,
523 .end = AXP288_IRQ_QCBTU,
524 .flags = IORESOURCE_IRQ,
525 },
526 {
527 .start = AXP288_IRQ_CBTU,
528 .end = AXP288_IRQ_CBTU,
529 .flags = IORESOURCE_IRQ,
530 },
531 {
532 .start = AXP288_IRQ_QCBTO,
533 .end = AXP288_IRQ_QCBTO,
534 .flags = IORESOURCE_IRQ,
535 },
536 {
537 .start = AXP288_IRQ_CBTO,
538 .end = AXP288_IRQ_CBTO,
539 .flags = IORESOURCE_IRQ,
540 },
541};
542
543static struct mfd_cell axp288_cells[] = {
544 {
545 .name = "axp288_adc",
546 .num_resources = ARRAY_SIZE(axp288_adc_resources),
547 .resources = axp288_adc_resources,
548 },
549 {
Ramakrishna Pallalabdb01f72015-04-03 00:49:47 +0530550 .name = "axp288_extcon",
551 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
552 .resources = axp288_extcon_resources,
553 },
554 {
Jacob Panaf7e9062014-10-06 21:17:14 -0700555 .name = "axp288_charger",
556 .num_resources = ARRAY_SIZE(axp288_charger_resources),
557 .resources = axp288_charger_resources,
558 },
559 {
Todd Brandtd63878742015-02-02 15:41:41 -0800560 .name = "axp288_fuel_gauge",
561 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
562 .resources = axp288_fuel_gauge_resources,
Jacob Panaf7e9062014-10-06 21:17:14 -0700563 },
Aaron Lud8139f62014-11-24 17:24:47 +0800564 {
Borun Fue56e5ad2015-10-14 16:16:26 +0800565 .name = "axp20x-pek",
566 .num_resources = ARRAY_SIZE(axp288_power_button_resources),
567 .resources = axp288_power_button_resources,
568 },
569 {
Aaron Lud8139f62014-11-24 17:24:47 +0800570 .name = "axp288_pmic_acpi",
571 },
Jacob Panaf7e9062014-10-06 21:17:14 -0700572};
573
Carlo Caionecfb61a42014-05-01 14:29:27 +0200574static struct axp20x_dev *axp20x_pm_power_off;
575static void axp20x_power_off(void)
576{
Jacob Panaf7e9062014-10-06 21:17:14 -0700577 if (axp20x_pm_power_off->variant == AXP288_ID)
578 return;
579
Carlo Caionecfb61a42014-05-01 14:29:27 +0200580 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
581 AXP20X_OFF);
582}
583
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800584int axp20x_match_device(struct axp20x_dev *axp20x)
Jacob Panaf7e9062014-10-06 21:17:14 -0700585{
Chen-Yu Tsaie47a3cf2016-02-12 10:02:39 +0800586 struct device *dev = axp20x->dev;
Jacob Panaf7e9062014-10-06 21:17:14 -0700587 const struct acpi_device_id *acpi_id;
588 const struct of_device_id *of_id;
589
590 if (dev->of_node) {
Chen-Yu Tsaiaf7acc32016-02-12 10:02:40 +0800591 of_id = of_match_device(dev->driver->of_match_table, dev);
Jacob Panaf7e9062014-10-06 21:17:14 -0700592 if (!of_id) {
593 dev_err(dev, "Unable to match OF ID\n");
594 return -ENODEV;
595 }
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800596 axp20x->variant = (long)of_id->data;
Jacob Panaf7e9062014-10-06 21:17:14 -0700597 } else {
598 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
599 if (!acpi_id || !acpi_id->driver_data) {
600 dev_err(dev, "Unable to match ACPI ID and data\n");
601 return -ENODEV;
602 }
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800603 axp20x->variant = (long)acpi_id->driver_data;
Jacob Panaf7e9062014-10-06 21:17:14 -0700604 }
605
606 switch (axp20x->variant) {
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200607 case AXP152_ID:
608 axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
609 axp20x->cells = axp152_cells;
610 axp20x->regmap_cfg = &axp152_regmap_config;
611 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
612 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700613 case AXP202_ID:
614 case AXP209_ID:
615 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
616 axp20x->cells = axp20x_cells;
617 axp20x->regmap_cfg = &axp20x_regmap_config;
618 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
619 break;
Boris BREZILLONf05be582015-04-10 12:09:01 +0800620 case AXP221_ID:
621 axp20x->nr_cells = ARRAY_SIZE(axp22x_cells);
622 axp20x->cells = axp22x_cells;
623 axp20x->regmap_cfg = &axp22x_regmap_config;
624 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
625 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700626 case AXP288_ID:
627 axp20x->cells = axp288_cells;
628 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
629 axp20x->regmap_cfg = &axp288_regmap_config;
630 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
631 break;
632 default:
633 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
634 return -EINVAL;
635 }
636 dev_info(dev, "AXP20x variant %s found\n",
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800637 axp20x_model_names[axp20x->variant]);
Jacob Panaf7e9062014-10-06 21:17:14 -0700638
639 return 0;
640}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800641EXPORT_SYMBOL(axp20x_match_device);
Jacob Panaf7e9062014-10-06 21:17:14 -0700642
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800643int axp20x_device_probe(struct axp20x_dev *axp20x)
Carlo Caionecfb61a42014-05-01 14:29:27 +0200644{
Carlo Caionecfb61a42014-05-01 14:29:27 +0200645 int ret;
646
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800647 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200648 IRQF_ONESHOT | IRQF_SHARED, -1,
Jacob Panaf7e9062014-10-06 21:17:14 -0700649 axp20x->regmap_irq_chip,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200650 &axp20x->regmap_irqc);
651 if (ret) {
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800652 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200653 return ret;
654 }
655
Jacob Panaf7e9062014-10-06 21:17:14 -0700656 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800657 axp20x->nr_cells, NULL, 0, NULL);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200658
659 if (ret) {
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800660 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
661 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200662 return ret;
663 }
664
665 if (!pm_power_off) {
666 axp20x_pm_power_off = axp20x;
667 pm_power_off = axp20x_power_off;
668 }
669
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800670 dev_info(axp20x->dev, "AXP20X driver loaded\n");
Carlo Caionecfb61a42014-05-01 14:29:27 +0200671
672 return 0;
673}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800674EXPORT_SYMBOL(axp20x_device_probe);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200675
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800676int axp20x_device_remove(struct axp20x_dev *axp20x)
Carlo Caionecfb61a42014-05-01 14:29:27 +0200677{
Carlo Caionecfb61a42014-05-01 14:29:27 +0200678 if (axp20x == axp20x_pm_power_off) {
679 axp20x_pm_power_off = NULL;
680 pm_power_off = NULL;
681 }
682
683 mfd_remove_devices(axp20x->dev);
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800684 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200685
686 return 0;
687}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800688EXPORT_SYMBOL(axp20x_device_remove);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200689
690MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
691MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
692MODULE_LICENSE("GPL");