Nicolas Ferre | 467f1cf | 2012-01-26 11:59:20 +0100 | [diff] [blame] | 1 | /* |
| 2 | * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module |
| 3 | * |
| 4 | * Copyright (C) 2012 Atmel, |
| 5 | * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> |
| 6 | * |
| 7 | * Licensed under GPLv2 or later. |
| 8 | */ |
| 9 | |
| 10 | / { |
Ludovic Desroches | dcce6ce | 2012-04-02 20:44:20 +0200 | [diff] [blame] | 11 | memory { |
Nicolas Ferre | 467f1cf | 2012-01-26 11:59:20 +0100 | [diff] [blame] | 12 | reg = <0x20000000 0x8000000>; |
| 13 | }; |
Jean-Christophe PLAGNIOL-VILLARD | f75622f | 2012-02-23 23:09:41 +0800 | [diff] [blame] | 14 | |
Jean-Christophe PLAGNIOL-VILLARD | eb5e76f | 2012-03-02 20:44:23 +0800 | [diff] [blame] | 15 | clocks { |
Alexandre Belloni | 12dde44 | 2014-06-17 15:30:19 +0200 | [diff] [blame] | 16 | slow_xtal { |
| 17 | clock-frequency = <32768>; |
| 18 | }; |
Boris BREZILLON | 0d04fca | 2014-05-12 18:23:36 +0200 | [diff] [blame] | 19 | |
Alexandre Belloni | 12dde44 | 2014-06-17 15:30:19 +0200 | [diff] [blame] | 20 | main_xtal { |
| 21 | clock-frequency = <12000000>; |
| 22 | }; |
Boris BREZILLON | 0d04fca | 2014-05-12 18:23:36 +0200 | [diff] [blame] | 23 | }; |
| 24 | |
Jean-Christophe PLAGNIOL-VILLARD | 86a89f4 | 2012-02-21 21:38:18 +0800 | [diff] [blame] | 25 | ahb { |
Richard Genoud | 6901d94 | 2013-03-20 12:23:40 +0100 | [diff] [blame] | 26 | apb { |
| 27 | pinctrl@fffff400 { |
| 28 | 1wire_cm { |
| 29 | pinctrl_1wire_cm: 1wire_cm-0 { |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 30 | atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */ |
Richard Genoud | 6901d94 | 2013-03-20 12:23:40 +0100 | [diff] [blame] | 31 | }; |
| 32 | }; |
| 33 | }; |
Nicolas Ferre | 5934973 | 2015-03-19 17:23:13 +0100 | [diff] [blame] | 34 | |
| 35 | rtc@fffffeb0 { |
| 36 | status = "okay"; |
| 37 | }; |
Richard Genoud | 6901d94 | 2013-03-20 12:23:40 +0100 | [diff] [blame] | 38 | }; |
| 39 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 40 | ebi: ebi@10000000 { |
| 41 | pinctrl-0 = <&pinctrl_ebi_addr_nand |
| 42 | &pinctrl_ebi_data_0_7>; |
| 43 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 86a89f4 | 2012-02-21 21:38:18 +0800 | [diff] [blame] | 44 | status = "okay"; |
| 45 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 46 | nand_controller: nand-controller { |
| 47 | status = "okay"; |
| 48 | pinctrl-0 = <&pinctrl_nand_oe_we |
| 49 | &pinctrl_nand_cs |
| 50 | &pinctrl_nand_rb>; |
| 51 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 86a89f4 | 2012-02-21 21:38:18 +0800 | [diff] [blame] | 52 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 53 | nand@3 { |
| 54 | reg = <0x3 0x0 0x800000>; |
| 55 | rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; |
| 56 | cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>; |
| 57 | nand-bus-width = <8>; |
| 58 | nand-ecc-mode = "hw"; |
| 59 | nand-ecc-strength = <2>; |
| 60 | nand-ecc-step-size = <512>; |
| 61 | nand-on-flash-bbt; |
| 62 | label = "atmel_nand"; |
Jean-Christophe PLAGNIOL-VILLARD | 86a89f4 | 2012-02-21 21:38:18 +0800 | [diff] [blame] | 63 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 64 | partitions { |
| 65 | compatible = "fixed-partitions"; |
| 66 | #address-cells = <1>; |
| 67 | #size-cells = <1>; |
Jean-Christophe PLAGNIOL-VILLARD | 86a89f4 | 2012-02-21 21:38:18 +0800 | [diff] [blame] | 68 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 69 | at91bootstrap@0 { |
| 70 | label = "at91bootstrap"; |
| 71 | reg = <0x0 0x40000>; |
| 72 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 86a89f4 | 2012-02-21 21:38:18 +0800 | [diff] [blame] | 73 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 74 | uboot@40000 { |
| 75 | label = "u-boot"; |
| 76 | reg = <0x40000 0x80000>; |
| 77 | }; |
| 78 | |
| 79 | ubootenv@c0000 { |
| 80 | label = "U-Boot Env"; |
| 81 | reg = <0xc0000 0x140000>; |
| 82 | }; |
| 83 | |
| 84 | kernel@200000 { |
| 85 | label = "kernel"; |
| 86 | reg = <0x200000 0x600000>; |
| 87 | }; |
| 88 | |
| 89 | rootfs@800000 { |
| 90 | label = "rootfs"; |
| 91 | reg = <0x800000 0x1f800000>; |
| 92 | }; |
| 93 | }; |
| 94 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 86a89f4 | 2012-02-21 21:38:18 +0800 | [diff] [blame] | 95 | }; |
| 96 | }; |
| 97 | }; |
| 98 | |
Jean-Christophe PLAGNIOL-VILLARD | f75622f | 2012-02-23 23:09:41 +0800 | [diff] [blame] | 99 | leds { |
| 100 | compatible = "gpio-leds"; |
| 101 | |
| 102 | pb18 { |
| 103 | label = "pb18"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 104 | gpios = <&pioB 18 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | f75622f | 2012-02-23 23:09:41 +0800 | [diff] [blame] | 105 | linux,default-trigger = "heartbeat"; |
| 106 | }; |
| 107 | |
| 108 | pd21 { |
| 109 | label = "pd21"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 110 | gpios = <&pioD 21 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | f75622f | 2012-02-23 23:09:41 +0800 | [diff] [blame] | 111 | }; |
| 112 | }; |
Richard Genoud | 6901d94 | 2013-03-20 12:23:40 +0100 | [diff] [blame] | 113 | |
| 114 | 1wire_cm { |
| 115 | compatible = "w1-gpio"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 116 | gpios = <&pioB 18 GPIO_ACTIVE_HIGH>; |
Richard Genoud | 6901d94 | 2013-03-20 12:23:40 +0100 | [diff] [blame] | 117 | linux,open-drain; |
| 118 | pinctrl-names = "default"; |
| 119 | pinctrl-0 = <&pinctrl_1wire_cm>; |
| 120 | status = "okay"; |
| 121 | }; |
| 122 | |
Nicolas Ferre | 467f1cf | 2012-01-26 11:59:20 +0100 | [diff] [blame] | 123 | }; |