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Thomas Gleixner45051532019-05-29 16:57:47 -07001// SPDX-License-Identifier: GPL-2.0-only
Alessandro Rubini83125a32012-04-04 19:40:21 +02002/*
Andy Shevchenko392e8792019-06-19 17:19:55 +03003 * DMA translation between STA2x11 AMBA memory mapping and the x86 memory mapping
Alessandro Rubini83125a32012-04-04 19:40:21 +02004 *
5 * ST Microelectronics ConneXt (STA2X11/STA2X10)
6 *
7 * Copyright (c) 2010-2011 Wind River Systems, Inc.
Alessandro Rubini83125a32012-04-04 19:40:21 +02008 */
9
10#include <linux/pci.h>
11#include <linux/pci_ids.h>
12#include <linux/export.h>
13#include <linux/list.h>
Christoph Hellwig16fee292020-11-06 17:02:17 +010014#include <linux/dma-map-ops.h>
15#include <linux/swiotlb.h>
Christoph Hellwig5860acc2017-05-22 11:38:27 +020016#include <asm/iommu.h>
Alessandro Rubini83125a32012-04-04 19:40:21 +020017
18#define STA2X11_SWIOTLB_SIZE (4*1024*1024)
Alessandro Rubini83125a32012-04-04 19:40:21 +020019
20/*
21 * We build a list of bus numbers that are under the ConneXt. The
22 * main bridge hosts 4 busses, which are the 4 endpoints, in order.
23 */
24#define STA2X11_NR_EP 4 /* 0..3 included */
25#define STA2X11_NR_FUNCS 8 /* 0..7 included */
26#define STA2X11_AMBA_SIZE (512 << 20)
27
28struct sta2x11_ahb_regs { /* saved during suspend */
29 u32 base, pexlbase, pexhbase, crw;
30};
31
32struct sta2x11_mapping {
Alessandro Rubini83125a32012-04-04 19:40:21 +020033 int is_suspended;
34 struct sta2x11_ahb_regs regs[STA2X11_NR_FUNCS];
35};
36
37struct sta2x11_instance {
38 struct list_head list;
39 int bus0;
40 struct sta2x11_mapping map[STA2X11_NR_EP];
41};
42
43static LIST_HEAD(sta2x11_instance_list);
44
45/* At probe time, record new instances of this bridge (likely one only) */
46static void sta2x11_new_instance(struct pci_dev *pdev)
47{
48 struct sta2x11_instance *instance;
49
50 instance = kzalloc(sizeof(*instance), GFP_ATOMIC);
51 if (!instance)
52 return;
53 /* This has a subordinate bridge, with 4 more-subordinate ones */
54 instance->bus0 = pdev->subordinate->number + 1;
55
56 if (list_empty(&sta2x11_instance_list)) {
57 int size = STA2X11_SWIOTLB_SIZE;
58 /* First instance: register your own swiotlb area */
59 dev_info(&pdev->dev, "Using SWIOTLB (size %i)\n", size);
60 if (swiotlb_late_init_with_default_size(size))
61 dev_emerg(&pdev->dev, "init swiotlb failed\n");
62 }
63 list_add(&instance->list, &sta2x11_instance_list);
64}
65DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, 0xcc17, sta2x11_new_instance);
66
67/*
68 * Utility functions used in this file from below
69 */
70static struct sta2x11_instance *sta2x11_pdev_to_instance(struct pci_dev *pdev)
71{
72 struct sta2x11_instance *instance;
73 int ep;
74
75 list_for_each_entry(instance, &sta2x11_instance_list, list) {
76 ep = pdev->bus->number - instance->bus0;
77 if (ep >= 0 && ep < STA2X11_NR_EP)
78 return instance;
79 }
80 return NULL;
81}
82
83static int sta2x11_pdev_to_ep(struct pci_dev *pdev)
84{
85 struct sta2x11_instance *instance;
86
87 instance = sta2x11_pdev_to_instance(pdev);
88 if (!instance)
89 return -1;
90
91 return pdev->bus->number - instance->bus0;
92}
93
Alessandro Rubini83125a32012-04-04 19:40:21 +020094/* This is exported, as some devices need to access the MFD registers */
95struct sta2x11_instance *sta2x11_get_instance(struct pci_dev *pdev)
96{
97 return sta2x11_pdev_to_instance(pdev);
98}
99EXPORT_SYMBOL(sta2x11_get_instance);
100
Alessandro Rubini83125a32012-04-04 19:40:21 +0200101/* At setup time, we use our own ops if the device is a ConneXt one */
102static void sta2x11_setup_pdev(struct pci_dev *pdev)
103{
104 struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev);
105
106 if (!instance) /* either a sta2x11 bridge or another ST device */
107 return;
Alessandro Rubini83125a32012-04-04 19:40:21 +0200108
109 /* We must enable all devices as master, for audio DMA to work */
110 pci_set_master(pdev);
111}
112DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_setup_pdev);
113
114/*
Alessandro Rubini83125a32012-04-04 19:40:21 +0200115 * At boot we must set up the mappings for the pcie-to-amba bridge.
116 * It involves device access, and the same happens at suspend/resume time
117 */
118
119#define AHB_MAPB 0xCA4
120#define AHB_CRW(i) (AHB_MAPB + 0 + (i) * 0x10)
121#define AHB_CRW_SZMASK 0xfffffc00UL
122#define AHB_CRW_ENABLE (1 << 0)
123#define AHB_CRW_WTYPE_MEM (2 << 1)
124#define AHB_CRW_ROE (1UL << 3) /* Relax Order Ena */
125#define AHB_CRW_NSE (1UL << 4) /* No Snoop Enable */
126#define AHB_BASE(i) (AHB_MAPB + 4 + (i) * 0x10)
127#define AHB_PEXLBASE(i) (AHB_MAPB + 8 + (i) * 0x10)
128#define AHB_PEXHBASE(i) (AHB_MAPB + 12 + (i) * 0x10)
129
130/* At probe time, enable mapping for each endpoint, using the pdev */
131static void sta2x11_map_ep(struct pci_dev *pdev)
132{
Nicolas Saenz Juliennee380a032019-11-07 16:06:45 +0100133 struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev);
134 struct device *dev = &pdev->dev;
135 u32 amba_base, max_amba_addr;
Jim Quinlane0d07272020-09-17 18:43:40 +0200136 int i, ret;
Alessandro Rubini83125a32012-04-04 19:40:21 +0200137
Nicolas Saenz Juliennee380a032019-11-07 16:06:45 +0100138 if (!instance)
Alessandro Rubini83125a32012-04-04 19:40:21 +0200139 return;
Nicolas Saenz Juliennee380a032019-11-07 16:06:45 +0100140
141 pci_read_config_dword(pdev, AHB_BASE(0), &amba_base);
142 max_amba_addr = amba_base + STA2X11_AMBA_SIZE - 1;
143
Jim Quinlane0d07272020-09-17 18:43:40 +0200144 ret = dma_direct_set_offset(dev, 0, amba_base, STA2X11_AMBA_SIZE);
145 if (ret)
146 dev_err(dev, "sta2x11: could not set DMA offset\n");
Nicolas Saenz Juliennee380a032019-11-07 16:06:45 +0100147
Nicolas Saenz Juliennea7ba70f2019-11-21 10:26:44 +0100148 dev->bus_dma_limit = max_amba_addr;
Nicolas Saenz Juliennee380a032019-11-07 16:06:45 +0100149 pci_set_consistent_dma_mask(pdev, max_amba_addr);
150 pci_set_dma_mask(pdev, max_amba_addr);
Alessandro Rubini83125a32012-04-04 19:40:21 +0200151
152 /* Configure AHB mapping */
153 pci_write_config_dword(pdev, AHB_PEXLBASE(0), 0);
154 pci_write_config_dword(pdev, AHB_PEXHBASE(0), 0);
155 pci_write_config_dword(pdev, AHB_CRW(0), STA2X11_AMBA_SIZE |
156 AHB_CRW_WTYPE_MEM | AHB_CRW_ENABLE);
157
158 /* Disable all the other windows */
159 for (i = 1; i < STA2X11_NR_FUNCS; i++)
160 pci_write_config_dword(pdev, AHB_CRW(i), 0);
161
162 dev_info(&pdev->dev,
163 "sta2x11: Map EP %i: AMBA address %#8x-%#8x\n",
Nicolas Saenz Juliennee380a032019-11-07 16:06:45 +0100164 sta2x11_pdev_to_ep(pdev), amba_base, max_amba_addr);
Alessandro Rubini83125a32012-04-04 19:40:21 +0200165}
166DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_map_ep);
167
168#ifdef CONFIG_PM /* Some register values must be saved and restored */
169
Nicolas Saenz Juliennee380a032019-11-07 16:06:45 +0100170static struct sta2x11_mapping *sta2x11_pdev_to_mapping(struct pci_dev *pdev)
171{
172 struct sta2x11_instance *instance;
173 int ep;
174
175 instance = sta2x11_pdev_to_instance(pdev);
176 if (!instance)
177 return NULL;
178 ep = sta2x11_pdev_to_ep(pdev);
179 return instance->map + ep;
180}
181
Alessandro Rubini83125a32012-04-04 19:40:21 +0200182static void suspend_mapping(struct pci_dev *pdev)
183{
184 struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);
185 int i;
186
187 if (!map)
188 return;
189
190 if (map->is_suspended)
191 return;
192 map->is_suspended = 1;
193
194 /* Save all window configs */
195 for (i = 0; i < STA2X11_NR_FUNCS; i++) {
196 struct sta2x11_ahb_regs *regs = map->regs + i;
197
198 pci_read_config_dword(pdev, AHB_BASE(i), &regs->base);
199 pci_read_config_dword(pdev, AHB_PEXLBASE(i), &regs->pexlbase);
200 pci_read_config_dword(pdev, AHB_PEXHBASE(i), &regs->pexhbase);
201 pci_read_config_dword(pdev, AHB_CRW(i), &regs->crw);
202 }
203}
204DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, suspend_mapping);
205
206static void resume_mapping(struct pci_dev *pdev)
207{
208 struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);
209 int i;
210
211 if (!map)
212 return;
213
214
215 if (!map->is_suspended)
216 goto out;
217 map->is_suspended = 0;
218
219 /* Restore all window configs */
220 for (i = 0; i < STA2X11_NR_FUNCS; i++) {
221 struct sta2x11_ahb_regs *regs = map->regs + i;
222
223 pci_write_config_dword(pdev, AHB_BASE(i), regs->base);
224 pci_write_config_dword(pdev, AHB_PEXLBASE(i), regs->pexlbase);
225 pci_write_config_dword(pdev, AHB_PEXHBASE(i), regs->pexhbase);
226 pci_write_config_dword(pdev, AHB_CRW(i), regs->crw);
227 }
228out:
229 pci_set_master(pdev); /* Like at boot, enable master on all devices */
230}
231DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, resume_mapping);
232
233#endif /* CONFIG_PM */