blob: ccd7e80ce943428a9e1f9fabb8c38bc219262f55 [file] [log] [blame]
Thomas Gleixnerec8f24b2019-05-19 13:07:45 +01001# SPDX-License-Identifier: GPL-2.0-only
Alexandre Belloni41141122015-03-13 22:57:18 +01002menuconfig ARCH_AT91
Nicolas Ferreed08b632018-02-28 15:56:43 +01003 bool "AT91/Microchip SoCs"
Szemző András2d4c44e2017-05-31 03:06:21 +02004 depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M
Arnd Bergmanndbeb0c82017-08-23 16:46:15 +02005 select ARM_CPU_SUSPEND if PM && ARCH_MULTI_V7
Nicolas Ferreef7eda22014-11-21 17:10:06 +01006 select COMMON_CLK_AT91
Linus Walleij5c34a4e2016-06-02 14:10:16 +02007 select GPIOLIB
Alexandre Belloni41141122015-03-13 22:57:18 +01008 select PINCTRL
Alexandre Belloni41141122015-03-13 22:57:18 +01009 select SOC_BUS
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000010
Alexandre Belloni41141122015-03-13 22:57:18 +010011if ARCH_AT91
Szemző András2d4c44e2017-05-31 03:06:21 +020012config SOC_SAMV7
13 bool "SAM Cortex-M7 family" if ARM_SINGLE_ARMV7M
14 select COMMON_CLK_AT91
15 select PINCTRL_AT91
16 help
Nicolas Ferreed08b632018-02-28 15:56:43 +010017 Select this if you are using an SoC from Microchip's SAME7, SAMS7 or SAMV7
Szemző András2d4c44e2017-05-31 03:06:21 +020018 families.
19
Nicolas Ferrec268a742015-07-30 19:12:12 +020020config SOC_SAMA5D2
Masahiro Yamadae3246542015-11-16 12:06:10 +090021 bool "SAMA5D2 family"
22 depends on ARCH_MULTI_V7
Nicolas Ferrec268a742015-07-30 19:12:12 +020023 select SOC_SAMA5
24 select CACHE_L2X0
Nicolas Ferrec268a742015-07-30 19:12:12 +020025 select HAVE_AT91_UTMI
26 select HAVE_AT91_USB_CLK
27 select HAVE_AT91_H32MX
28 select HAVE_AT91_GENERATED_CLK
Quentin Schulz08658052017-08-10 08:34:03 +020029 select HAVE_AT91_AUDIO_PLL
Codrin Ciubotariu96e4ea82018-06-18 17:12:36 +030030 select HAVE_AT91_I2S_MUX_CLK
Ludovic Desroches84235362015-12-01 11:44:40 +010031 select PINCTRL_AT91PIO4
Nicolas Ferrec268a742015-07-30 19:12:12 +020032 help
Nicolas Ferreed08b632018-02-28 15:56:43 +010033 Select this if ou are using one of Microchip's SAMA5D2 family SoC.
Nicolas Ferrec268a742015-07-30 19:12:12 +020034
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000035config SOC_SAMA5D3
Masahiro Yamadae3246542015-11-16 12:06:10 +090036 bool "SAMA5D3 family"
37 depends on ARCH_MULTI_V7
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000038 select SOC_SAMA5
Boris BREZILLONf090fb32013-10-11 12:22:06 +020039 select HAVE_AT91_UTMI
Boris BREZILLONa9c06882013-10-11 13:27:06 +020040 select HAVE_AT91_SMD
Boris BREZILLONc84a61d2013-10-17 18:55:41 +020041 select HAVE_AT91_USB_CLK
Ludovic Desroches84235362015-12-01 11:44:40 +010042 select PINCTRL_AT91
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000043 help
Nicolas Ferreed08b632018-02-28 15:56:43 +010044 Select this if you are using one of Microchip's SAMA5D3 family SoC.
Josh Wu7f457162013-11-06 18:01:11 +080045 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020046
47config SOC_SAMA5D4
Masahiro Yamadae3246542015-11-16 12:06:10 +090048 bool "SAMA5D4 family"
49 depends on ARCH_MULTI_V7
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020050 select SOC_SAMA5
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020051 select CACHE_L2X0
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020052 select HAVE_AT91_UTMI
53 select HAVE_AT91_SMD
54 select HAVE_AT91_USB_CLK
55 select HAVE_AT91_H32MX
Ludovic Desroches84235362015-12-01 11:44:40 +010056 select PINCTRL_AT91
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020057 help
Nicolas Ferreed08b632018-02-28 15:56:43 +010058 Select this if you are using one of Microchip's SAMA5D4 family SoC.
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000059
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +080060config SOC_AT91RM9200
Masahiro Yamadae3246542015-11-16 12:06:10 +090061 bool "AT91RM9200"
62 depends on ARCH_MULTI_V4T
Nicolas Ferreef7eda22014-11-21 17:10:06 +010063 select ATMEL_AIC_IRQ
Alexandre Bellonib2f06272017-05-31 03:06:22 +020064 select ATMEL_PM if PM
Alexandre Bellonib53cdd02015-03-12 13:07:31 +010065 select ATMEL_ST
Russell Kingc7508152008-10-26 10:55:14 +000066 select CPU_ARM920T
Boris BREZILLONc84a61d2013-10-17 18:55:41 +020067 select HAVE_AT91_USB_CLK
Ludovic Desroches84235362015-12-01 11:44:40 +010068 select PINCTRL_AT91
Alexandre Belloni41141122015-03-13 22:57:18 +010069 select SOC_SAM_V4_V5
Wenyou Yang896bc872015-03-09 11:44:50 +080070 select SRAM if PM
Alexandre Belloni41141122015-03-13 22:57:18 +010071 help
Nicolas Ferreed08b632018-02-28 15:56:43 +010072 Select this if you are using Microchip's AT91RM9200 SoC.
Andrew Victor8fc5ffa2006-06-29 16:06:33 +010073
Alexandre Belloni2b019a42015-01-15 22:58:13 +010074config SOC_AT91SAM9
Masahiro Yamadae3246542015-11-16 12:06:10 +090075 bool "AT91SAM9"
76 depends on ARCH_MULTI_V5
Alexandre Belloni2b019a42015-01-15 22:58:13 +010077 select ATMEL_AIC_IRQ
Alexandre Bellonib2f06272017-05-31 03:06:22 +020078 select ATMEL_PM if PM
Alexandre Belloni2b019a42015-01-15 22:58:13 +010079 select ATMEL_SDRAMC
Alexandre Belloni2b019a42015-01-15 22:58:13 +010080 select CPU_ARM926T
Boris BREZILLONa9c06882013-10-11 13:27:06 +020081 select HAVE_AT91_SMD
Boris BREZILLONc84a61d2013-10-17 18:55:41 +020082 select HAVE_AT91_USB_CLK
Alexandre Belloni2b019a42015-01-15 22:58:13 +010083 select HAVE_AT91_UTMI
Hong Xu74db4fb2012-04-17 14:26:31 +080084 select HAVE_FB_ATMEL
Alexandre Belloni2b019a42015-01-15 22:58:13 +010085 select MEMORY
Ludovic Desroches84235362015-12-01 11:44:40 +010086 select PINCTRL_AT91
Alexandre Belloni41141122015-03-13 22:57:18 +010087 select SOC_SAM_V4_V5
Wenyou Yang896bc872015-03-09 11:44:50 +080088 select SRAM if PM
Hong Xu74db4fb2012-04-17 14:26:31 +080089 help
Nicolas Ferreed08b632018-02-28 15:56:43 +010090 Select this if you are using one of those Microchip SoC:
Alexandre Belloni2b019a42015-01-15 22:58:13 +010091 AT91SAM9260
92 AT91SAM9261
93 AT91SAM9263
94 AT91SAM9G15
95 AT91SAM9G20
96 AT91SAM9G25
97 AT91SAM9G35
98 AT91SAM9G45
99 AT91SAM9G46
100 AT91SAM9M10
101 AT91SAM9M11
102 AT91SAM9N12
103 AT91SAM9RL
104 AT91SAM9X25
105 AT91SAM9X35
106 AT91SAM9XE
Greg Ungerer9f1ccef2007-07-30 02:39:21 +0100107
Claudiu Bezneafe7ff552019-11-29 15:51:38 +0200108config SOC_SAM9X60
109 bool "SAM9X60"
110 depends on ARCH_MULTI_V5
111 select ATMEL_AIC5_IRQ
112 select ATMEL_PM if PM
113 select ATMEL_SDRAMC
114 select CPU_ARM926T
115 select HAVE_AT91_USB_CLK
116 select HAVE_AT91_GENERATED_CLK
117 select HAVE_AT91_SAM9X60_PLL
118 select MEMORY
119 select PINCTRL_AT91
120 select SOC_SAM_V4_V5
121 select SRAM if PM
122 help
123 Select this if you are using Microchip's SAM9X60 SoC
124
Alexandre Belloni7803dc82019-04-26 23:47:13 +0200125comment "Clocksource driver selection"
126
127config ATMEL_CLOCKSOURCE_PIT
128 bool "Periodic Interval Timer (PIT) support"
Claudiu Bezneafe7ff552019-11-29 15:51:38 +0200129 depends on SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5
Alexandre Belloni7803dc82019-04-26 23:47:13 +0200130 default SOC_AT91SAM9 || SOC_SAMA5
131 select ATMEL_PIT
132 help
133 Select this to get a clocksource based on the Atmel Periodic Interval
134 Timer. It has a relatively low resolution and the TC Block clocksource
135 should be preferred.
136
137config ATMEL_CLOCKSOURCE_TCB
138 bool "Timer Counter Blocks (TCB) support"
Claudiu Bezneafe7ff552019-11-29 15:51:38 +0200139 default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5
Alexandre Belloni7803dc82019-04-26 23:47:13 +0200140 select ATMEL_TCB_CLKSRC
141 help
142 Select this to get a high precision clocksource based on a
143 TC block with a 5+ MHz base clock rate.
144 On platforms with 16-bit counters, two timer channels are combined
145 to make a single 32-bit timer.
146 It can also be used as a clock event device supporting oneshot mode.
147
Alexandre Belloni41141122015-03-13 22:57:18 +0100148config HAVE_AT91_UTMI
149 bool
150
151config HAVE_AT91_USB_CLK
152 bool
153
154config COMMON_CLK_AT91
155 bool
Boris Brezillon863a81c2014-09-05 09:54:13 +0200156 select MFD_SYSCON
Alexandre Belloni41141122015-03-13 22:57:18 +0100157
158config HAVE_AT91_SMD
159 bool
160
161config HAVE_AT91_H32MX
162 bool
163
Nicolas Ferredf70aee2015-07-31 11:43:12 +0200164config HAVE_AT91_GENERATED_CLK
165 bool
166
Quentin Schulz08658052017-08-10 08:34:03 +0200167config HAVE_AT91_AUDIO_PLL
168 bool
169
Codrin Ciubotariu96e4ea82018-06-18 17:12:36 +0300170config HAVE_AT91_I2S_MUX_CLK
171 bool
172
Claudiu Bezneafc8c4c02019-11-29 15:51:37 +0200173config HAVE_AT91_SAM9X60_PLL
174 bool
175
Alexandre Belloni41141122015-03-13 22:57:18 +0100176config SOC_SAM_V4_V5
177 bool
178
179config SOC_SAM_V7
180 bool
181
182config SOC_SAMA5
183 bool
184 select ATMEL_AIC5_IRQ
Alexandre Bellonib2f06272017-05-31 03:06:22 +0200185 select ATMEL_PM if PM
Alexandre Belloni41141122015-03-13 22:57:18 +0100186 select ATMEL_SDRAMC
187 select MEMORY
188 select SOC_SAM_V7
189 select SRAM if PM
190
Alexandre Bellonib2f06272017-05-31 03:06:22 +0200191config ATMEL_PM
192 bool
193
SAN People73a59c12006-01-09 17:05:41 +0000194endif