AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | /* |
| 10 | * AM335x Starter Kit |
| 11 | * http://www.ti.com/tool/tmdssk3358 |
| 12 | */ |
| 13 | |
| 14 | /dts-v1/; |
| 15 | |
Florian Vaussard | eb33ef66 | 2013-06-03 16:12:22 +0200 | [diff] [blame] | 16 | #include "am33xx.dtsi" |
Laurent Pinchart | eb9bdef | 2013-07-18 00:54:24 +0200 | [diff] [blame] | 17 | #include <dt-bindings/pwm/pwm.h> |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 18 | |
| 19 | / { |
| 20 | model = "TI AM335x EVM-SK"; |
| 21 | compatible = "ti,am335x-evmsk", "ti,am33xx"; |
| 22 | |
| 23 | cpus { |
| 24 | cpu@0 { |
| 25 | cpu0-supply = <&vdd1_reg>; |
| 26 | }; |
| 27 | }; |
| 28 | |
| 29 | memory { |
| 30 | device_type = "memory"; |
| 31 | reg = <0x80000000 0x10000000>; /* 256 MB */ |
| 32 | }; |
| 33 | |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 34 | vbat: fixedregulator@0 { |
| 35 | compatible = "regulator-fixed"; |
| 36 | regulator-name = "vbat"; |
| 37 | regulator-min-microvolt = <5000000>; |
| 38 | regulator-max-microvolt = <5000000>; |
| 39 | regulator-boot-on; |
| 40 | }; |
| 41 | |
| 42 | lis3_reg: fixedregulator@1 { |
| 43 | compatible = "regulator-fixed"; |
| 44 | regulator-name = "lis3_reg"; |
| 45 | regulator-boot-on; |
| 46 | }; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 47 | |
| 48 | leds { |
Vaibhav Hiremath | b8f70c3 | 2013-03-26 15:42:15 +0530 | [diff] [blame] | 49 | pinctrl-names = "default"; |
| 50 | pinctrl-0 = <&user_leds_s0>; |
| 51 | |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 52 | compatible = "gpio-leds"; |
| 53 | |
| 54 | led@1 { |
| 55 | label = "evmsk:green:usr0"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 56 | gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 57 | default-state = "off"; |
| 58 | }; |
| 59 | |
| 60 | led@2 { |
| 61 | label = "evmsk:green:usr1"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 62 | gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 63 | default-state = "off"; |
| 64 | }; |
| 65 | |
| 66 | led@3 { |
| 67 | label = "evmsk:green:mmc0"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 68 | gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 69 | linux,default-trigger = "mmc0"; |
| 70 | default-state = "off"; |
| 71 | }; |
| 72 | |
| 73 | led@4 { |
| 74 | label = "evmsk:green:heartbeat"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 75 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 76 | linux,default-trigger = "heartbeat"; |
| 77 | default-state = "off"; |
| 78 | }; |
| 79 | }; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 80 | |
| 81 | gpio_buttons: gpio_buttons@0 { |
| 82 | compatible = "gpio-keys"; |
| 83 | #address-cells = <1>; |
| 84 | #size-cells = <0>; |
| 85 | |
| 86 | switch@1 { |
| 87 | label = "button0"; |
| 88 | linux,code = <0x100>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 89 | gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 90 | }; |
| 91 | |
| 92 | switch@2 { |
| 93 | label = "button1"; |
| 94 | linux,code = <0x101>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 95 | gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 96 | }; |
| 97 | |
| 98 | switch@3 { |
| 99 | label = "button2"; |
| 100 | linux,code = <0x102>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 101 | gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 102 | gpio-key,wakeup; |
| 103 | }; |
| 104 | |
| 105 | switch@4 { |
| 106 | label = "button3"; |
| 107 | linux,code = <0x103>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 108 | gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 109 | }; |
| 110 | }; |
Philip Avinash | 1632fbd | 2013-06-06 15:52:39 +0200 | [diff] [blame] | 111 | |
| 112 | backlight { |
| 113 | compatible = "pwm-backlight"; |
Laurent Pinchart | eb9bdef | 2013-07-18 00:54:24 +0200 | [diff] [blame] | 114 | pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>; |
Philip Avinash | 1632fbd | 2013-06-06 15:52:39 +0200 | [diff] [blame] | 115 | brightness-levels = <0 58 61 66 75 90 125 170 255>; |
| 116 | default-brightness-level = <8>; |
| 117 | }; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 118 | |
| 119 | sound { |
| 120 | compatible = "ti,da830-evm-audio"; |
| 121 | ti,model = "AM335x-EVMSK"; |
| 122 | ti,audio-codec = <&tlv320aic3106>; |
| 123 | ti,mcasp-controller = <&mcasp1>; |
Peter Ujfalusi | 967d6a0 | 2013-12-23 11:28:34 +0200 | [diff] [blame] | 124 | ti,codec-clock-rate = <24000000>; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 125 | ti,audio-routing = |
| 126 | "Headphone Jack", "HPLOUT", |
| 127 | "Headphone Jack", "HPROUT"; |
| 128 | }; |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 129 | }; |
| 130 | |
Javier Martinez Canillas | 82d75af | 2013-09-20 17:00:00 +0200 | [diff] [blame] | 131 | &am33xx_pinmux { |
| 132 | pinctrl-names = "default"; |
| 133 | pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; |
| 134 | |
| 135 | user_leds_s0: user_leds_s0 { |
| 136 | pinctrl-single,pins = < |
| 137 | 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ |
| 138 | 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ |
| 139 | 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ |
| 140 | 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ |
| 141 | >; |
| 142 | }; |
| 143 | |
| 144 | gpio_keys_s0: gpio_keys_s0 { |
| 145 | pinctrl-single,pins = < |
| 146 | 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ |
| 147 | 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ |
| 148 | 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ |
| 149 | 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ |
| 150 | >; |
| 151 | }; |
| 152 | |
| 153 | i2c0_pins: pinmux_i2c0_pins { |
| 154 | pinctrl-single,pins = < |
| 155 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
| 156 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
| 157 | >; |
| 158 | }; |
| 159 | |
| 160 | uart0_pins: pinmux_uart0_pins { |
| 161 | pinctrl-single,pins = < |
| 162 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ |
| 163 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ |
| 164 | >; |
| 165 | }; |
| 166 | |
| 167 | clkout2_pin: pinmux_clkout2_pin { |
| 168 | pinctrl-single,pins = < |
| 169 | 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
| 170 | >; |
| 171 | }; |
| 172 | |
| 173 | ecap2_pins: backlight_pins { |
| 174 | pinctrl-single,pins = < |
| 175 | 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ |
| 176 | >; |
| 177 | }; |
| 178 | |
| 179 | cpsw_default: cpsw_default { |
| 180 | pinctrl-single,pins = < |
| 181 | /* Slave 1 */ |
| 182 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ |
| 183 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ |
| 184 | 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ |
| 185 | 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ |
| 186 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ |
| 187 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ |
| 188 | 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ |
| 189 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ |
| 190 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ |
| 191 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ |
| 192 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ |
| 193 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ |
| 194 | |
| 195 | /* Slave 2 */ |
| 196 | 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ |
| 197 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ |
| 198 | 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ |
| 199 | 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ |
| 200 | 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ |
| 201 | 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ |
| 202 | 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ |
| 203 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ |
| 204 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ |
| 205 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ |
| 206 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ |
| 207 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ |
| 208 | >; |
| 209 | }; |
| 210 | |
| 211 | cpsw_sleep: cpsw_sleep { |
| 212 | pinctrl-single,pins = < |
| 213 | /* Slave 1 reset value */ |
| 214 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 215 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 216 | 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 217 | 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 218 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 219 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 220 | 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 221 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 222 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 223 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 224 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 225 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 226 | |
| 227 | /* Slave 2 reset value*/ |
| 228 | 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 229 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 230 | 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 231 | 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 232 | 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 233 | 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 234 | 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 235 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 236 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 237 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 238 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 239 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 240 | >; |
| 241 | }; |
| 242 | |
| 243 | davinci_mdio_default: davinci_mdio_default { |
| 244 | pinctrl-single,pins = < |
| 245 | /* MDIO */ |
| 246 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ |
| 247 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ |
| 248 | >; |
| 249 | }; |
| 250 | |
| 251 | davinci_mdio_sleep: davinci_mdio_sleep { |
| 252 | pinctrl-single,pins = < |
| 253 | /* MDIO reset value */ |
| 254 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 255 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 256 | >; |
| 257 | }; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 258 | |
Peter Ujfalusi | 29ea5ef | 2013-12-23 11:28:35 +0200 | [diff] [blame] | 259 | mmc1_pins: pinmux_mmc1_pins { |
| 260 | pinctrl-single,pins = < |
| 261 | 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ |
| 262 | >; |
| 263 | }; |
| 264 | |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 265 | mcasp1_pins: mcasp1_pins { |
| 266 | pinctrl-single,pins = < |
| 267 | 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ |
| 268 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ |
| 269 | 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ |
| 270 | 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ |
| 271 | >; |
| 272 | }; |
Javier Martinez Canillas | 82d75af | 2013-09-20 17:00:00 +0200 | [diff] [blame] | 273 | }; |
| 274 | |
Javier Martinez Canillas | e0efaaf | 2013-09-20 17:42:19 +0200 | [diff] [blame] | 275 | &uart0 { |
| 276 | pinctrl-names = "default"; |
| 277 | pinctrl-0 = <&uart0_pins>; |
| 278 | |
| 279 | status = "okay"; |
| 280 | }; |
| 281 | |
| 282 | &i2c0 { |
| 283 | pinctrl-names = "default"; |
| 284 | pinctrl-0 = <&i2c0_pins>; |
| 285 | |
| 286 | status = "okay"; |
| 287 | clock-frequency = <400000>; |
| 288 | |
| 289 | tps: tps@2d { |
| 290 | reg = <0x2d>; |
| 291 | }; |
| 292 | |
| 293 | lis331dlh: lis331dlh@18 { |
| 294 | compatible = "st,lis331dlh", "st,lis3lv02d"; |
| 295 | reg = <0x18>; |
| 296 | Vdd-supply = <&lis3_reg>; |
| 297 | Vdd_IO-supply = <&lis3_reg>; |
| 298 | |
| 299 | st,click-single-x; |
| 300 | st,click-single-y; |
| 301 | st,click-single-z; |
| 302 | st,click-thresh-x = <10>; |
| 303 | st,click-thresh-y = <10>; |
| 304 | st,click-thresh-z = <10>; |
| 305 | st,irq1-click; |
| 306 | st,irq2-click; |
| 307 | st,wakeup-x-lo; |
| 308 | st,wakeup-x-hi; |
| 309 | st,wakeup-y-lo; |
| 310 | st,wakeup-y-hi; |
| 311 | st,wakeup-z-lo; |
| 312 | st,wakeup-z-hi; |
| 313 | st,min-limit-x = <120>; |
| 314 | st,min-limit-y = <120>; |
| 315 | st,min-limit-z = <140>; |
| 316 | st,max-limit-x = <550>; |
| 317 | st,max-limit-y = <550>; |
| 318 | st,max-limit-z = <750>; |
| 319 | }; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 320 | |
| 321 | tlv320aic3106: tlv320aic3106@1b { |
| 322 | compatible = "ti,tlv320aic3106"; |
| 323 | reg = <0x1b>; |
| 324 | status = "okay"; |
| 325 | |
| 326 | /* Regulators */ |
| 327 | AVDD-supply = <&vaux2_reg>; |
| 328 | IOVDD-supply = <&vaux2_reg>; |
| 329 | DRVDD-supply = <&vaux2_reg>; |
| 330 | DVDD-supply = <&vbat>; |
| 331 | }; |
Javier Martinez Canillas | e0efaaf | 2013-09-20 17:42:19 +0200 | [diff] [blame] | 332 | }; |
| 333 | |
| 334 | &usb { |
| 335 | status = "okay"; |
| 336 | |
| 337 | control@44e10000 { |
| 338 | status = "okay"; |
| 339 | }; |
| 340 | |
| 341 | usb-phy@47401300 { |
| 342 | status = "okay"; |
| 343 | }; |
| 344 | |
| 345 | usb@47401000 { |
| 346 | status = "okay"; |
| 347 | }; |
| 348 | }; |
| 349 | |
| 350 | &epwmss2 { |
| 351 | status = "okay"; |
| 352 | |
| 353 | ecap2: ecap@48304100 { |
| 354 | status = "okay"; |
| 355 | pinctrl-names = "default"; |
| 356 | pinctrl-0 = <&ecap2_pins>; |
| 357 | }; |
| 358 | }; |
| 359 | |
Florian Vaussard | eb33ef66 | 2013-06-03 16:12:22 +0200 | [diff] [blame] | 360 | #include "tps65910.dtsi" |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 361 | |
| 362 | &tps { |
| 363 | vcc1-supply = <&vbat>; |
| 364 | vcc2-supply = <&vbat>; |
| 365 | vcc3-supply = <&vbat>; |
| 366 | vcc4-supply = <&vbat>; |
| 367 | vcc5-supply = <&vbat>; |
| 368 | vcc6-supply = <&vbat>; |
| 369 | vcc7-supply = <&vbat>; |
| 370 | vccio-supply = <&vbat>; |
| 371 | |
| 372 | regulators { |
| 373 | vrtc_reg: regulator@0 { |
| 374 | regulator-always-on; |
| 375 | }; |
| 376 | |
| 377 | vio_reg: regulator@1 { |
| 378 | regulator-always-on; |
| 379 | }; |
| 380 | |
| 381 | vdd1_reg: regulator@2 { |
| 382 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ |
| 383 | regulator-name = "vdd_mpu"; |
| 384 | regulator-min-microvolt = <912500>; |
| 385 | regulator-max-microvolt = <1312500>; |
| 386 | regulator-boot-on; |
| 387 | regulator-always-on; |
| 388 | }; |
| 389 | |
| 390 | vdd2_reg: regulator@3 { |
| 391 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ |
| 392 | regulator-name = "vdd_core"; |
| 393 | regulator-min-microvolt = <912500>; |
| 394 | regulator-max-microvolt = <1150000>; |
| 395 | regulator-boot-on; |
| 396 | regulator-always-on; |
| 397 | }; |
| 398 | |
| 399 | vdd3_reg: regulator@4 { |
| 400 | regulator-always-on; |
| 401 | }; |
| 402 | |
| 403 | vdig1_reg: regulator@5 { |
| 404 | regulator-always-on; |
| 405 | }; |
| 406 | |
| 407 | vdig2_reg: regulator@6 { |
| 408 | regulator-always-on; |
| 409 | }; |
| 410 | |
| 411 | vpll_reg: regulator@7 { |
| 412 | regulator-always-on; |
| 413 | }; |
| 414 | |
| 415 | vdac_reg: regulator@8 { |
| 416 | regulator-always-on; |
| 417 | }; |
| 418 | |
| 419 | vaux1_reg: regulator@9 { |
| 420 | regulator-always-on; |
| 421 | }; |
| 422 | |
| 423 | vaux2_reg: regulator@10 { |
| 424 | regulator-always-on; |
| 425 | }; |
| 426 | |
| 427 | vaux33_reg: regulator@11 { |
| 428 | regulator-always-on; |
| 429 | }; |
| 430 | |
| 431 | vmmc_reg: regulator@12 { |
Matt Porter | 55b4452 | 2013-09-10 14:24:39 -0500 | [diff] [blame] | 432 | regulator-min-microvolt = <1800000>; |
| 433 | regulator-max-microvolt = <3300000>; |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 434 | regulator-always-on; |
| 435 | }; |
| 436 | }; |
| 437 | }; |
Mugunthan V N | 94a924c | 2013-06-07 17:02:53 +0530 | [diff] [blame] | 438 | |
| 439 | &mac { |
| 440 | pinctrl-names = "default", "sleep"; |
| 441 | pinctrl-0 = <&cpsw_default>; |
| 442 | pinctrl-1 = <&cpsw_sleep>; |
| 443 | }; |
| 444 | |
| 445 | &davinci_mdio { |
| 446 | pinctrl-names = "default", "sleep"; |
| 447 | pinctrl-0 = <&davinci_mdio_default>; |
| 448 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 449 | }; |
Linus Torvalds | 496322b | 2013-07-09 18:24:39 -0700 | [diff] [blame] | 450 | |
Mugunthan V N | f6655d6 | 2013-06-03 20:10:09 +0000 | [diff] [blame] | 451 | &cpsw_emac0 { |
| 452 | phy_id = <&davinci_mdio>, <0>; |
Mugunthan V N | 6d75afe | 2013-06-03 20:10:11 +0000 | [diff] [blame] | 453 | phy-mode = "rgmii-txid"; |
Mugunthan V N | f6655d6 | 2013-06-03 20:10:09 +0000 | [diff] [blame] | 454 | }; |
| 455 | |
| 456 | &cpsw_emac1 { |
| 457 | phy_id = <&davinci_mdio>, <1>; |
Mugunthan V N | 6d75afe | 2013-06-03 20:10:11 +0000 | [diff] [blame] | 458 | phy-mode = "rgmii-txid"; |
Mugunthan V N | f6655d6 | 2013-06-03 20:10:09 +0000 | [diff] [blame] | 459 | }; |
Matt Porter | 55b4452 | 2013-09-10 14:24:39 -0500 | [diff] [blame] | 460 | |
| 461 | &mmc1 { |
| 462 | status = "okay"; |
| 463 | vmmc-supply = <&vmmc_reg>; |
Balaji T K | 0d8d40f | 2013-09-27 17:05:10 +0530 | [diff] [blame] | 464 | bus-width = <4>; |
Peter Ujfalusi | 29ea5ef | 2013-12-23 11:28:35 +0200 | [diff] [blame] | 465 | pinctrl-names = "default"; |
| 466 | pinctrl-0 = <&mmc1_pins>; |
| 467 | cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; |
Matt Porter | 55b4452 | 2013-09-10 14:24:39 -0500 | [diff] [blame] | 468 | }; |
Mark A. Greer | f8302e1 | 2013-08-23 14:12:35 -0700 | [diff] [blame] | 469 | |
| 470 | &sham { |
| 471 | status = "okay"; |
| 472 | }; |
Mark A. Greer | 99919e5e | 2013-08-23 14:12:36 -0700 | [diff] [blame] | 473 | |
| 474 | &aes { |
| 475 | status = "okay"; |
| 476 | }; |
Rajendra Nayak | 6046adb | 2013-10-09 15:42:01 +0530 | [diff] [blame] | 477 | |
| 478 | &gpio0 { |
| 479 | ti,no-reset-on-init; |
| 480 | }; |
Peter Ujfalusi | b452985 | 2013-10-20 20:04:11 +0300 | [diff] [blame] | 481 | |
| 482 | &mcasp1 { |
| 483 | pinctrl-names = "default"; |
| 484 | pinctrl-0 = <&mcasp1_pins>; |
| 485 | |
| 486 | status = "okay"; |
| 487 | |
| 488 | op-mode = <0>; /* MCASP_IIS_MODE */ |
| 489 | tdm-slots = <2>; |
| 490 | /* 4 serializers */ |
| 491 | serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ |
| 492 | 0 0 1 2 |
| 493 | >; |
| 494 | tx-num-evt = <1>; |
| 495 | rx-num-evt = <1>; |
| 496 | }; |
Linus Torvalds | 4937e2a | 2013-11-15 16:43:53 -0800 | [diff] [blame] | 497 | |
Felipe Balbi | 2c027b7 | 2013-11-10 23:58:31 -0800 | [diff] [blame] | 498 | &tscadc { |
| 499 | status = "okay"; |
| 500 | tsc { |
| 501 | ti,wires = <4>; |
| 502 | ti,x-plate-resistance = <200>; |
| 503 | ti,coordinate-readouts = <5>; |
| 504 | ti,wire-config = <0x00 0x11 0x22 0x33>; |
| 505 | }; |
| 506 | }; |