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Bryan Wu1394f032007-05-06 14:50:22 -07001/*
2 * File: arch/blackfin/mach-bf533/boards/cm_bf561.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
Simon Arlottd2d50aa2007-06-11 15:31:30 +08004 * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
Bryan Wu1394f032007-05-06 14:50:22 -07005 *
6 * Created: 2006
7 * Description: Board description file
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#include <linux/device.h>
31#include <linux/platform_device.h>
32#include <linux/mtd/mtd.h>
33#include <linux/mtd/partitions.h>
34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h>
36#include <linux/usb_isp1362.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080037#include <linux/irq.h>
Bryan Wu1394f032007-05-06 14:50:22 -070038#include <asm/bfin5xx_spi.h>
39
40/*
41 * Name the Board for the /proc/cpuinfo
42 */
43char *bfin_board_name = "Bluetechnix CM BF561";
44
45#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Simon Arlottd2d50aa2007-06-11 15:31:30 +080046/* all SPI peripherals info goes here */
Bryan Wu1394f032007-05-06 14:50:22 -070047
48#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
49static struct mtd_partition bfin_spi_flash_partitions[] = {
50 {
51 .name = "bootloader",
52 .size = 0x00020000,
53 .offset = 0,
54 .mask_flags = MTD_CAP_ROM
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080055 }, {
Bryan Wu1394f032007-05-06 14:50:22 -070056 .name = "kernel",
57 .size = 0xe0000,
58 .offset = 0x20000
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080059 }, {
Bryan Wu1394f032007-05-06 14:50:22 -070060 .name = "file system",
61 .size = 0x700000,
62 .offset = 0x00100000,
63 }
64};
65
66static struct flash_platform_data bfin_spi_flash_data = {
67 .name = "m25p80",
68 .parts = bfin_spi_flash_partitions,
69 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
70 .type = "m25p64",
71};
72
73/* SPI flash chip (m25p64) */
74static struct bfin5xx_spi_chip spi_flash_chip_info = {
75 .enable_dma = 0, /* use dma transfer with this chip*/
76 .bits_per_word = 8,
77};
78#endif
79
80#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
81/* SPI ADC chip */
82static struct bfin5xx_spi_chip spi_adc_chip_info = {
83 .enable_dma = 1, /* use dma transfer with this chip*/
84 .bits_per_word = 16,
85};
86#endif
87
88#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
89static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
90 .enable_dma = 0,
91 .bits_per_word = 16,
92};
93#endif
94
95#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
96static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
97 .enable_dma = 0,
98 .bits_per_word = 16,
99};
100#endif
101
102#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
103static struct bfin5xx_spi_chip spi_mmc_chip_info = {
104 .enable_dma = 1,
105 .bits_per_word = 8,
106};
107#endif
108
109static struct spi_board_info bfin_spi_board_info[] __initdata = {
110#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
111 {
112 /* the modalias must be the same as spi device driver name */
113 .modalias = "m25p80", /* Name of spi_driver for this device */
114 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
115 .bus_num = 1, /* Framework bus number */
116 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
117 .platform_data = &bfin_spi_flash_data,
118 .controller_data = &spi_flash_chip_info,
119 .mode = SPI_MODE_3,
120 },
121#endif
122
123#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
124 {
125 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
126 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
127 .bus_num = 1, /* Framework bus number */
128 .chip_select = 1, /* Framework chip select. */
129 .platform_data = NULL, /* No spi_driver specific config */
130 .controller_data = &spi_adc_chip_info,
131 },
132#endif
133
134#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
135 {
136 .modalias = "ad1836-spi",
137 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
138 .bus_num = 1,
139 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
140 .controller_data = &ad1836_spi_chip_info,
141 },
142#endif
143#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
144 {
145 .modalias = "ad9960-spi",
146 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
147 .bus_num = 1,
148 .chip_select = 1,
149 .controller_data = &ad9960_spi_chip_info,
150 },
151#endif
152#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
153 {
154 .modalias = "spi_mmc",
155 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
156 .bus_num = 1,
157 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
158 .platform_data = NULL,
159 .controller_data = &spi_mmc_chip_info,
160 .mode = SPI_MODE_3,
161 },
162#endif
163};
164
165/* SPI controller data */
166static struct bfin5xx_spi_master spi_bfin_master_info = {
167 .num_chipselect = 8,
168 .enable_dma = 1, /* master has the ability to do dma transfer */
169};
170
171static struct platform_device spi_bfin_master_device = {
172 .name = "bfin-spi-master",
173 .id = 1, /* Bus number */
174 .dev = {
175 .platform_data = &spi_bfin_master_info, /* Passed to driver */
176 },
177};
178#endif /* spi master and devices */
179
180
181#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
182
183static struct resource smc91x_resources[] = {
184 {
185 .name = "smc91x-regs",
186 .start = 0x28000300,
187 .end = 0x28000300 + 16,
188 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800189 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700190 .start = IRQ_PF0,
191 .end = IRQ_PF0,
192 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
193 },
194};
195static struct platform_device smc91x_device = {
196 .name = "smc91x",
197 .id = 0,
198 .num_resources = ARRAY_SIZE(smc91x_resources),
199 .resource = smc91x_resources,
200};
201#endif
202
203#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
204static struct resource isp1362_hcd_resources[] = {
205 {
206 .start = 0x24008000,
207 .end = 0x24008000,
208 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800209 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700210 .start = 0x24008004,
211 .end = 0x24008004,
212 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800213 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700214 .start = IRQ_PF47,
215 .end = IRQ_PF47,
216 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
217 },
218};
219
220static struct isp1362_platform_data isp1362_priv = {
221 .sel15Kres = 1,
222 .clknotstop = 0,
223 .oc_enable = 0,
224 .int_act_high = 0,
225 .int_edge_triggered = 0,
226 .remote_wakeup_connected = 0,
227 .no_power_switching = 1,
228 .power_switching_mode = 0,
229};
230
231static struct platform_device isp1362_hcd_device = {
232 .name = "isp1362-hcd",
233 .id = 0,
234 .dev = {
235 .platform_data = &isp1362_priv,
236 },
237 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
238 .resource = isp1362_hcd_resources,
239};
240#endif
241
242#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
243static struct resource bfin_uart_resources[] = {
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800244 {
245 .start = 0xFFC00400,
246 .end = 0xFFC004FF,
247 .flags = IORESOURCE_MEM,
248 },
Bryan Wu1394f032007-05-06 14:50:22 -0700249};
250
251static struct platform_device bfin_uart_device = {
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800252 .name = "bfin-uart",
253 .id = 1,
254 .num_resources = ARRAY_SIZE(bfin_uart_resources),
255 .resource = bfin_uart_resources,
Bryan Wu1394f032007-05-06 14:50:22 -0700256};
257#endif
258
259static struct platform_device *cm_bf561_devices[] __initdata = {
260
261#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800262 &bfin_uart_device,
Bryan Wu1394f032007-05-06 14:50:22 -0700263#endif
264
265#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
266 &isp1362_hcd_device,
267#endif
268
269#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
270 &smc91x_device,
271#endif
272
273#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
274 &spi_bfin_master_device,
275#endif
276
277};
278
279static int __init cm_bf561_init(void)
280{
281 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
282 platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
283#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
284 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
285#endif
286 return 0;
287}
288
289arch_initcall(cm_bf561_init);