blob: df613e88fd2c19622aee24020d215c4add0341e5 [file] [log] [blame]
Fabio Estevam1f31e252018-05-14 14:58:47 -03001// SPDX-License-Identifier: GPL-2.0+
2//
3// Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
4// Copyright 2014 Freescale Semiconductor, Inc.
Fabio Estevamebc37462014-03-25 14:47:41 -03005
6/dts-v1/;
7#include "imx35.dtsi"
8
9/ {
10 model = "Freescale i.MX35 Product Development Kit";
11 compatible = "fsl,imx35-pdk", "fsl,imx35";
12
Marco Franchiad00e082018-01-24 11:22:14 -020013 memory@80000000 {
Fabio Estevamc6f0b872014-05-12 22:04:24 -030014 reg = <0x80000000 0x8000000>,
15 <0x90000000 0x8000000>;
Fabio Estevamebc37462014-03-25 14:47:41 -030016 };
17};
18
19&esdhc1 {
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_esdhc1>;
22 status = "okay";
23};
24
25&iomuxc {
26 imx35-pdk {
27 pinctrl_esdhc1: esdhc1grp {
28 fsl,pins = <
29 MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000
30 MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000
31 MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000
32 MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000
33 MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000
34 MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000
35 >;
36 };
37
38 pinctrl_uart1: uart1grp {
39 fsl,pins = <
40 MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5
41 MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5
42 MX35_PAD_CTS1__UART1_CTS 0x1c5
43 MX35_PAD_RTS1__UART1_RTS 0x1c5
44 >;
45 };
46 };
47};
48
49&nfc {
50 nand-bus-width = <16>;
51 nand-ecc-mode = "hw";
52 nand-on-flash-bbt;
53 status = "okay";
54};
55
56&uart1 {
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_uart1>;
Geert Uytterhoeven2e7c4162016-05-31 16:31:51 +020059 uart-has-rtscts;
Fabio Estevamebc37462014-03-25 14:47:41 -030060 status = "okay";
61};