blob: d565c44cfc93e32592f451450be5ef7cc29f5c93 [file] [log] [blame]
Thomas Gleixnerc942fdd2019-05-27 08:55:06 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Peter De Schrijver22b8b852012-01-26 18:22:03 +02002/*
3 * arch/arm/mach-tegra/cpuidle.c
4 *
5 * CPU idle driver for Tegra CPUs
6 *
7 * Copyright (c) 2010-2012, NVIDIA Corporation.
8 * Copyright (c) 2011 Google, Inc.
9 * Author: Colin Cross <ccross@android.com>
10 * Gary King <gking@nvidia.com>
11 *
12 * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>
Peter De Schrijver22b8b852012-01-26 18:22:03 +020013 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
Peter De Schrijver22b8b852012-01-26 18:22:03 +020017
Thierry Reding304664e2014-07-11 09:52:41 +020018#include <soc/tegra/fuse.h>
19
Joseph Lo0b25e252012-10-31 17:41:15 +080020#include "cpuidle.h"
Peter De Schrijver22b8b852012-01-26 18:22:03 +020021
Joseph Loe22dc2b2013-06-04 18:47:32 +080022void __init tegra_cpuidle_init(void)
Peter De Schrijver22b8b852012-01-26 18:22:03 +020023{
Thierry Reding304664e2014-07-11 09:52:41 +020024 switch (tegra_get_chip_id()) {
Joseph Lo0b25e252012-10-31 17:41:15 +080025 case TEGRA20:
Joseph Lob046a652013-06-04 18:47:34 +080026 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
27 tegra20_cpuidle_init();
Joseph Lo0b25e252012-10-31 17:41:15 +080028 break;
29 case TEGRA30:
Joseph Lob046a652013-06-04 18:47:34 +080030 if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC))
31 tegra30_cpuidle_init();
Joseph Lo0b25e252012-10-31 17:41:15 +080032 break;
Joseph Lo51dc5252013-01-21 17:49:06 +080033 case TEGRA114:
Joseph Lo24036fd2013-10-11 17:57:32 +080034 case TEGRA124:
35 if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) ||
36 IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC))
Joseph Lob046a652013-06-04 18:47:34 +080037 tegra114_cpuidle_init();
Joseph Lo0b25e252012-10-31 17:41:15 +080038 break;
Peter De Schrijver22b8b852012-01-26 18:22:03 +020039 }
Peter De Schrijver22b8b852012-01-26 18:22:03 +020040}
Stephen Warrenb4f17372013-05-06 14:19:19 -060041
42void tegra_cpuidle_pcie_irqs_in_use(void)
43{
Thierry Reding304664e2014-07-11 09:52:41 +020044 switch (tegra_get_chip_id()) {
Stephen Warrenb4f17372013-05-06 14:19:19 -060045 case TEGRA20:
46 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
47 tegra20_cpuidle_pcie_irqs_in_use();
48 break;
49 }
50}