Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 1 | Marvell Distributed Switch Architecture Device Tree Bindings |
| 2 | ------------------------------------------------------------ |
| 3 | |
| 4 | Required properties: |
| 5 | - compatible : Should be "marvell,dsa" |
| 6 | - #address-cells : Must be 2, first cell is the address on the MDIO bus |
| 7 | and second cell is the address in the switch tree. |
| 8 | Second cell is used only when cascading/chaining. |
| 9 | - #size-cells : Must be 0 |
| 10 | - dsa,ethernet : Should be a phandle to a valid Ethernet device node |
| 11 | - dsa,mii-bus : Should be a phandle to a valid MDIO bus device node |
| 12 | |
Guenter Roeck | 0674572 | 2014-10-29 10:45:02 -0700 | [diff] [blame] | 13 | Optional properties: |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 14 | - interrupts : property with a value describing the switch |
| 15 | interrupt number (not supported by the driver) |
| 16 | |
| 17 | A DSA node can contain multiple switch chips which are therefore child nodes of |
| 18 | the parent DSA node. The maximum number of allowed child nodes is 4 |
| 19 | (DSA_MAX_SWITCHES). |
| 20 | Each of these switch child nodes should have the following required properties: |
| 21 | |
Pavel Nakonechny | 3030381 | 2015-04-05 00:46:21 +0300 | [diff] [blame] | 22 | - reg : Contains two fields. The first one describes the |
| 23 | address on the MII bus. The second is the switch |
| 24 | number that must be unique in cascaded configurations |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 25 | - #address-cells : Must be 1 |
| 26 | - #size-cells : Must be 0 |
| 27 | |
Guenter Roeck | 0674572 | 2014-10-29 10:45:02 -0700 | [diff] [blame] | 28 | A switch child node has the following optional property: |
| 29 | |
| 30 | - eeprom-length : Set to the length of an EEPROM connected to the |
| 31 | switch. Must be set if the switch can not detect |
| 32 | the presence and/or size of a connected EEPROM, |
| 33 | otherwise optional. |
| 34 | |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 35 | A switch may have multiple "port" children nodes |
| 36 | |
| 37 | Each port children node must have the following mandatory properties: |
| 38 | - reg : Describes the port address in the switch |
| 39 | - label : Describes the label associated with this port, special |
| 40 | labels are "cpu" to indicate a CPU port and "dsa" to |
| 41 | indicate an uplink/downlink port. |
| 42 | |
| 43 | Note that a port labelled "dsa" will imply checking for the uplink phandle |
| 44 | described below. |
| 45 | |
| 46 | Optionnal property: |
Andrew Lunn | 1e72e6f | 2015-08-17 23:52:50 +0200 | [diff] [blame^] | 47 | - link : Should be a list of phandles to another switch's DSA port. |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 48 | This property is only used when switches are being |
Andrew Lunn | 1e72e6f | 2015-08-17 23:52:50 +0200 | [diff] [blame^] | 49 | chained/cascaded together. This port is used as outgoing port |
| 50 | towards the phandle port, which can be more than one hop away. |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 51 | |
Florian Fainelli | 51f2659 | 2014-08-27 17:04:57 -0700 | [diff] [blame] | 52 | - phy-handle : Phandle to a PHY on an external MDIO bus, not the |
| 53 | switch internal one. See |
| 54 | Documentation/devicetree/bindings/net/ethernet.txt |
| 55 | for details. |
| 56 | |
| 57 | - phy-mode : String representing the connection to the designated |
| 58 | PHY node specified by the 'phy-handle' property. See |
| 59 | Documentation/devicetree/bindings/net/ethernet.txt |
| 60 | for details. |
| 61 | |
Andrew Lunn | 6bc6d0a | 2015-08-08 17:09:14 +0200 | [diff] [blame] | 62 | - mii-bus : Should be a phandle to a valid MDIO bus device node. |
| 63 | This mii-bus will be used in preference to the |
| 64 | global dsa,mii-bus defined above, for this switch. |
| 65 | |
Florian Fainelli | 51f2659 | 2014-08-27 17:04:57 -0700 | [diff] [blame] | 66 | Optional subnodes: |
| 67 | - fixed-link : Fixed-link subnode describing a link to a non-MDIO |
| 68 | managed entity. See |
| 69 | Documentation/devicetree/bindings/net/fixed-link.txt |
| 70 | for details. |
| 71 | |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 72 | Example: |
| 73 | |
| 74 | dsa@0 { |
| 75 | compatible = "marvell,dsa"; |
Florian Fainelli | 4c64f1f | 2013-03-25 05:03:38 +0000 | [diff] [blame] | 76 | #address-cells = <2>; |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 77 | #size-cells = <0>; |
| 78 | |
| 79 | interrupts = <10>; |
| 80 | dsa,ethernet = <ðernet0>; |
| 81 | dsa,mii-bus = <&mii_bus0>; |
| 82 | |
| 83 | switch@0 { |
| 84 | #address-cells = <1>; |
| 85 | #size-cells = <0>; |
| 86 | reg = <16 0>; /* MDIO address 16, switch 0 in tree */ |
| 87 | |
| 88 | port@0 { |
| 89 | reg = <0>; |
| 90 | label = "lan1"; |
Florian Fainelli | 51f2659 | 2014-08-27 17:04:57 -0700 | [diff] [blame] | 91 | phy-handle = <&phy0>; |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 92 | }; |
| 93 | |
| 94 | port@1 { |
| 95 | reg = <1>; |
| 96 | label = "lan2"; |
| 97 | }; |
| 98 | |
| 99 | port@5 { |
| 100 | reg = <5>; |
| 101 | label = "cpu"; |
| 102 | }; |
| 103 | |
Andrew Lunn | 1e72e6f | 2015-08-17 23:52:50 +0200 | [diff] [blame^] | 104 | switch0port6: port@6 { |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 105 | reg = <6>; |
| 106 | label = "dsa"; |
Andrew Lunn | 1e72e6f | 2015-08-17 23:52:50 +0200 | [diff] [blame^] | 107 | link = <&switch1port0 |
| 108 | &switch2port0>; |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 109 | }; |
| 110 | }; |
| 111 | |
| 112 | switch@1 { |
| 113 | #address-cells = <1>; |
| 114 | #size-cells = <0>; |
| 115 | reg = <17 1>; /* MDIO address 17, switch 1 in tree */ |
Andrew Lunn | 6bc6d0a | 2015-08-08 17:09:14 +0200 | [diff] [blame] | 116 | mii-bus = <&mii_bus1>; |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 117 | |
Andrew Lunn | 1e72e6f | 2015-08-17 23:52:50 +0200 | [diff] [blame^] | 118 | switch1port0: port@0 { |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 119 | reg = <0>; |
| 120 | label = "dsa"; |
Andrew Lunn | 1e72e6f | 2015-08-17 23:52:50 +0200 | [diff] [blame^] | 121 | link = <&switch0port6>; |
| 122 | }; |
| 123 | switch1port1: port@1 { |
| 124 | reg = <1>; |
| 125 | label = "dsa"; |
| 126 | link = <&switch2port1>; |
| 127 | }; |
| 128 | }; |
| 129 | |
| 130 | switch@2 { |
| 131 | #address-cells = <1>; |
| 132 | #size-cells = <0>; |
| 133 | reg = <18 2>; /* MDIO address 18, switch 2 in tree */ |
| 134 | mii-bus = <&mii_bus1>; |
| 135 | |
| 136 | switch2port0: port@0 { |
| 137 | reg = <0>; |
| 138 | label = "dsa"; |
| 139 | link = <&switch1port1 |
| 140 | &switch0port6>; |
Florian Fainelli | 5e95329b | 2013-03-22 10:50:50 +0000 | [diff] [blame] | 141 | }; |
| 142 | }; |
| 143 | }; |