Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 1 | Kernel driver f71805f |
| 2 | ===================== |
| 3 | |
| 4 | Supported chips: |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 5 | |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 6 | * Fintek F71805F/FG |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 7 | |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 8 | Prefix: 'f71805f' |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 9 | |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 10 | Addresses scanned: none, address read from Super I/O config space |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 11 | |
Phil Endecott | aba5073 | 2007-06-29 09:19:14 +0200 | [diff] [blame] | 12 | Datasheet: Available from the Fintek website |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 13 | |
Jean Delvare | 9cab021 | 2007-07-15 10:36:06 +0200 | [diff] [blame] | 14 | * Fintek F71806F/FG |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 15 | |
Jean Delvare | 9cab021 | 2007-07-15 10:36:06 +0200 | [diff] [blame] | 16 | Prefix: 'f71872f' |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 17 | |
Jean Delvare | 9cab021 | 2007-07-15 10:36:06 +0200 | [diff] [blame] | 18 | Addresses scanned: none, address read from Super I/O config space |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 19 | |
Jean Delvare | 9cab021 | 2007-07-15 10:36:06 +0200 | [diff] [blame] | 20 | Datasheet: Available from the Fintek website |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 21 | |
Jean Delvare | 51c997d | 2006-12-12 18:18:29 +0100 | [diff] [blame] | 22 | * Fintek F71872F/FG |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 23 | |
Jean Delvare | 51c997d | 2006-12-12 18:18:29 +0100 | [diff] [blame] | 24 | Prefix: 'f71872f' |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 25 | |
Jean Delvare | 51c997d | 2006-12-12 18:18:29 +0100 | [diff] [blame] | 26 | Addresses scanned: none, address read from Super I/O config space |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 27 | |
Phil Endecott | aba5073 | 2007-06-29 09:19:14 +0200 | [diff] [blame] | 28 | Datasheet: Available from the Fintek website |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 29 | |
Jean Delvare | 7c81c60f | 2014-01-29 20:40:08 +0100 | [diff] [blame] | 30 | Author: Jean Delvare <jdelvare@suse.de> |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 31 | |
| 32 | Thanks to Denis Kieft from Barracuda Networks for the donation of a |
| 33 | test system (custom Jetway K8M8MS motherboard, with CPU and RAM) and |
| 34 | for providing initial documentation. |
| 35 | |
Jean Delvare | e9cea64 | 2006-12-12 18:18:27 +0100 | [diff] [blame] | 36 | Thanks to Kris Chen and Aaron Huang from Fintek for answering technical |
| 37 | questions and providing additional documentation. |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 38 | |
| 39 | Thanks to Chris Lin from Jetway for providing wiring schematics and |
Jean Delvare | 15fe25c | 2006-10-08 21:59:54 +0200 | [diff] [blame] | 40 | answering technical questions. |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 41 | |
| 42 | |
| 43 | Description |
| 44 | ----------- |
| 45 | |
| 46 | The Fintek F71805F/FG Super I/O chip includes complete hardware monitoring |
| 47 | capabilities. It can monitor up to 9 voltages (counting its own power |
| 48 | source), 3 fans and 3 temperature sensors. |
| 49 | |
| 50 | This chip also has fan controlling features, using either DC or PWM, in |
Jean Delvare | e9cea64 | 2006-12-12 18:18:27 +0100 | [diff] [blame] | 51 | three different modes (one manual, two automatic). |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 52 | |
Jean Delvare | 51c997d | 2006-12-12 18:18:29 +0100 | [diff] [blame] | 53 | The Fintek F71872F/FG Super I/O chip is almost the same, with two |
| 54 | additional internal voltages monitored (VSB and battery). It also features |
| 55 | 6 VID inputs. The VID inputs are not yet supported by this driver. |
| 56 | |
Jean Delvare | 9cab021 | 2007-07-15 10:36:06 +0200 | [diff] [blame] | 57 | The Fintek F71806F/FG Super-I/O chip is essentially the same as the |
| 58 | F71872F/FG, and is undistinguishable therefrom. |
| 59 | |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 60 | The driver assumes that no more than one chip is present, which seems |
| 61 | reasonable. |
| 62 | |
| 63 | |
| 64 | Voltage Monitoring |
| 65 | ------------------ |
| 66 | |
| 67 | Voltages are sampled by an 8-bit ADC with a LSB of 8 mV. The supported |
| 68 | range is thus from 0 to 2.040 V. Voltage values outside of this range |
| 69 | need external resistors. An exception is in0, which is used to monitor |
| 70 | the chip's own power source (+3.3V), and is divided internally by a |
Jean Delvare | 51c997d | 2006-12-12 18:18:29 +0100 | [diff] [blame] | 71 | factor 2. For the F71872F/FG, in9 (VSB) and in10 (battery) are also |
| 72 | divided internally by a factor 2. |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 73 | |
| 74 | The two LSB of the voltage limit registers are not used (always 0), so |
| 75 | you can only set the limits in steps of 32 mV (before scaling). |
| 76 | |
| 77 | The wirings and resistor values suggested by Fintek are as follow: |
| 78 | |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 79 | ======= ======= =========== ==== ======= ============ ============== |
| 80 | in pin expected |
| 81 | name use R1 R2 divider raw val. |
| 82 | ======= ======= =========== ==== ======= ============ ============== |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 83 | in0 VCC VCC3.3V int. int. 2.00 1.65 V |
| 84 | in1 VIN1 VTT1.2V 10K - 1.00 1.20 V |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 85 | in2 VIN2 VRAM 100K 100K 2.00 ~1.25 V [1]_ |
| 86 | in3 VIN3 VCHIPSET 47K 100K 1.47 2.24 V [2]_ |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 87 | in4 VIN4 VCC5V 200K 47K 5.25 0.95 V |
| 88 | in5 VIN5 +12V 200K 20K 11.00 1.05 V |
| 89 | in6 VIN6 VCC1.5V 10K - 1.00 1.50 V |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 90 | in7 VIN7 VCORE 10K - 1.00 ~1.40 V [1]_ |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 91 | in8 VIN8 VSB5V 200K 47K 1.00 0.95 V |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 92 | in10 VSB VSB3.3V int. int. 2.00 1.65 V [3]_ |
| 93 | in9 VBAT VBATTERY int. int. 2.00 1.50 V [3]_ |
| 94 | ======= ======= =========== ==== ======= ============ ============== |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 95 | |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 96 | .. [1] Depends on your hardware setup. |
| 97 | .. [2] Obviously not correct, swapping R1 and R2 would make more sense. |
| 98 | .. [3] F71872F/FG only. |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 99 | |
| 100 | These values can be used as hints at best, as motherboard manufacturers |
| 101 | are free to use a completely different setup. As a matter of fact, the |
| 102 | Jetway K8M8MS uses a significantly different setup. You will have to |
| 103 | find out documentation about your own motherboard, and edit sensors.conf |
| 104 | accordingly. |
| 105 | |
| 106 | Each voltage measured has associated low and high limits, each of which |
| 107 | triggers an alarm when crossed. |
| 108 | |
| 109 | |
| 110 | Fan Monitoring |
| 111 | -------------- |
| 112 | |
| 113 | Fan rotation speeds are reported as 12-bit values from a gated clock |
| 114 | signal. Speeds down to 366 RPM can be measured. There is no theoretical |
| 115 | high limit, but values over 6000 RPM seem to cause problem. The effective |
| 116 | resolution is much lower than you would expect, the step between different |
| 117 | register values being 10 rather than 1. |
| 118 | |
| 119 | The chip assumes 2 pulse-per-revolution fans. |
| 120 | |
| 121 | An alarm is triggered if the rotation speed drops below a programmable |
| 122 | limit or is too low to be measured. |
| 123 | |
| 124 | |
| 125 | Temperature Monitoring |
| 126 | ---------------------- |
| 127 | |
| 128 | Temperatures are reported in degrees Celsius. Each temperature measured |
| 129 | has a high limit, those crossing triggers an alarm. There is an associated |
| 130 | hysteresis value, below which the temperature has to drop before the |
| 131 | alarm is cleared. |
| 132 | |
| 133 | All temperature channels are external, there is no embedded temperature |
| 134 | sensor. Each channel can be used for connecting either a thermal diode |
| 135 | or a thermistor. The driver reports the currently selected mode, but |
| 136 | doesn't allow changing it. In theory, the BIOS should have configured |
| 137 | everything properly. |
Jean Delvare | e9cea64 | 2006-12-12 18:18:27 +0100 | [diff] [blame] | 138 | |
| 139 | |
| 140 | Fan Control |
| 141 | ----------- |
| 142 | |
| 143 | Both PWM (pulse-width modulation) and DC fan speed control methods are |
| 144 | supported. The right one to use depends on external circuitry on the |
| 145 | motherboard, so the driver assumes that the BIOS set the method |
| 146 | properly. The driver will report the method, but won't let you change |
| 147 | it. |
| 148 | |
| 149 | When the PWM method is used, you can select the operating frequency, |
| 150 | from 187.5 kHz (default) to 31 Hz. The best frequency depends on the |
| 151 | fan model. As a rule of thumb, lower frequencies seem to give better |
Phil Endecott | aba5073 | 2007-06-29 09:19:14 +0200 | [diff] [blame] | 152 | control, but may generate annoying high-pitch noise. So a frequency just |
| 153 | above the audible range, such as 25 kHz, may be a good choice; if this |
| 154 | doesn't give you good linear control, try reducing it. Fintek recommends |
Jean Delvare | e9cea64 | 2006-12-12 18:18:27 +0100 | [diff] [blame] | 155 | not going below 1 kHz, as the fan tachometers get confused by lower |
| 156 | frequencies as well. |
| 157 | |
| 158 | When the DC method is used, Fintek recommends not going below 5 V, which |
| 159 | corresponds to a pwm value of 106 for the driver. The driver doesn't |
| 160 | enforce this limit though. |
| 161 | |
Phil Endecott | aba5073 | 2007-06-29 09:19:14 +0200 | [diff] [blame] | 162 | Three different fan control modes are supported; the mode number is written |
| 163 | to the pwm<n>_enable file. |
Jean Delvare | e9cea64 | 2006-12-12 18:18:27 +0100 | [diff] [blame] | 164 | |
Phil Endecott | aba5073 | 2007-06-29 09:19:14 +0200 | [diff] [blame] | 165 | * 1: Manual mode |
| 166 | You ask for a specific PWM duty cycle or DC voltage by writing to the |
| 167 | pwm<n> file. |
Jean Delvare | e9cea64 | 2006-12-12 18:18:27 +0100 | [diff] [blame] | 168 | |
Phil Endecott | aba5073 | 2007-06-29 09:19:14 +0200 | [diff] [blame] | 169 | * 2: Temperature mode |
| 170 | You define 3 temperature/fan speed trip points using the |
| 171 | pwm<n>_auto_point<m>_temp and _fan files. These define a staircase |
| 172 | relationship between temperature and fan speed with two additional points |
| 173 | interpolated between the values that you define. When the temperature |
| 174 | is below auto_point1_temp the fan is switched off. |
Jean Delvare | e9cea64 | 2006-12-12 18:18:27 +0100 | [diff] [blame] | 175 | |
Phil Endecott | aba5073 | 2007-06-29 09:19:14 +0200 | [diff] [blame] | 176 | * 3: Fan speed mode |
| 177 | You ask for a specific fan speed by writing to the fan<n>_target file. |
| 178 | |
| 179 | Both of the automatic modes require that pwm1 corresponds to fan1, pwm2 to |
| 180 | fan2 and pwm3 to fan3. Temperature mode also requires that temp1 corresponds |
| 181 | to pwm1 and fan1, etc. |