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Jean Delvare5db3d3d2006-01-09 23:32:57 +01001Kernel driver f71805f
2=====================
3
4Supported chips:
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -03005
Jean Delvare5db3d3d2006-01-09 23:32:57 +01006 * Fintek F71805F/FG
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -03007
Jean Delvare5db3d3d2006-01-09 23:32:57 +01008 Prefix: 'f71805f'
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -03009
Jean Delvare5db3d3d2006-01-09 23:32:57 +010010 Addresses scanned: none, address read from Super I/O config space
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030011
Phil Endecottaba50732007-06-29 09:19:14 +020012 Datasheet: Available from the Fintek website
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030013
Jean Delvare9cab0212007-07-15 10:36:06 +020014 * Fintek F71806F/FG
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030015
Jean Delvare9cab0212007-07-15 10:36:06 +020016 Prefix: 'f71872f'
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030017
Jean Delvare9cab0212007-07-15 10:36:06 +020018 Addresses scanned: none, address read from Super I/O config space
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030019
Jean Delvare9cab0212007-07-15 10:36:06 +020020 Datasheet: Available from the Fintek website
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030021
Jean Delvare51c997d2006-12-12 18:18:29 +010022 * Fintek F71872F/FG
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030023
Jean Delvare51c997d2006-12-12 18:18:29 +010024 Prefix: 'f71872f'
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030025
Jean Delvare51c997d2006-12-12 18:18:29 +010026 Addresses scanned: none, address read from Super I/O config space
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030027
Phil Endecottaba50732007-06-29 09:19:14 +020028 Datasheet: Available from the Fintek website
Jean Delvare5db3d3d2006-01-09 23:32:57 +010029
Jean Delvare7c81c60f2014-01-29 20:40:08 +010030Author: Jean Delvare <jdelvare@suse.de>
Jean Delvare5db3d3d2006-01-09 23:32:57 +010031
32Thanks to Denis Kieft from Barracuda Networks for the donation of a
33test system (custom Jetway K8M8MS motherboard, with CPU and RAM) and
34for providing initial documentation.
35
Jean Delvaree9cea642006-12-12 18:18:27 +010036Thanks to Kris Chen and Aaron Huang from Fintek for answering technical
37questions and providing additional documentation.
Jean Delvare5db3d3d2006-01-09 23:32:57 +010038
39Thanks to Chris Lin from Jetway for providing wiring schematics and
Jean Delvare15fe25c2006-10-08 21:59:54 +020040answering technical questions.
Jean Delvare5db3d3d2006-01-09 23:32:57 +010041
42
43Description
44-----------
45
46The Fintek F71805F/FG Super I/O chip includes complete hardware monitoring
47capabilities. It can monitor up to 9 voltages (counting its own power
48source), 3 fans and 3 temperature sensors.
49
50This chip also has fan controlling features, using either DC or PWM, in
Jean Delvaree9cea642006-12-12 18:18:27 +010051three different modes (one manual, two automatic).
Jean Delvare5db3d3d2006-01-09 23:32:57 +010052
Jean Delvare51c997d2006-12-12 18:18:29 +010053The Fintek F71872F/FG Super I/O chip is almost the same, with two
54additional internal voltages monitored (VSB and battery). It also features
556 VID inputs. The VID inputs are not yet supported by this driver.
56
Jean Delvare9cab0212007-07-15 10:36:06 +020057The Fintek F71806F/FG Super-I/O chip is essentially the same as the
58F71872F/FG, and is undistinguishable therefrom.
59
Jean Delvare5db3d3d2006-01-09 23:32:57 +010060The driver assumes that no more than one chip is present, which seems
61reasonable.
62
63
64Voltage Monitoring
65------------------
66
67Voltages are sampled by an 8-bit ADC with a LSB of 8 mV. The supported
68range is thus from 0 to 2.040 V. Voltage values outside of this range
69need external resistors. An exception is in0, which is used to monitor
70the chip's own power source (+3.3V), and is divided internally by a
Jean Delvare51c997d2006-12-12 18:18:29 +010071factor 2. For the F71872F/FG, in9 (VSB) and in10 (battery) are also
72divided internally by a factor 2.
Jean Delvare5db3d3d2006-01-09 23:32:57 +010073
74The two LSB of the voltage limit registers are not used (always 0), so
75you can only set the limits in steps of 32 mV (before scaling).
76
77The wirings and resistor values suggested by Fintek are as follow:
78
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030079======= ======= =========== ==== ======= ============ ==============
80in pin expected
81 name use R1 R2 divider raw val.
82======= ======= =========== ==== ======= ============ ==============
Jean Delvare5db3d3d2006-01-09 23:32:57 +010083in0 VCC VCC3.3V int. int. 2.00 1.65 V
84in1 VIN1 VTT1.2V 10K - 1.00 1.20 V
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030085in2 VIN2 VRAM 100K 100K 2.00 ~1.25 V [1]_
86in3 VIN3 VCHIPSET 47K 100K 1.47 2.24 V [2]_
Jean Delvare5db3d3d2006-01-09 23:32:57 +010087in4 VIN4 VCC5V 200K 47K 5.25 0.95 V
88in5 VIN5 +12V 200K 20K 11.00 1.05 V
89in6 VIN6 VCC1.5V 10K - 1.00 1.50 V
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030090in7 VIN7 VCORE 10K - 1.00 ~1.40 V [1]_
Jean Delvare5db3d3d2006-01-09 23:32:57 +010091in8 VIN8 VSB5V 200K 47K 1.00 0.95 V
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030092in10 VSB VSB3.3V int. int. 2.00 1.65 V [3]_
93in9 VBAT VBATTERY int. int. 2.00 1.50 V [3]_
94======= ======= =========== ==== ======= ============ ==============
Jean Delvare5db3d3d2006-01-09 23:32:57 +010095
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030096.. [1] Depends on your hardware setup.
97.. [2] Obviously not correct, swapping R1 and R2 would make more sense.
98.. [3] F71872F/FG only.
Jean Delvare5db3d3d2006-01-09 23:32:57 +010099
100These values can be used as hints at best, as motherboard manufacturers
101are free to use a completely different setup. As a matter of fact, the
102Jetway K8M8MS uses a significantly different setup. You will have to
103find out documentation about your own motherboard, and edit sensors.conf
104accordingly.
105
106Each voltage measured has associated low and high limits, each of which
107triggers an alarm when crossed.
108
109
110Fan Monitoring
111--------------
112
113Fan rotation speeds are reported as 12-bit values from a gated clock
114signal. Speeds down to 366 RPM can be measured. There is no theoretical
115high limit, but values over 6000 RPM seem to cause problem. The effective
116resolution is much lower than you would expect, the step between different
117register values being 10 rather than 1.
118
119The chip assumes 2 pulse-per-revolution fans.
120
121An alarm is triggered if the rotation speed drops below a programmable
122limit or is too low to be measured.
123
124
125Temperature Monitoring
126----------------------
127
128Temperatures are reported in degrees Celsius. Each temperature measured
129has a high limit, those crossing triggers an alarm. There is an associated
130hysteresis value, below which the temperature has to drop before the
131alarm is cleared.
132
133All temperature channels are external, there is no embedded temperature
134sensor. Each channel can be used for connecting either a thermal diode
135or a thermistor. The driver reports the currently selected mode, but
136doesn't allow changing it. In theory, the BIOS should have configured
137everything properly.
Jean Delvaree9cea642006-12-12 18:18:27 +0100138
139
140Fan Control
141-----------
142
143Both PWM (pulse-width modulation) and DC fan speed control methods are
144supported. The right one to use depends on external circuitry on the
145motherboard, so the driver assumes that the BIOS set the method
146properly. The driver will report the method, but won't let you change
147it.
148
149When the PWM method is used, you can select the operating frequency,
150from 187.5 kHz (default) to 31 Hz. The best frequency depends on the
151fan model. As a rule of thumb, lower frequencies seem to give better
Phil Endecottaba50732007-06-29 09:19:14 +0200152control, but may generate annoying high-pitch noise. So a frequency just
153above the audible range, such as 25 kHz, may be a good choice; if this
154doesn't give you good linear control, try reducing it. Fintek recommends
Jean Delvaree9cea642006-12-12 18:18:27 +0100155not going below 1 kHz, as the fan tachometers get confused by lower
156frequencies as well.
157
158When the DC method is used, Fintek recommends not going below 5 V, which
159corresponds to a pwm value of 106 for the driver. The driver doesn't
160enforce this limit though.
161
Phil Endecottaba50732007-06-29 09:19:14 +0200162Three different fan control modes are supported; the mode number is written
163to the pwm<n>_enable file.
Jean Delvaree9cea642006-12-12 18:18:27 +0100164
Phil Endecottaba50732007-06-29 09:19:14 +0200165* 1: Manual mode
166 You ask for a specific PWM duty cycle or DC voltage by writing to the
167 pwm<n> file.
Jean Delvaree9cea642006-12-12 18:18:27 +0100168
Phil Endecottaba50732007-06-29 09:19:14 +0200169* 2: Temperature mode
170 You define 3 temperature/fan speed trip points using the
171 pwm<n>_auto_point<m>_temp and _fan files. These define a staircase
172 relationship between temperature and fan speed with two additional points
173 interpolated between the values that you define. When the temperature
174 is below auto_point1_temp the fan is switched off.
Jean Delvaree9cea642006-12-12 18:18:27 +0100175
Phil Endecottaba50732007-06-29 09:19:14 +0200176* 3: Fan speed mode
177 You ask for a specific fan speed by writing to the fan<n>_target file.
178
179Both of the automatic modes require that pwm1 corresponds to fan1, pwm2 to
180fan2 and pwm3 to fan3. Temperature mode also requires that temp1 corresponds
181to pwm1 and fan1, etc.