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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 / . / arch / ppc64 / kernel / cputable.c
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Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame^]1/*
2 * arch/ppc64/kernel/cputable.c
3 *
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * Modifications for ppc64:
7 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/config.h>
16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/threads.h>
19#include <linux/init.h>
20#include <linux/module.h>
21
22#include <asm/cputable.h>
23
24struct cpu_spec* cur_cpu_spec = NULL;
25EXPORT_SYMBOL(cur_cpu_spec);
26
27/* NOTE:
28 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
29 * the responsibility of the appropriate CPU save/restore functions to
30 * eventually copy these settings over. Those save/restore aren't yet
31 * part of the cputable though. That has to be fixed for both ppc32
32 * and ppc64
33 */
34extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
35extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
36extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
37
38
39/* We only set the altivec features if the kernel was compiled with altivec
40 * support
41 */
42#ifdef CONFIG_ALTIVEC
43#define CPU_FTR_ALTIVEC_COMP CPU_FTR_ALTIVEC
44#define PPC_FEATURE_HAS_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC
45#else
46#define CPU_FTR_ALTIVEC_COMP 0
47#define PPC_FEATURE_HAS_ALTIVEC_COMP 0
48#endif
49
50struct cpu_spec cpu_specs[] = {
51 { /* Power3 */
52 0xffff0000, 0x00400000, "POWER3 (630)",
53 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
54 CPU_FTR_IABR | CPU_FTR_PMC8,
55 COMMON_USER_PPC64,
56 128, 128,
57 __setup_cpu_power3,
58 COMMON_PPC64_FW
59 },
60 { /* Power3+ */
61 0xffff0000, 0x00410000, "POWER3 (630+)",
62 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
63 CPU_FTR_IABR | CPU_FTR_PMC8,
64 COMMON_USER_PPC64,
65 128, 128,
66 __setup_cpu_power3,
67 COMMON_PPC64_FW
68 },
69 { /* Northstar */
70 0xffff0000, 0x00330000, "RS64-II (northstar)",
71 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
72 CPU_FTR_IABR | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
73 COMMON_USER_PPC64,
74 128, 128,
75 __setup_cpu_power3,
76 COMMON_PPC64_FW
77 },
78 { /* Pulsar */
79 0xffff0000, 0x00340000, "RS64-III (pulsar)",
80 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
81 CPU_FTR_IABR | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
82 COMMON_USER_PPC64,
83 128, 128,
84 __setup_cpu_power3,
85 COMMON_PPC64_FW
86 },
87 { /* I-star */
88 0xffff0000, 0x00360000, "RS64-III (icestar)",
89 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
90 CPU_FTR_IABR | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
91 COMMON_USER_PPC64,
92 128, 128,
93 __setup_cpu_power3,
94 COMMON_PPC64_FW
95 },
96 { /* S-star */
97 0xffff0000, 0x00370000, "RS64-IV (sstar)",
98 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
99 CPU_FTR_IABR | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
100 COMMON_USER_PPC64,
101 128, 128,
102 __setup_cpu_power3,
103 COMMON_PPC64_FW
104 },
105 { /* Power4 */
106 0xffff0000, 0x00350000, "POWER4 (gp)",
107 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
108 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
109 COMMON_USER_PPC64,
110 128, 128,
111 __setup_cpu_power4,
112 COMMON_PPC64_FW
113 },
114 { /* Power4+ */
115 0xffff0000, 0x00380000, "POWER4+ (gq)",
116 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
117 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
118 COMMON_USER_PPC64,
119 128, 128,
120 __setup_cpu_power4,
121 COMMON_PPC64_FW
122 },
123 { /* PPC970 */
124 0xffff0000, 0x00390000, "PPC970",
125 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
126 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
127 CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
128 COMMON_USER_PPC64 | PPC_FEATURE_HAS_ALTIVEC_COMP,
129 128, 128,
130 __setup_cpu_ppc970,
131 COMMON_PPC64_FW
132 },
133 { /* PPC970FX */
134 0xffff0000, 0x003c0000, "PPC970FX",
135 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
136 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
137 CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
138 COMMON_USER_PPC64 | PPC_FEATURE_HAS_ALTIVEC_COMP,
139 128, 128,
140 __setup_cpu_ppc970,
141 COMMON_PPC64_FW
142 },
143 { /* Power5 */
144 0xffff0000, 0x003a0000, "POWER5 (gr)",
145 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
146 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA | CPU_FTR_SMT |
147 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
148 CPU_FTR_MMCRA_SIHV,
149 COMMON_USER_PPC64,
150 128, 128,
151 __setup_cpu_power4,
152 COMMON_PPC64_FW
153 },
154 { /* Power5 */
155 0xffff0000, 0x003b0000, "POWER5 (gs)",
156 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
157 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA | CPU_FTR_SMT |
158 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
159 CPU_FTR_MMCRA_SIHV,
160 COMMON_USER_PPC64,
161 128, 128,
162 __setup_cpu_power4,
163 COMMON_PPC64_FW
164 },
165 { /* default match */
166 0x00000000, 0x00000000, "POWER4 (compatible)",
167 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
168 CPU_FTR_PPCAS_ARCH_V2,
169 COMMON_USER_PPC64,
170 128, 128,
171 __setup_cpu_power4,
172 COMMON_PPC64_FW
173 }
174};
175
176firmware_feature_t firmware_features_table[FIRMWARE_MAX_FEATURES] = {
177 {FW_FEATURE_PFT, "hcall-pft"},
178 {FW_FEATURE_TCE, "hcall-tce"},
179 {FW_FEATURE_SPRG0, "hcall-sprg0"},
180 {FW_FEATURE_DABR, "hcall-dabr"},
181 {FW_FEATURE_COPY, "hcall-copy"},
182 {FW_FEATURE_ASR, "hcall-asr"},
183 {FW_FEATURE_DEBUG, "hcall-debug"},
184 {FW_FEATURE_PERF, "hcall-perf"},
185 {FW_FEATURE_DUMP, "hcall-dump"},
186 {FW_FEATURE_INTERRUPT, "hcall-interrupt"},
187 {FW_FEATURE_MIGRATE, "hcall-migrate"},
188 {FW_FEATURE_PERFMON, "hcall-perfmon"},
189 {FW_FEATURE_CRQ, "hcall-crq"},
190 {FW_FEATURE_VIO, "hcall-vio"},
191 {FW_FEATURE_RDMA, "hcall-rdma"},
192 {FW_FEATURE_LLAN, "hcall-lLAN"},
193 {FW_FEATURE_BULK, "hcall-bulk"},
194 {FW_FEATURE_XDABR, "hcall-xdabr"},
195 {FW_FEATURE_MULTITCE, "hcall-multi-tce"},
196 {FW_FEATURE_SPLPAR, "hcall-splpar"},
197};