Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * linux/arch/arm/kernel/irq.c |
| 3 | * |
| 4 | * Copyright (C) 1992 Linus Torvalds |
| 5 | * Modifications for ARM processor Copyright (C) 1995-2000 Russell King. |
| 6 | * 'Borrowed' for ARM26 and (C) 2003 Ian Molton. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * This file contains the code used by various IRQ handling routines: |
| 13 | * asking for different IRQ's should be done through these routines |
| 14 | * instead of just grabbing them. Thus setups with different IRQ numbers |
| 15 | * shouldn't result in any weird surprises, and installing new handlers |
| 16 | * should be easier. |
| 17 | * |
| 18 | * IRQ's are in fact implemented a bit like signal handlers for the kernel. |
| 19 | * Naturally it's not a 1:1 relation, but there are similarities. |
| 20 | */ |
| 21 | #include <linux/config.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/ptrace.h> |
| 24 | #include <linux/kernel_stat.h> |
| 25 | #include <linux/signal.h> |
| 26 | #include <linux/sched.h> |
| 27 | #include <linux/ioport.h> |
| 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/slab.h> |
| 30 | #include <linux/random.h> |
| 31 | #include <linux/smp.h> |
| 32 | #include <linux/init.h> |
| 33 | #include <linux/seq_file.h> |
| 34 | #include <linux/errno.h> |
| 35 | |
| 36 | #include <asm/irq.h> |
| 37 | #include <asm/system.h> |
| 38 | #include <asm/irqchip.h> |
| 39 | |
| 40 | //FIXME - this ought to be in a header IMO |
| 41 | void __init arc_init_irq(void); |
| 42 | |
| 43 | /* |
| 44 | * Maximum IRQ count. Currently, this is arbitary. However, it should |
| 45 | * not be set too low to prevent false triggering. Conversely, if it |
| 46 | * is set too high, then you could miss a stuck IRQ. |
| 47 | * |
| 48 | * FIXME Maybe we ought to set a timer and re-enable the IRQ at a later time? |
| 49 | */ |
| 50 | #define MAX_IRQ_CNT 100000 |
| 51 | |
| 52 | static volatile unsigned long irq_err_count; |
| 53 | static DEFINE_SPINLOCK(irq_controller_lock); |
| 54 | |
| 55 | struct irqdesc irq_desc[NR_IRQS]; |
| 56 | |
| 57 | /* |
| 58 | * Dummy mask/unmask handler |
| 59 | */ |
| 60 | void dummy_mask_unmask_irq(unsigned int irq) |
| 61 | { |
| 62 | } |
| 63 | |
| 64 | void do_bad_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) |
| 65 | { |
| 66 | irq_err_count += 1; |
| 67 | printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq); |
| 68 | } |
| 69 | |
| 70 | static struct irqchip bad_chip = { |
| 71 | .ack = dummy_mask_unmask_irq, |
| 72 | .mask = dummy_mask_unmask_irq, |
| 73 | .unmask = dummy_mask_unmask_irq, |
| 74 | }; |
| 75 | |
| 76 | static struct irqdesc bad_irq_desc = { |
| 77 | .chip = &bad_chip, |
| 78 | .handle = do_bad_IRQ, |
| 79 | .depth = 1, |
| 80 | }; |
| 81 | |
| 82 | /** |
| 83 | * disable_irq - disable an irq and wait for completion |
| 84 | * @irq: Interrupt to disable |
| 85 | * |
| 86 | * Disable the selected interrupt line. We do this lazily. |
| 87 | * |
| 88 | * This function may be called from IRQ context. |
| 89 | */ |
| 90 | void disable_irq(unsigned int irq) |
| 91 | { |
| 92 | struct irqdesc *desc = irq_desc + irq; |
| 93 | unsigned long flags; |
| 94 | spin_lock_irqsave(&irq_controller_lock, flags); |
| 95 | if (!desc->depth++) |
| 96 | desc->enabled = 0; |
| 97 | spin_unlock_irqrestore(&irq_controller_lock, flags); |
| 98 | } |
| 99 | |
| 100 | /** |
| 101 | * enable_irq - enable interrupt handling on an irq |
| 102 | * @irq: Interrupt to enable |
| 103 | * |
| 104 | * Re-enables the processing of interrupts on this IRQ line. |
| 105 | * Note that this may call the interrupt handler, so you may |
| 106 | * get unexpected results if you hold IRQs disabled. |
| 107 | * |
| 108 | * This function may be called from IRQ context. |
| 109 | */ |
| 110 | void enable_irq(unsigned int irq) |
| 111 | { |
| 112 | struct irqdesc *desc = irq_desc + irq; |
| 113 | unsigned long flags; |
| 114 | int pending = 0; |
| 115 | |
| 116 | spin_lock_irqsave(&irq_controller_lock, flags); |
| 117 | if (unlikely(!desc->depth)) { |
| 118 | printk("enable_irq(%u) unbalanced from %p\n", irq, |
| 119 | __builtin_return_address(0)); //FIXME bum addresses reported - why? |
| 120 | } else if (!--desc->depth) { |
| 121 | desc->probing = 0; |
| 122 | desc->enabled = 1; |
| 123 | desc->chip->unmask(irq); |
| 124 | pending = desc->pending; |
| 125 | desc->pending = 0; |
| 126 | /* |
| 127 | * If the interrupt was waiting to be processed, |
| 128 | * retrigger it. |
| 129 | */ |
| 130 | if (pending) |
| 131 | desc->chip->rerun(irq); |
| 132 | } |
| 133 | spin_unlock_irqrestore(&irq_controller_lock, flags); |
| 134 | } |
| 135 | |
| 136 | int show_interrupts(struct seq_file *p, void *v) |
| 137 | { |
| 138 | int i = *(loff_t *) v; |
| 139 | struct irqaction * action; |
| 140 | |
| 141 | if (i < NR_IRQS) { |
| 142 | action = irq_desc[i].action; |
| 143 | if (!action) |
| 144 | continue; |
| 145 | seq_printf(p, "%3d: %10u ", i, kstat_irqs(i)); |
| 146 | seq_printf(p, " %s", action->name); |
| 147 | for (action = action->next; action; action = action->next) { |
| 148 | seq_printf(p, ", %s", action->name); |
| 149 | } |
| 150 | seq_putc(p, '\n'); |
| 151 | } else if (i == NR_IRQS) { |
| 152 | show_fiq_list(p, v); |
| 153 | seq_printf(p, "Err: %10lu\n", irq_err_count); |
| 154 | } |
| 155 | return 0; |
| 156 | } |
| 157 | |
| 158 | /* |
| 159 | * IRQ lock detection. |
| 160 | * |
| 161 | * Hopefully, this should get us out of a few locked situations. |
| 162 | * However, it may take a while for this to happen, since we need |
| 163 | * a large number if IRQs to appear in the same jiffie with the |
| 164 | * same instruction pointer (or within 2 instructions). |
| 165 | */ |
| 166 | static int check_irq_lock(struct irqdesc *desc, int irq, struct pt_regs *regs) |
| 167 | { |
| 168 | unsigned long instr_ptr = instruction_pointer(regs); |
| 169 | |
| 170 | if (desc->lck_jif == jiffies && |
| 171 | desc->lck_pc >= instr_ptr && desc->lck_pc < instr_ptr + 8) { |
| 172 | desc->lck_cnt += 1; |
| 173 | |
| 174 | if (desc->lck_cnt > MAX_IRQ_CNT) { |
| 175 | printk(KERN_ERR "IRQ LOCK: IRQ%d is locking the system, disabled\n", irq); |
| 176 | return 1; |
| 177 | } |
| 178 | } else { |
| 179 | desc->lck_cnt = 0; |
| 180 | desc->lck_pc = instruction_pointer(regs); |
| 181 | desc->lck_jif = jiffies; |
| 182 | } |
| 183 | return 0; |
| 184 | } |
| 185 | |
| 186 | static void |
| 187 | __do_irq(unsigned int irq, struct irqaction *action, struct pt_regs *regs) |
| 188 | { |
| 189 | unsigned int status; |
| 190 | int ret; |
| 191 | |
| 192 | spin_unlock(&irq_controller_lock); |
| 193 | if (!(action->flags & SA_INTERRUPT)) |
| 194 | local_irq_enable(); |
| 195 | |
| 196 | status = 0; |
| 197 | do { |
| 198 | ret = action->handler(irq, action->dev_id, regs); |
| 199 | if (ret == IRQ_HANDLED) |
| 200 | status |= action->flags; |
| 201 | action = action->next; |
| 202 | } while (action); |
| 203 | |
| 204 | if (status & SA_SAMPLE_RANDOM) |
| 205 | add_interrupt_randomness(irq); |
| 206 | |
| 207 | spin_lock_irq(&irq_controller_lock); |
| 208 | } |
| 209 | |
| 210 | /* |
| 211 | * This is for software-decoded IRQs. The caller is expected to |
| 212 | * handle the ack, clear, mask and unmask issues. |
| 213 | */ |
| 214 | void |
| 215 | do_simple_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) |
| 216 | { |
| 217 | struct irqaction *action; |
| 218 | const int cpu = smp_processor_id(); |
| 219 | |
| 220 | desc->triggered = 1; |
| 221 | |
| 222 | kstat_cpu(cpu).irqs[irq]++; |
| 223 | |
| 224 | action = desc->action; |
| 225 | if (action) |
| 226 | __do_irq(irq, desc->action, regs); |
| 227 | } |
| 228 | |
| 229 | /* |
| 230 | * Most edge-triggered IRQ implementations seem to take a broken |
| 231 | * approach to this. Hence the complexity. |
| 232 | */ |
| 233 | void |
| 234 | do_edge_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) |
| 235 | { |
| 236 | const int cpu = smp_processor_id(); |
| 237 | |
| 238 | desc->triggered = 1; |
| 239 | |
| 240 | /* |
| 241 | * If we're currently running this IRQ, or its disabled, |
| 242 | * we shouldn't process the IRQ. Instead, turn on the |
| 243 | * hardware masks. |
| 244 | */ |
| 245 | if (unlikely(desc->running || !desc->enabled)) |
| 246 | goto running; |
| 247 | |
| 248 | /* |
| 249 | * Acknowledge and clear the IRQ, but don't mask it. |
| 250 | */ |
| 251 | desc->chip->ack(irq); |
| 252 | |
| 253 | /* |
| 254 | * Mark the IRQ currently in progress. |
| 255 | */ |
| 256 | desc->running = 1; |
| 257 | |
| 258 | kstat_cpu(cpu).irqs[irq]++; |
| 259 | |
| 260 | do { |
| 261 | struct irqaction *action; |
| 262 | |
| 263 | action = desc->action; |
| 264 | if (!action) |
| 265 | break; |
| 266 | |
| 267 | if (desc->pending && desc->enabled) { |
| 268 | desc->pending = 0; |
| 269 | desc->chip->unmask(irq); |
| 270 | } |
| 271 | |
| 272 | __do_irq(irq, action, regs); |
| 273 | } while (desc->pending); |
| 274 | |
| 275 | desc->running = 0; |
| 276 | |
| 277 | /* |
| 278 | * If we were disabled or freed, shut down the handler. |
| 279 | */ |
| 280 | if (likely(desc->action && !check_irq_lock(desc, irq, regs))) |
| 281 | return; |
| 282 | |
| 283 | running: |
| 284 | /* |
| 285 | * We got another IRQ while this one was masked or |
| 286 | * currently running. Delay it. |
| 287 | */ |
| 288 | desc->pending = 1; |
| 289 | desc->chip->mask(irq); |
| 290 | desc->chip->ack(irq); |
| 291 | } |
| 292 | |
| 293 | /* |
| 294 | * Level-based IRQ handler. Nice and simple. |
| 295 | */ |
| 296 | void |
| 297 | do_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) |
| 298 | { |
| 299 | struct irqaction *action; |
| 300 | const int cpu = smp_processor_id(); |
| 301 | |
| 302 | desc->triggered = 1; |
| 303 | |
| 304 | /* |
| 305 | * Acknowledge, clear _AND_ disable the interrupt. |
| 306 | */ |
| 307 | desc->chip->ack(irq); |
| 308 | |
| 309 | if (likely(desc->enabled)) { |
| 310 | kstat_cpu(cpu).irqs[irq]++; |
| 311 | |
| 312 | /* |
| 313 | * Return with this interrupt masked if no action |
| 314 | */ |
| 315 | action = desc->action; |
| 316 | if (action) { |
| 317 | __do_irq(irq, desc->action, regs); |
| 318 | |
| 319 | if (likely(desc->enabled && |
| 320 | !check_irq_lock(desc, irq, regs))) |
| 321 | desc->chip->unmask(irq); |
| 322 | } |
| 323 | } |
| 324 | } |
| 325 | |
| 326 | /* |
| 327 | * do_IRQ handles all hardware IRQ's. Decoded IRQs should not |
| 328 | * come via this function. Instead, they should provide their |
| 329 | * own 'handler' |
| 330 | */ |
| 331 | asmlinkage void asm_do_IRQ(int irq, struct pt_regs *regs) |
| 332 | { |
| 333 | struct irqdesc *desc = irq_desc + irq; |
| 334 | |
| 335 | /* |
| 336 | * Some hardware gives randomly wrong interrupts. Rather |
| 337 | * than crashing, do something sensible. |
| 338 | */ |
| 339 | if (irq >= NR_IRQS) |
| 340 | desc = &bad_irq_desc; |
| 341 | |
| 342 | irq_enter(); |
| 343 | spin_lock(&irq_controller_lock); |
| 344 | desc->handle(irq, desc, regs); |
| 345 | spin_unlock(&irq_controller_lock); |
| 346 | irq_exit(); |
| 347 | } |
| 348 | |
| 349 | void __set_irq_handler(unsigned int irq, irq_handler_t handle, int is_chained) |
| 350 | { |
| 351 | struct irqdesc *desc; |
| 352 | unsigned long flags; |
| 353 | |
| 354 | if (irq >= NR_IRQS) { |
| 355 | printk(KERN_ERR "Trying to install handler for IRQ%d\n", irq); |
| 356 | return; |
| 357 | } |
| 358 | |
| 359 | if (handle == NULL) |
| 360 | handle = do_bad_IRQ; |
| 361 | |
| 362 | desc = irq_desc + irq; |
| 363 | |
| 364 | if (is_chained && desc->chip == &bad_chip) |
| 365 | printk(KERN_WARNING "Trying to install chained handler for IRQ%d\n", irq); |
| 366 | |
| 367 | spin_lock_irqsave(&irq_controller_lock, flags); |
| 368 | if (handle == do_bad_IRQ) { |
| 369 | desc->chip->mask(irq); |
| 370 | desc->chip->ack(irq); |
| 371 | desc->depth = 1; |
| 372 | desc->enabled = 0; |
| 373 | } |
| 374 | desc->handle = handle; |
| 375 | if (handle != do_bad_IRQ && is_chained) { |
| 376 | desc->valid = 0; |
| 377 | desc->probe_ok = 0; |
| 378 | desc->depth = 0; |
| 379 | desc->chip->unmask(irq); |
| 380 | } |
| 381 | spin_unlock_irqrestore(&irq_controller_lock, flags); |
| 382 | } |
| 383 | |
| 384 | void set_irq_chip(unsigned int irq, struct irqchip *chip) |
| 385 | { |
| 386 | struct irqdesc *desc; |
| 387 | unsigned long flags; |
| 388 | |
| 389 | if (irq >= NR_IRQS) { |
| 390 | printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq); |
| 391 | return; |
| 392 | } |
| 393 | |
| 394 | if (chip == NULL) |
| 395 | chip = &bad_chip; |
| 396 | |
| 397 | desc = irq_desc + irq; |
| 398 | spin_lock_irqsave(&irq_controller_lock, flags); |
| 399 | desc->chip = chip; |
| 400 | spin_unlock_irqrestore(&irq_controller_lock, flags); |
| 401 | } |
| 402 | |
| 403 | int set_irq_type(unsigned int irq, unsigned int type) |
| 404 | { |
| 405 | struct irqdesc *desc; |
| 406 | unsigned long flags; |
| 407 | int ret = -ENXIO; |
| 408 | |
| 409 | if (irq >= NR_IRQS) { |
| 410 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); |
| 411 | return -ENODEV; |
| 412 | } |
| 413 | |
| 414 | desc = irq_desc + irq; |
| 415 | if (desc->chip->type) { |
| 416 | spin_lock_irqsave(&irq_controller_lock, flags); |
| 417 | ret = desc->chip->type(irq, type); |
| 418 | spin_unlock_irqrestore(&irq_controller_lock, flags); |
| 419 | } |
| 420 | |
| 421 | return ret; |
| 422 | } |
| 423 | |
| 424 | void set_irq_flags(unsigned int irq, unsigned int iflags) |
| 425 | { |
| 426 | struct irqdesc *desc; |
| 427 | unsigned long flags; |
| 428 | |
| 429 | if (irq >= NR_IRQS) { |
| 430 | printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq); |
| 431 | return; |
| 432 | } |
| 433 | |
| 434 | desc = irq_desc + irq; |
| 435 | spin_lock_irqsave(&irq_controller_lock, flags); |
| 436 | desc->valid = (iflags & IRQF_VALID) != 0; |
| 437 | desc->probe_ok = (iflags & IRQF_PROBE) != 0; |
| 438 | desc->noautoenable = (iflags & IRQF_NOAUTOEN) != 0; |
| 439 | spin_unlock_irqrestore(&irq_controller_lock, flags); |
| 440 | } |
| 441 | |
| 442 | int setup_irq(unsigned int irq, struct irqaction *new) |
| 443 | { |
| 444 | int shared = 0; |
| 445 | struct irqaction *old, **p; |
| 446 | unsigned long flags; |
| 447 | struct irqdesc *desc; |
| 448 | |
| 449 | /* |
| 450 | * Some drivers like serial.c use request_irq() heavily, |
| 451 | * so we have to be careful not to interfere with a |
| 452 | * running system. |
| 453 | */ |
| 454 | if (new->flags & SA_SAMPLE_RANDOM) { |
| 455 | /* |
| 456 | * This function might sleep, we want to call it first, |
| 457 | * outside of the atomic block. |
| 458 | * Yes, this might clear the entropy pool if the wrong |
| 459 | * driver is attempted to be loaded, without actually |
| 460 | * installing a new handler, but is this really a problem, |
| 461 | * only the sysadmin is able to do this. |
| 462 | */ |
| 463 | rand_initialize_irq(irq); |
| 464 | } |
| 465 | |
| 466 | /* |
| 467 | * The following block of code has to be executed atomically |
| 468 | */ |
| 469 | desc = irq_desc + irq; |
| 470 | spin_lock_irqsave(&irq_controller_lock, flags); |
| 471 | p = &desc->action; |
| 472 | if ((old = *p) != NULL) { |
| 473 | /* Can't share interrupts unless both agree to */ |
| 474 | if (!(old->flags & new->flags & SA_SHIRQ)) { |
| 475 | spin_unlock_irqrestore(&irq_controller_lock, flags); |
| 476 | return -EBUSY; |
| 477 | } |
| 478 | |
| 479 | /* add new interrupt at end of irq queue */ |
| 480 | do { |
| 481 | p = &old->next; |
| 482 | old = *p; |
| 483 | } while (old); |
| 484 | shared = 1; |
| 485 | } |
| 486 | |
| 487 | *p = new; |
| 488 | |
| 489 | if (!shared) { |
| 490 | desc->probing = 0; |
| 491 | desc->running = 0; |
| 492 | desc->pending = 0; |
| 493 | desc->depth = 1; |
| 494 | if (!desc->noautoenable) { |
| 495 | desc->depth = 0; |
| 496 | desc->enabled = 1; |
| 497 | desc->chip->unmask(irq); |
| 498 | } |
| 499 | } |
| 500 | |
| 501 | spin_unlock_irqrestore(&irq_controller_lock, flags); |
| 502 | return 0; |
| 503 | } |
| 504 | |
| 505 | /** |
| 506 | * request_irq - allocate an interrupt line |
| 507 | * @irq: Interrupt line to allocate |
| 508 | * @handler: Function to be called when the IRQ occurs |
| 509 | * @irqflags: Interrupt type flags |
| 510 | * @devname: An ascii name for the claiming device |
| 511 | * @dev_id: A cookie passed back to the handler function |
| 512 | * |
| 513 | * This call allocates interrupt resources and enables the |
| 514 | * interrupt line and IRQ handling. From the point this |
| 515 | * call is made your handler function may be invoked. Since |
| 516 | * your handler function must clear any interrupt the board |
| 517 | * raises, you must take care both to initialise your hardware |
| 518 | * and to set up the interrupt handler in the right order. |
| 519 | * |
| 520 | * Dev_id must be globally unique. Normally the address of the |
| 521 | * device data structure is used as the cookie. Since the handler |
| 522 | * receives this value it makes sense to use it. |
| 523 | * |
| 524 | * If your interrupt is shared you must pass a non NULL dev_id |
| 525 | * as this is required when freeing the interrupt. |
| 526 | * |
| 527 | * Flags: |
| 528 | * |
| 529 | * SA_SHIRQ Interrupt is shared |
| 530 | * |
| 531 | * SA_INTERRUPT Disable local interrupts while processing |
| 532 | * |
| 533 | * SA_SAMPLE_RANDOM The interrupt can be used for entropy |
| 534 | * |
| 535 | */ |
| 536 | |
| 537 | //FIXME - handler used to return void - whats the significance of the change? |
| 538 | int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *), |
| 539 | unsigned long irq_flags, const char * devname, void *dev_id) |
| 540 | { |
| 541 | unsigned long retval; |
| 542 | struct irqaction *action; |
| 543 | |
| 544 | if (irq >= NR_IRQS || !irq_desc[irq].valid || !handler || |
| 545 | (irq_flags & SA_SHIRQ && !dev_id)) |
| 546 | return -EINVAL; |
| 547 | |
| 548 | action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL); |
| 549 | if (!action) |
| 550 | return -ENOMEM; |
| 551 | |
| 552 | action->handler = handler; |
| 553 | action->flags = irq_flags; |
| 554 | cpus_clear(action->mask); |
| 555 | action->name = devname; |
| 556 | action->next = NULL; |
| 557 | action->dev_id = dev_id; |
| 558 | |
| 559 | retval = setup_irq(irq, action); |
| 560 | |
| 561 | if (retval) |
| 562 | kfree(action); |
| 563 | return retval; |
| 564 | } |
| 565 | |
| 566 | EXPORT_SYMBOL(request_irq); |
| 567 | |
| 568 | /** |
| 569 | * free_irq - free an interrupt |
| 570 | * @irq: Interrupt line to free |
| 571 | * @dev_id: Device identity to free |
| 572 | * |
| 573 | * Remove an interrupt handler. The handler is removed and if the |
| 574 | * interrupt line is no longer in use by any driver it is disabled. |
| 575 | * On a shared IRQ the caller must ensure the interrupt is disabled |
| 576 | * on the card it drives before calling this function. |
| 577 | * |
| 578 | * This function may be called from interrupt context. |
| 579 | */ |
| 580 | void free_irq(unsigned int irq, void *dev_id) |
| 581 | { |
| 582 | struct irqaction * action, **p; |
| 583 | unsigned long flags; |
| 584 | |
| 585 | if (irq >= NR_IRQS || !irq_desc[irq].valid) { |
| 586 | printk(KERN_ERR "Trying to free IRQ%d\n",irq); |
| 587 | #ifdef CONFIG_DEBUG_ERRORS |
| 588 | __backtrace(); |
| 589 | #endif |
| 590 | return; |
| 591 | } |
| 592 | |
| 593 | spin_lock_irqsave(&irq_controller_lock, flags); |
| 594 | for (p = &irq_desc[irq].action; (action = *p) != NULL; p = &action->next) { |
| 595 | if (action->dev_id != dev_id) |
| 596 | continue; |
| 597 | |
| 598 | /* Found it - now free it */ |
| 599 | *p = action->next; |
| 600 | kfree(action); |
| 601 | goto out; |
| 602 | } |
| 603 | printk(KERN_ERR "Trying to free free IRQ%d\n",irq); |
| 604 | #ifdef CONFIG_DEBUG_ERRORS |
| 605 | __backtrace(); |
| 606 | #endif |
| 607 | out: |
| 608 | spin_unlock_irqrestore(&irq_controller_lock, flags); |
| 609 | } |
| 610 | |
| 611 | EXPORT_SYMBOL(free_irq); |
| 612 | |
| 613 | /* Start the interrupt probing. Unlike other architectures, |
| 614 | * we don't return a mask of interrupts from probe_irq_on, |
| 615 | * but return the number of interrupts enabled for the probe. |
| 616 | * The interrupts which have been enabled for probing is |
| 617 | * instead recorded in the irq_desc structure. |
| 618 | */ |
| 619 | unsigned long probe_irq_on(void) |
| 620 | { |
| 621 | unsigned int i, irqs = 0; |
| 622 | unsigned long delay; |
| 623 | |
| 624 | /* |
| 625 | * first snaffle up any unassigned but |
| 626 | * probe-able interrupts |
| 627 | */ |
| 628 | spin_lock_irq(&irq_controller_lock); |
| 629 | for (i = 0; i < NR_IRQS; i++) { |
| 630 | if (!irq_desc[i].probe_ok || irq_desc[i].action) |
| 631 | continue; |
| 632 | |
| 633 | irq_desc[i].probing = 1; |
| 634 | irq_desc[i].triggered = 0; |
| 635 | if (irq_desc[i].chip->type) |
| 636 | irq_desc[i].chip->type(i, IRQT_PROBE); |
| 637 | irq_desc[i].chip->unmask(i); |
| 638 | irqs += 1; |
| 639 | } |
| 640 | spin_unlock_irq(&irq_controller_lock); |
| 641 | |
| 642 | /* |
| 643 | * wait for spurious interrupts to mask themselves out again |
| 644 | */ |
| 645 | for (delay = jiffies + HZ/10; time_before(jiffies, delay); ) |
| 646 | /* min 100ms delay */; |
| 647 | |
| 648 | /* |
| 649 | * now filter out any obviously spurious interrupts |
| 650 | */ |
| 651 | spin_lock_irq(&irq_controller_lock); |
| 652 | for (i = 0; i < NR_IRQS; i++) { |
| 653 | if (irq_desc[i].probing && irq_desc[i].triggered) { |
| 654 | irq_desc[i].probing = 0; |
| 655 | irqs -= 1; |
| 656 | } |
| 657 | } |
| 658 | spin_unlock_irq(&irq_controller_lock); |
| 659 | |
| 660 | return irqs; |
| 661 | } |
| 662 | |
| 663 | EXPORT_SYMBOL(probe_irq_on); |
| 664 | |
| 665 | /* |
| 666 | * Possible return values: |
| 667 | * >= 0 - interrupt number |
| 668 | * -1 - no interrupt/many interrupts |
| 669 | */ |
| 670 | int probe_irq_off(unsigned long irqs) |
| 671 | { |
| 672 | unsigned int i; |
| 673 | int irq_found = NO_IRQ; |
| 674 | |
| 675 | /* |
| 676 | * look at the interrupts, and find exactly one |
| 677 | * that we were probing has been triggered |
| 678 | */ |
| 679 | spin_lock_irq(&irq_controller_lock); |
| 680 | for (i = 0; i < NR_IRQS; i++) { |
| 681 | if (irq_desc[i].probing && |
| 682 | irq_desc[i].triggered) { |
| 683 | if (irq_found != NO_IRQ) { |
| 684 | irq_found = NO_IRQ; |
| 685 | goto out; |
| 686 | } |
| 687 | irq_found = i; |
| 688 | } |
| 689 | } |
| 690 | |
| 691 | if (irq_found == -1) |
| 692 | irq_found = NO_IRQ; |
| 693 | out: |
| 694 | spin_unlock_irq(&irq_controller_lock); |
| 695 | |
| 696 | return irq_found; |
| 697 | } |
| 698 | |
| 699 | EXPORT_SYMBOL(probe_irq_off); |
| 700 | |
| 701 | void __init init_irq_proc(void) |
| 702 | { |
| 703 | } |
| 704 | |
| 705 | void __init init_IRQ(void) |
| 706 | { |
| 707 | struct irqdesc *desc; |
| 708 | extern void init_dma(void); |
| 709 | int irq; |
| 710 | |
| 711 | for (irq = 0, desc = irq_desc; irq < NR_IRQS; irq++, desc++) |
| 712 | *desc = bad_irq_desc; |
| 713 | |
| 714 | arc_init_irq(); |
| 715 | init_dma(); |
| 716 | } |