blob: fbbdd5ca5720703353f0ef94c218c2b77aa761b0 [file] [log] [blame]
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +00001/*
2 * ps3vram - Use extra PS3 video ram as MTD block device.
3 *
4 * Copyright 2009 Sony Corporation
5 *
6 * Based on the MTD ps3vram driver, which is
7 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
8 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
9 */
10
11#include <linux/blkdev.h>
12#include <linux/delay.h>
13#include <linux/proc_fs.h>
14#include <linux/seq_file.h>
15
16#include <asm/firmware.h>
Geert Uytterhoeven56ac72d2009-06-10 04:38:47 +000017#include <asm/iommu.h>
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +000018#include <asm/lv1call.h>
19#include <asm/ps3.h>
Geert Uytterhoevend3352c92009-06-10 04:38:48 +000020#include <asm/ps3gpu.h>
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +000021
22
23#define DEVICE_NAME "ps3vram"
24
25
26#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
27#define XDR_IOIF 0x0c000000
28
29#define FIFO_BASE XDR_IOIF
30#define FIFO_SIZE (64 * 1024)
31
32#define DMA_PAGE_SIZE (4 * 1024)
33
34#define CACHE_PAGE_SIZE (256 * 1024)
35#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
36
37#define CACHE_OFFSET CACHE_PAGE_SIZE
38#define FIFO_OFFSET 0
39
40#define CTRL_PUT 0x10
41#define CTRL_GET 0x11
42#define CTRL_TOP 0x15
43
44#define UPLOAD_SUBCH 1
45#define DOWNLOAD_SUBCH 2
46
47#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
48#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
49
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +000050#define CACHE_PAGE_PRESENT 1
51#define CACHE_PAGE_DIRTY 2
52
53struct ps3vram_tag {
54 unsigned int address;
55 unsigned int flags;
56};
57
58struct ps3vram_cache {
59 unsigned int page_count;
60 unsigned int page_size;
61 struct ps3vram_tag *tags;
62 unsigned int hit;
63 unsigned int miss;
64};
65
66struct ps3vram_priv {
67 struct request_queue *queue;
68 struct gendisk *gendisk;
69
70 u64 size;
71
72 u64 memory_handle;
73 u64 context_handle;
74 u32 *ctrl;
Geert Uytterhoeven1bd97842009-06-10 04:38:51 +000075 void *reports;
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +000076 u8 *xdr_buf;
77
78 u32 *fifo_base;
79 u32 *fifo_ptr;
80
81 struct ps3vram_cache cache;
82
Geert Uytterhoevenfb89e892009-06-10 04:38:41 +000083 spinlock_t lock; /* protecting list of bios */
84 struct bio_list list;
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +000085};
86
87
88static int ps3vram_major;
89
90
91static struct block_device_operations ps3vram_fops = {
92 .owner = THIS_MODULE,
93};
94
95
96#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
97#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
98#define DMA_NOTIFIER_SIZE 0x40
99#define NOTIFIER 7 /* notifier used for completion report */
100
101static char *size = "256M";
102module_param(size, charp, 0);
103MODULE_PARM_DESC(size, "memory size");
104
Geert Uytterhoeven1bd97842009-06-10 04:38:51 +0000105static u32 *ps3vram_get_notifier(void *reports, int notifier)
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000106{
Geert Uytterhoeven1bd97842009-06-10 04:38:51 +0000107 return reports + DMA_NOTIFIER_OFFSET_BASE +
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000108 DMA_NOTIFIER_SIZE * notifier;
109}
110
111static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev)
112{
113 struct ps3vram_priv *priv = dev->core.driver_data;
114 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
115 int i;
116
117 for (i = 0; i < 4; i++)
118 notify[i] = 0xffffffff;
119}
120
121static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev,
122 unsigned int timeout_ms)
123{
124 struct ps3vram_priv *priv = dev->core.driver_data;
125 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
126 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
127
128 do {
129 if (!notify[3])
130 return 0;
131 msleep(1);
132 } while (time_before(jiffies, timeout));
133
134 return -ETIMEDOUT;
135}
136
137static void ps3vram_init_ring(struct ps3_system_bus_device *dev)
138{
139 struct ps3vram_priv *priv = dev->core.driver_data;
140
141 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
142 priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET;
143}
144
145static int ps3vram_wait_ring(struct ps3_system_bus_device *dev,
146 unsigned int timeout_ms)
147{
148 struct ps3vram_priv *priv = dev->core.driver_data;
149 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
150
151 do {
152 if (priv->ctrl[CTRL_PUT] == priv->ctrl[CTRL_GET])
153 return 0;
154 msleep(1);
155 } while (time_before(jiffies, timeout));
156
157 dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n",
158 priv->ctrl[CTRL_PUT], priv->ctrl[CTRL_GET],
159 priv->ctrl[CTRL_TOP]);
160
161 return -ETIMEDOUT;
162}
163
164static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
165{
166 *(priv->fifo_ptr)++ = data;
167}
168
169static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag,
170 u32 size)
171{
172 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
173}
174
175static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev)
176{
177 struct ps3vram_priv *priv = dev->core.driver_data;
178 int status;
179
180 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
181
182 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
183
184 /* asking the HV for a blit will kick the FIFO */
Geert Uytterhoevend3352c92009-06-10 04:38:48 +0000185 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000186 if (status)
Geert Uytterhoevend3352c92009-06-10 04:38:48 +0000187 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
188 __func__, status);
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000189
190 priv->fifo_ptr = priv->fifo_base;
191}
192
193static void ps3vram_fire_ring(struct ps3_system_bus_device *dev)
194{
195 struct ps3vram_priv *priv = dev->core.driver_data;
196 int status;
197
198 mutex_lock(&ps3_gpu_mutex);
199
200 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET +
201 (priv->fifo_ptr - priv->fifo_base) * sizeof(u32);
202
203 /* asking the HV for a blit will kick the FIFO */
Geert Uytterhoevend3352c92009-06-10 04:38:48 +0000204 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000205 if (status)
Geert Uytterhoevend3352c92009-06-10 04:38:48 +0000206 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
207 __func__, status);
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000208
209 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
210 FIFO_SIZE - 1024) {
211 dev_dbg(&dev->core, "FIFO full, rewinding\n");
212 ps3vram_wait_ring(dev, 200);
213 ps3vram_rewind_ring(dev);
214 }
215
216 mutex_unlock(&ps3_gpu_mutex);
217}
218
219static void ps3vram_bind(struct ps3_system_bus_device *dev)
220{
221 struct ps3vram_priv *priv = dev->core.driver_data;
222
223 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
224 ps3vram_out_ring(priv, 0x31337303);
225 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
226 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
227 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
228 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
229
230 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
231 ps3vram_out_ring(priv, 0x3137c0de);
232 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
233 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
234 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
235 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
236
237 ps3vram_fire_ring(dev);
238}
239
240static int ps3vram_upload(struct ps3_system_bus_device *dev,
241 unsigned int src_offset, unsigned int dst_offset,
242 int len, int count)
243{
244 struct ps3vram_priv *priv = dev->core.driver_data;
245
246 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
247 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
248 ps3vram_out_ring(priv, XDR_IOIF + src_offset);
249 ps3vram_out_ring(priv, dst_offset);
250 ps3vram_out_ring(priv, len);
251 ps3vram_out_ring(priv, len);
252 ps3vram_out_ring(priv, len);
253 ps3vram_out_ring(priv, count);
254 ps3vram_out_ring(priv, (1 << 8) | 1);
255 ps3vram_out_ring(priv, 0);
256
257 ps3vram_notifier_reset(dev);
258 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
259 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
260 ps3vram_out_ring(priv, 0);
261 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
262 ps3vram_out_ring(priv, 0);
263 ps3vram_fire_ring(dev);
264 if (ps3vram_notifier_wait(dev, 200) < 0) {
265 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
266 return -1;
267 }
268
269 return 0;
270}
271
272static int ps3vram_download(struct ps3_system_bus_device *dev,
273 unsigned int src_offset, unsigned int dst_offset,
274 int len, int count)
275{
276 struct ps3vram_priv *priv = dev->core.driver_data;
277
278 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
279 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
280 ps3vram_out_ring(priv, src_offset);
281 ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
282 ps3vram_out_ring(priv, len);
283 ps3vram_out_ring(priv, len);
284 ps3vram_out_ring(priv, len);
285 ps3vram_out_ring(priv, count);
286 ps3vram_out_ring(priv, (1 << 8) | 1);
287 ps3vram_out_ring(priv, 0);
288
289 ps3vram_notifier_reset(dev);
290 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
291 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
292 ps3vram_out_ring(priv, 0);
293 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
294 ps3vram_out_ring(priv, 0);
295 ps3vram_fire_ring(dev);
296 if (ps3vram_notifier_wait(dev, 200) < 0) {
297 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
298 return -1;
299 }
300
301 return 0;
302}
303
304static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry)
305{
306 struct ps3vram_priv *priv = dev->core.driver_data;
307 struct ps3vram_cache *cache = &priv->cache;
308
309 if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY))
310 return;
311
312 dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry,
313 cache->tags[entry].address);
314 if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size,
315 cache->tags[entry].address, DMA_PAGE_SIZE,
316 cache->page_size / DMA_PAGE_SIZE) < 0) {
317 dev_err(&dev->core,
318 "Failed to upload from 0x%x to " "0x%x size 0x%x\n",
319 entry * cache->page_size, cache->tags[entry].address,
320 cache->page_size);
321 }
322 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
323}
324
325static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry,
326 unsigned int address)
327{
328 struct ps3vram_priv *priv = dev->core.driver_data;
329 struct ps3vram_cache *cache = &priv->cache;
330
331 dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address);
332 if (ps3vram_download(dev, address,
333 CACHE_OFFSET + entry * cache->page_size,
334 DMA_PAGE_SIZE,
335 cache->page_size / DMA_PAGE_SIZE) < 0) {
336 dev_err(&dev->core,
337 "Failed to download from 0x%x to 0x%x size 0x%x\n",
338 address, entry * cache->page_size, cache->page_size);
339 }
340
341 cache->tags[entry].address = address;
342 cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
343}
344
345
346static void ps3vram_cache_flush(struct ps3_system_bus_device *dev)
347{
348 struct ps3vram_priv *priv = dev->core.driver_data;
349 struct ps3vram_cache *cache = &priv->cache;
350 int i;
351
352 dev_dbg(&dev->core, "FLUSH\n");
353 for (i = 0; i < cache->page_count; i++) {
354 ps3vram_cache_evict(dev, i);
355 cache->tags[i].flags = 0;
356 }
357}
358
359static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev,
360 loff_t address)
361{
362 struct ps3vram_priv *priv = dev->core.driver_data;
363 struct ps3vram_cache *cache = &priv->cache;
364 unsigned int base;
365 unsigned int offset;
366 int i;
367 static int counter;
368
369 offset = (unsigned int) (address & (cache->page_size - 1));
370 base = (unsigned int) (address - offset);
371
372 /* fully associative check */
373 for (i = 0; i < cache->page_count; i++) {
374 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
375 cache->tags[i].address == base) {
376 cache->hit++;
377 dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i,
378 cache->tags[i].address);
379 return i;
380 }
381 }
382
383 /* choose a random entry */
384 i = (jiffies + (counter++)) % cache->page_count;
385 dev_dbg(&dev->core, "Using entry %d\n", i);
386
387 ps3vram_cache_evict(dev, i);
388 ps3vram_cache_load(dev, i, base);
389
390 cache->miss++;
391 return i;
392}
393
394static int ps3vram_cache_init(struct ps3_system_bus_device *dev)
395{
396 struct ps3vram_priv *priv = dev->core.driver_data;
397
398 priv->cache.page_count = CACHE_PAGE_COUNT;
399 priv->cache.page_size = CACHE_PAGE_SIZE;
400 priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) *
401 CACHE_PAGE_COUNT, GFP_KERNEL);
402 if (priv->cache.tags == NULL) {
403 dev_err(&dev->core, "Could not allocate cache tags\n");
404 return -ENOMEM;
405 }
406
407 dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n",
408 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
409
410 return 0;
411}
412
413static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev)
414{
415 struct ps3vram_priv *priv = dev->core.driver_data;
416
417 ps3vram_cache_flush(dev);
418 kfree(priv->cache.tags);
419}
420
421static int ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
422 size_t len, size_t *retlen, u_char *buf)
423{
424 struct ps3vram_priv *priv = dev->core.driver_data;
425 unsigned int cached, count;
426
427 dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__,
428 (unsigned int)from, len);
429
430 if (from >= priv->size)
431 return -EIO;
432
433 if (len > priv->size - from)
434 len = priv->size - from;
435
436 /* Copy from vram to buf */
437 count = len;
438 while (count) {
439 unsigned int offset, avail;
440 unsigned int entry;
441
442 offset = (unsigned int) (from & (priv->cache.page_size - 1));
443 avail = priv->cache.page_size - offset;
444
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000445 entry = ps3vram_cache_match(dev, from);
446 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
447
448 dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x "
449 "avail=%08x count=%08x\n", __func__,
450 (unsigned int)from, cached, offset, avail, count);
451
452 if (avail > count)
453 avail = count;
454 memcpy(buf, priv->xdr_buf + cached, avail);
455
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000456 buf += avail;
457 count -= avail;
458 from += avail;
459 }
460
461 *retlen = len;
462 return 0;
463}
464
465static int ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
466 size_t len, size_t *retlen, const u_char *buf)
467{
468 struct ps3vram_priv *priv = dev->core.driver_data;
469 unsigned int cached, count;
470
471 if (to >= priv->size)
472 return -EIO;
473
474 if (len > priv->size - to)
475 len = priv->size - to;
476
477 /* Copy from buf to vram */
478 count = len;
479 while (count) {
480 unsigned int offset, avail;
481 unsigned int entry;
482
483 offset = (unsigned int) (to & (priv->cache.page_size - 1));
484 avail = priv->cache.page_size - offset;
485
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000486 entry = ps3vram_cache_match(dev, to);
487 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
488
489 dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x "
490 "avail=%08x count=%08x\n", __func__, (unsigned int)to,
491 cached, offset, avail, count);
492
493 if (avail > count)
494 avail = count;
495 memcpy(priv->xdr_buf + cached, buf, avail);
496
497 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
498
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000499 buf += avail;
500 count -= avail;
501 to += avail;
502 }
503
504 *retlen = len;
505 return 0;
506}
507
508static int ps3vram_proc_show(struct seq_file *m, void *v)
509{
510 struct ps3vram_priv *priv = m->private;
511
512 seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss);
513 return 0;
514}
515
516static int ps3vram_proc_open(struct inode *inode, struct file *file)
517{
518 return single_open(file, ps3vram_proc_show, PDE(inode)->data);
519}
520
521static const struct file_operations ps3vram_proc_fops = {
522 .owner = THIS_MODULE,
523 .open = ps3vram_proc_open,
524 .read = seq_read,
525 .llseek = seq_lseek,
526 .release = single_release,
527};
528
529static void __devinit ps3vram_proc_init(struct ps3_system_bus_device *dev)
530{
531 struct ps3vram_priv *priv = dev->core.driver_data;
532 struct proc_dir_entry *pde;
533
Geert Uytterhoeven3c20e2f22009-06-10 04:38:38 +0000534 pde = proc_create_data(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops,
535 priv);
536 if (!pde)
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000537 dev_warn(&dev->core, "failed to create /proc entry\n");
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000538}
539
Geert Uytterhoevenfb89e892009-06-10 04:38:41 +0000540static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev,
541 struct bio *bio)
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000542{
Geert Uytterhoevenfb89e892009-06-10 04:38:41 +0000543 struct ps3vram_priv *priv = dev->core.driver_data;
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000544 int write = bio_data_dir(bio) == WRITE;
545 const char *op = write ? "write" : "read";
546 loff_t offset = bio->bi_sector << 9;
547 int error = 0;
548 struct bio_vec *bvec;
549 unsigned int i;
Geert Uytterhoevenfb89e892009-06-10 04:38:41 +0000550 struct bio *next;
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000551
552 bio_for_each_segment(bvec, bio, i) {
553 /* PS3 is ppc64, so we don't handle highmem */
554 char *ptr = page_address(bvec->bv_page) + bvec->bv_offset;
555 size_t len = bvec->bv_len, retlen;
556
557 dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op,
558 len, offset);
559 if (write)
560 error = ps3vram_write(dev, offset, len, &retlen, ptr);
561 else
562 error = ps3vram_read(dev, offset, len, &retlen, ptr);
563
564 if (error) {
565 dev_err(&dev->core, "%s failed\n", op);
566 goto out;
567 }
568
569 if (retlen != len) {
570 dev_err(&dev->core, "Short %s\n", op);
Geert Uytterhoeven734957c82009-06-10 04:38:37 +0000571 error = -EIO;
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000572 goto out;
573 }
574
575 offset += len;
576 }
577
578 dev_dbg(&dev->core, "%s completed\n", op);
579
580out:
Geert Uytterhoevenfb89e892009-06-10 04:38:41 +0000581 spin_lock_irq(&priv->lock);
582 bio_list_pop(&priv->list);
583 next = bio_list_peek(&priv->list);
584 spin_unlock_irq(&priv->lock);
585
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000586 bio_endio(bio, error);
Geert Uytterhoevenfb89e892009-06-10 04:38:41 +0000587 return next;
588}
589
590static int ps3vram_make_request(struct request_queue *q, struct bio *bio)
591{
592 struct ps3_system_bus_device *dev = q->queuedata;
593 struct ps3vram_priv *priv = dev->core.driver_data;
594 int busy;
595
596 dev_dbg(&dev->core, "%s\n", __func__);
597
598 spin_lock_irq(&priv->lock);
599 busy = !bio_list_empty(&priv->list);
600 bio_list_add(&priv->list, bio);
601 spin_unlock_irq(&priv->lock);
602
603 if (busy)
604 return 0;
605
606 do {
607 bio = ps3vram_do_bio(dev, bio);
608 } while (bio);
609
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000610 return 0;
611}
612
613static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
614{
615 struct ps3vram_priv *priv;
616 int error, status;
617 struct request_queue *queue;
618 struct gendisk *gendisk;
Geert Uytterhoeven56ac72d2009-06-10 04:38:47 +0000619 u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar,
620 reports_size, xdr_lpar;
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000621 char *rest;
622
623 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
624 if (!priv) {
625 error = -ENOMEM;
626 goto fail;
627 }
628
Geert Uytterhoevenfb89e892009-06-10 04:38:41 +0000629 spin_lock_init(&priv->lock);
630 bio_list_init(&priv->list);
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000631 dev->core.driver_data = priv;
632
633 priv = dev->core.driver_data;
634
635 /* Allocate XDR buffer (1MiB aligned) */
636 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
637 get_order(XDR_BUF_SIZE));
638 if (priv->xdr_buf == NULL) {
639 dev_err(&dev->core, "Could not allocate XDR buffer\n");
640 error = -ENOMEM;
641 goto fail_free_priv;
642 }
643
644 /* Put FIFO at begginning of XDR buffer */
645 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
646 priv->fifo_ptr = priv->fifo_base;
647
648 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
649 if (ps3_open_hv_device(dev)) {
650 dev_err(&dev->core, "ps3_open_hv_device failed\n");
651 error = -EAGAIN;
Jim Paris3273d872009-06-10 04:38:39 +0000652 goto out_free_xdr_buf;
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000653 }
654
655 /* Request memory */
656 status = -1;
657 ddr_size = ALIGN(memparse(size, &rest), 1024*1024);
658 if (!ddr_size) {
659 dev_err(&dev->core, "Specified size is too small\n");
660 error = -EINVAL;
661 goto out_close_gpu;
662 }
663
664 while (ddr_size > 0) {
665 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
666 &priv->memory_handle,
667 &ddr_lpar);
668 if (!status)
669 break;
670 ddr_size -= 1024*1024;
671 }
672 if (status) {
673 dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n",
674 status);
675 error = -ENOMEM;
Jim Paris3273d872009-06-10 04:38:39 +0000676 goto out_close_gpu;
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000677 }
678
679 /* Request context */
680 status = lv1_gpu_context_allocate(priv->memory_handle, 0,
681 &priv->context_handle, &ctrl_lpar,
682 &info_lpar, &reports_lpar,
683 &reports_size);
684 if (status) {
685 dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n",
686 status);
687 error = -ENOMEM;
688 goto out_free_memory;
689 }
690
691 /* Map XDR buffer to RSX */
Geert Uytterhoeven56ac72d2009-06-10 04:38:47 +0000692 xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf));
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000693 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
Geert Uytterhoeven56ac72d2009-06-10 04:38:47 +0000694 xdr_lpar, XDR_BUF_SIZE,
695 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R |
696 CBE_IOPTE_M);
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000697 if (status) {
698 dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n",
699 status);
700 error = -ENOMEM;
701 goto out_free_context;
702 }
703
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000704 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
705 if (!priv->ctrl) {
706 dev_err(&dev->core, "ioremap CTRL failed\n");
707 error = -ENOMEM;
Geert Uytterhoevenc3b94fd2009-06-10 04:38:50 +0000708 goto out_unmap_context;
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000709 }
710
711 priv->reports = ioremap(reports_lpar, reports_size);
712 if (!priv->reports) {
713 dev_err(&dev->core, "ioremap REPORTS failed\n");
714 error = -ENOMEM;
715 goto out_unmap_ctrl;
716 }
717
718 mutex_lock(&ps3_gpu_mutex);
719 ps3vram_init_ring(dev);
720 mutex_unlock(&ps3_gpu_mutex);
721
722 priv->size = ddr_size;
723
724 ps3vram_bind(dev);
725
726 mutex_lock(&ps3_gpu_mutex);
727 error = ps3vram_wait_ring(dev, 100);
728 mutex_unlock(&ps3_gpu_mutex);
729 if (error < 0) {
730 dev_err(&dev->core, "Failed to initialize channels\n");
731 error = -ETIMEDOUT;
732 goto out_unmap_reports;
733 }
734
735 ps3vram_cache_init(dev);
736 ps3vram_proc_init(dev);
737
738 queue = blk_alloc_queue(GFP_KERNEL);
739 if (!queue) {
740 dev_err(&dev->core, "blk_alloc_queue failed\n");
741 error = -ENOMEM;
742 goto out_cache_cleanup;
743 }
744
745 priv->queue = queue;
746 queue->queuedata = dev;
747 blk_queue_make_request(queue, ps3vram_make_request);
748 blk_queue_max_phys_segments(queue, MAX_PHYS_SEGMENTS);
749 blk_queue_max_hw_segments(queue, MAX_HW_SEGMENTS);
750 blk_queue_max_segment_size(queue, MAX_SEGMENT_SIZE);
751 blk_queue_max_sectors(queue, SAFE_MAX_SECTORS);
752
753 gendisk = alloc_disk(1);
754 if (!gendisk) {
755 dev_err(&dev->core, "alloc_disk failed\n");
756 error = -ENOMEM;
757 goto fail_cleanup_queue;
758 }
759
760 priv->gendisk = gendisk;
761 gendisk->major = ps3vram_major;
762 gendisk->first_minor = 0;
763 gendisk->fops = &ps3vram_fops;
764 gendisk->queue = queue;
765 gendisk->private_data = dev;
766 gendisk->driverfs_dev = &dev->core;
767 strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name));
768 set_capacity(gendisk, priv->size >> 9);
769
770 dev_info(&dev->core, "%s: Using %lu MiB of GPU memory\n",
771 gendisk->disk_name, get_capacity(gendisk) >> 11);
772
773 add_disk(gendisk);
774 return 0;
775
776fail_cleanup_queue:
777 blk_cleanup_queue(queue);
778out_cache_cleanup:
779 remove_proc_entry(DEVICE_NAME, NULL);
780 ps3vram_cache_cleanup(dev);
781out_unmap_reports:
782 iounmap(priv->reports);
783out_unmap_ctrl:
784 iounmap(priv->ctrl);
Geert Uytterhoeven56ac72d2009-06-10 04:38:47 +0000785out_unmap_context:
786 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar,
787 XDR_BUF_SIZE, CBE_IOPTE_M);
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000788out_free_context:
789 lv1_gpu_context_free(priv->context_handle);
790out_free_memory:
791 lv1_gpu_memory_free(priv->memory_handle);
792out_close_gpu:
793 ps3_close_hv_device(dev);
794out_free_xdr_buf:
795 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
796fail_free_priv:
797 kfree(priv);
798 dev->core.driver_data = NULL;
799fail:
800 return error;
801}
802
803static int ps3vram_remove(struct ps3_system_bus_device *dev)
804{
805 struct ps3vram_priv *priv = dev->core.driver_data;
806
807 del_gendisk(priv->gendisk);
808 put_disk(priv->gendisk);
809 blk_cleanup_queue(priv->queue);
810 remove_proc_entry(DEVICE_NAME, NULL);
811 ps3vram_cache_cleanup(dev);
812 iounmap(priv->reports);
813 iounmap(priv->ctrl);
Geert Uytterhoeven56ac72d2009-06-10 04:38:47 +0000814 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
815 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
816 XDR_BUF_SIZE, CBE_IOPTE_M);
Geert Uytterhoevenf507cd22009-03-06 02:54:09 +0000817 lv1_gpu_context_free(priv->context_handle);
818 lv1_gpu_memory_free(priv->memory_handle);
819 ps3_close_hv_device(dev);
820 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
821 kfree(priv);
822 dev->core.driver_data = NULL;
823 return 0;
824}
825
826static struct ps3_system_bus_driver ps3vram = {
827 .match_id = PS3_MATCH_ID_GPU,
828 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
829 .core.name = DEVICE_NAME,
830 .core.owner = THIS_MODULE,
831 .probe = ps3vram_probe,
832 .remove = ps3vram_remove,
833 .shutdown = ps3vram_remove,
834};
835
836
837static int __init ps3vram_init(void)
838{
839 int error;
840
841 if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
842 return -ENODEV;
843
844 error = register_blkdev(0, DEVICE_NAME);
845 if (error <= 0) {
846 pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error);
847 return error;
848 }
849 ps3vram_major = error;
850
851 pr_info("%s: registered block device major %d\n", DEVICE_NAME,
852 ps3vram_major);
853
854 error = ps3_system_bus_driver_register(&ps3vram);
855 if (error)
856 unregister_blkdev(ps3vram_major, DEVICE_NAME);
857
858 return error;
859}
860
861static void __exit ps3vram_exit(void)
862{
863 ps3_system_bus_driver_unregister(&ps3vram);
864 unregister_blkdev(ps3vram_major, DEVICE_NAME);
865}
866
867module_init(ps3vram_init);
868module_exit(ps3vram_exit);
869
870MODULE_LICENSE("GPL");
871MODULE_DESCRIPTION("PS3 Video RAM Storage Driver");
872MODULE_AUTHOR("Sony Corporation");
873MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);