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Andrew Lunn5f857572019-01-21 19:10:19 +01001// SPDX-License-Identifier: GPL-2.0
Andrew F. Davis34e45ad2015-10-20 16:28:57 -05002/*
3 * Driver for the Texas Instruments DP83848 PHY
4 *
Andrew F. Davis2f678642016-02-07 11:47:17 -06005 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
Andrew F. Davis34e45ad2015-10-20 16:28:57 -05006 */
7
8#include <linux/module.h>
9#include <linux/phy.h>
10
Andrew F. Davis68336292016-02-07 11:47:18 -060011#define TI_DP83848C_PHY_ID 0x20005ca0
Alvaro G. M93b43fd2017-01-17 09:08:16 +010012#define TI_DP83620_PHY_ID 0x20005ce0
Andrew F. Davis68336292016-02-07 11:47:18 -060013#define NS_DP83848C_PHY_ID 0x20005c90
Andrew F. Davisd1782f72016-02-07 11:47:20 -060014#define TLK10X_PHY_ID 0x2000a210
Andrew F. Davis34e45ad2015-10-20 16:28:57 -050015
16/* Registers */
Andrew F. Davis5fed0392016-02-07 11:47:21 -060017#define DP83848_MICR 0x11 /* MII Interrupt Control Register */
18#define DP83848_MISR 0x12 /* MII Interrupt Status Register */
Andrew F. Davis34e45ad2015-10-20 16:28:57 -050019
20/* MICR Register Fields */
21#define DP83848_MICR_INT_OE BIT(0) /* Interrupt Output Enable */
22#define DP83848_MICR_INTEN BIT(1) /* Interrupt Enable */
23
24/* MISR Register Fields */
25#define DP83848_MISR_RHF_INT_EN BIT(0) /* Receive Error Counter */
26#define DP83848_MISR_FHF_INT_EN BIT(1) /* False Carrier Counter */
27#define DP83848_MISR_ANC_INT_EN BIT(2) /* Auto-negotiation complete */
28#define DP83848_MISR_DUP_INT_EN BIT(3) /* Duplex Status */
29#define DP83848_MISR_SPD_INT_EN BIT(4) /* Speed status */
30#define DP83848_MISR_LINK_INT_EN BIT(5) /* Link status */
31#define DP83848_MISR_ED_INT_EN BIT(6) /* Energy detect */
32#define DP83848_MISR_LQM_INT_EN BIT(7) /* Link Quality Monitor */
33
Andrew F. Daviscf13be52016-02-07 11:47:19 -060034#define DP83848_INT_EN_MASK \
35 (DP83848_MISR_ANC_INT_EN | \
36 DP83848_MISR_DUP_INT_EN | \
37 DP83848_MISR_SPD_INT_EN | \
38 DP83848_MISR_LINK_INT_EN)
39
Andrew F. Davis34e45ad2015-10-20 16:28:57 -050040static int dp83848_ack_interrupt(struct phy_device *phydev)
41{
42 int err = phy_read(phydev, DP83848_MISR);
43
44 return err < 0 ? err : 0;
45}
46
47static int dp83848_config_intr(struct phy_device *phydev)
48{
Andrew F. Daviscf13be52016-02-07 11:47:19 -060049 int control, ret;
50
51 control = phy_read(phydev, DP83848_MICR);
52 if (control < 0)
53 return control;
Andrew F. Davis34e45ad2015-10-20 16:28:57 -050054
55 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
Andrew F. Daviscf13be52016-02-07 11:47:19 -060056 control |= DP83848_MICR_INT_OE;
57 control |= DP83848_MICR_INTEN;
Andrew F. Davis34e45ad2015-10-20 16:28:57 -050058
Andrew F. Daviscf13be52016-02-07 11:47:19 -060059 ret = phy_write(phydev, DP83848_MISR, DP83848_INT_EN_MASK);
60 if (ret < 0)
61 return ret;
62 } else {
63 control &= ~DP83848_MICR_INTEN;
Andrew F. Davis34e45ad2015-10-20 16:28:57 -050064 }
65
Andrew F. Daviscf13be52016-02-07 11:47:19 -060066 return phy_write(phydev, DP83848_MICR, control);
Andrew F. Davis34e45ad2015-10-20 16:28:57 -050067}
68
Alvaro Gamez Machadob718e8c2018-06-08 12:23:39 +020069static int dp83848_config_init(struct phy_device *phydev)
70{
Alvaro Gamez Machadob718e8c2018-06-08 12:23:39 +020071 int val;
72
Alvaro Gamez Machadob718e8c2018-06-08 12:23:39 +020073 /* DP83620 always reports Auto Negotiation Ability on BMSR. Instead,
74 * we check initial value of BMCR Auto negotiation enable bit
75 */
76 val = phy_read(phydev, MII_BMCR);
77 if (!(val & BMCR_ANENABLE))
78 phydev->autoneg = AUTONEG_DISABLE;
79
80 return 0;
81}
82
Andrew F. Davis34e45ad2015-10-20 16:28:57 -050083static struct mdio_device_id __maybe_unused dp83848_tbl[] = {
Andrew F. Davis68336292016-02-07 11:47:18 -060084 { TI_DP83848C_PHY_ID, 0xfffffff0 },
85 { NS_DP83848C_PHY_ID, 0xfffffff0 },
Alvaro G. M93b43fd2017-01-17 09:08:16 +010086 { TI_DP83620_PHY_ID, 0xfffffff0 },
Andrew F. Davisd1782f72016-02-07 11:47:20 -060087 { TLK10X_PHY_ID, 0xfffffff0 },
Andrew F. Davis34e45ad2015-10-20 16:28:57 -050088 { }
89};
90MODULE_DEVICE_TABLE(mdio, dp83848_tbl);
91
Alvaro Gamez Machadob718e8c2018-06-08 12:23:39 +020092#define DP83848_PHY_DRIVER(_id, _name, _config_init) \
Andrew F. Davis2f678642016-02-07 11:47:17 -060093 { \
94 .phy_id = _id, \
95 .phy_id_mask = 0xfffffff0, \
96 .name = _name, \
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +020097 /* PHY_BASIC_FEATURES */ \
Andrew F. Davis2f678642016-02-07 11:47:17 -060098 \
99 .soft_reset = genphy_soft_reset, \
Alvaro Gamez Machadob718e8c2018-06-08 12:23:39 +0200100 .config_init = _config_init, \
Andrew F. Davis2f678642016-02-07 11:47:17 -0600101 .suspend = genphy_suspend, \
102 .resume = genphy_resume, \
Andrew F. Davis2f678642016-02-07 11:47:17 -0600103 \
104 /* IRQ related */ \
105 .ack_interrupt = dp83848_ack_interrupt, \
106 .config_intr = dp83848_config_intr, \
107 }
108
Andrew F. Davis34e45ad2015-10-20 16:28:57 -0500109static struct phy_driver dp83848_driver[] = {
Alvaro Gamez Machadob718e8c2018-06-08 12:23:39 +0200110 DP83848_PHY_DRIVER(TI_DP83848C_PHY_ID, "TI DP83848C 10/100 Mbps PHY",
Heiner Kallweitc227ce42019-08-17 12:29:25 +0200111 NULL),
Alvaro Gamez Machadob718e8c2018-06-08 12:23:39 +0200112 DP83848_PHY_DRIVER(NS_DP83848C_PHY_ID, "NS DP83848C 10/100 Mbps PHY",
Heiner Kallweitc227ce42019-08-17 12:29:25 +0200113 NULL),
Alvaro Gamez Machadob718e8c2018-06-08 12:23:39 +0200114 DP83848_PHY_DRIVER(TI_DP83620_PHY_ID, "TI DP83620 10/100 Mbps PHY",
115 dp83848_config_init),
116 DP83848_PHY_DRIVER(TLK10X_PHY_ID, "TI TLK10X 10/100 Mbps PHY",
Heiner Kallweitc227ce42019-08-17 12:29:25 +0200117 NULL),
Andrew F. Davis34e45ad2015-10-20 16:28:57 -0500118};
119module_phy_driver(dp83848_driver);
120
121MODULE_DESCRIPTION("Texas Instruments DP83848 PHY driver");
Andrew F. Davis3d17cc32017-01-05 14:44:50 -0600122MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
Andrew Lunn5f857572019-01-21 19:10:19 +0100123MODULE_LICENSE("GPL v2");