Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 2 | /* |
Mark Salter | f84f1f4 | 2012-07-18 23:49:40 -0400 | [diff] [blame] | 3 | * Copyright (C) 2011-2012 Texas Instruments Incorporated |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 4 | * |
| 5 | * This borrows heavily from powerpc version, which is: |
| 6 | * |
| 7 | * Derived from arch/i386/kernel/irq.c |
| 8 | * Copyright (C) 1992 Linus Torvalds |
| 9 | * Adapted from arch/i386 by Gary Thomas |
| 10 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
| 11 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
| 12 | * Copyright (C) 1996-2001 Cort Dougan |
| 13 | * Adapted for Power Macintosh by Paul Mackerras |
| 14 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 15 | */ |
| 16 | #include <linux/slab.h> |
| 17 | #include <linux/seq_file.h> |
| 18 | #include <linux/radix-tree.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/of.h> |
| 21 | #include <linux/of_irq.h> |
| 22 | #include <linux/interrupt.h> |
| 23 | #include <linux/kernel_stat.h> |
| 24 | |
| 25 | #include <asm/megamod-pic.h> |
David Howells | 6a846f3 | 2012-03-28 18:30:02 +0100 | [diff] [blame] | 26 | #include <asm/special_insns.h> |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 27 | |
| 28 | unsigned long irq_err_count; |
| 29 | |
| 30 | static DEFINE_RAW_SPINLOCK(core_irq_lock); |
| 31 | |
| 32 | static void mask_core_irq(struct irq_data *data) |
| 33 | { |
Mark Salter | f84f1f4 | 2012-07-18 23:49:40 -0400 | [diff] [blame] | 34 | unsigned int prio = data->hwirq; |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 35 | |
| 36 | raw_spin_lock(&core_irq_lock); |
| 37 | and_creg(IER, ~(1 << prio)); |
| 38 | raw_spin_unlock(&core_irq_lock); |
| 39 | } |
| 40 | |
| 41 | static void unmask_core_irq(struct irq_data *data) |
| 42 | { |
Mark Salter | f84f1f4 | 2012-07-18 23:49:40 -0400 | [diff] [blame] | 43 | unsigned int prio = data->hwirq; |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 44 | |
| 45 | raw_spin_lock(&core_irq_lock); |
| 46 | or_creg(IER, 1 << prio); |
| 47 | raw_spin_unlock(&core_irq_lock); |
| 48 | } |
| 49 | |
| 50 | static struct irq_chip core_chip = { |
| 51 | .name = "core", |
| 52 | .irq_mask = mask_core_irq, |
| 53 | .irq_unmask = unmask_core_irq, |
| 54 | }; |
| 55 | |
Mark Salter | f84f1f4 | 2012-07-18 23:49:40 -0400 | [diff] [blame] | 56 | static int prio_to_virq[NR_PRIORITY_IRQS]; |
| 57 | |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 58 | asmlinkage void c6x_do_IRQ(unsigned int prio, struct pt_regs *regs) |
| 59 | { |
| 60 | struct pt_regs *old_regs = set_irq_regs(regs); |
| 61 | |
| 62 | irq_enter(); |
| 63 | |
Mark Salter | f84f1f4 | 2012-07-18 23:49:40 -0400 | [diff] [blame] | 64 | generic_handle_irq(prio_to_virq[prio]); |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 65 | |
| 66 | irq_exit(); |
| 67 | |
| 68 | set_irq_regs(old_regs); |
| 69 | } |
| 70 | |
Mark Salter | 0bd761e | 2012-01-26 09:26:21 -0500 | [diff] [blame] | 71 | static struct irq_domain *core_domain; |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 72 | |
Mark Salter | 0bd761e | 2012-01-26 09:26:21 -0500 | [diff] [blame] | 73 | static int core_domain_map(struct irq_domain *h, unsigned int virq, |
| 74 | irq_hw_number_t hw) |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 75 | { |
| 76 | if (hw < 4 || hw >= NR_PRIORITY_IRQS) |
| 77 | return -EINVAL; |
| 78 | |
Mark Salter | f84f1f4 | 2012-07-18 23:49:40 -0400 | [diff] [blame] | 79 | prio_to_virq[hw] = virq; |
| 80 | |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 81 | irq_set_status_flags(virq, IRQ_LEVEL); |
| 82 | irq_set_chip_and_handler(virq, &core_chip, handle_level_irq); |
| 83 | return 0; |
| 84 | } |
| 85 | |
Grant Likely | 15a2598 | 2012-01-26 12:25:18 -0700 | [diff] [blame] | 86 | static const struct irq_domain_ops core_domain_ops = { |
Mark Salter | 0bd761e | 2012-01-26 09:26:21 -0500 | [diff] [blame] | 87 | .map = core_domain_map, |
Grant Likely | c1e572e | 2012-01-26 08:40:09 -0700 | [diff] [blame] | 88 | .xlate = irq_domain_xlate_onecell, |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 89 | }; |
| 90 | |
| 91 | void __init init_IRQ(void) |
| 92 | { |
| 93 | struct device_node *np; |
| 94 | |
| 95 | /* Mask all priority IRQs */ |
| 96 | and_creg(IER, ~0xfff0); |
| 97 | |
| 98 | np = of_find_compatible_node(NULL, NULL, "ti,c64x+core-pic"); |
| 99 | if (np != NULL) { |
| 100 | /* create the core host */ |
Mark Salter | f84f1f4 | 2012-07-18 23:49:40 -0400 | [diff] [blame] | 101 | core_domain = irq_domain_add_linear(np, NR_PRIORITY_IRQS, |
| 102 | &core_domain_ops, NULL); |
Mark Salter | 0bd761e | 2012-01-26 09:26:21 -0500 | [diff] [blame] | 103 | if (core_domain) |
| 104 | irq_set_default_host(core_domain); |
Aurelien Jacquiot | ec500af | 2011-10-04 11:06:27 -0400 | [diff] [blame] | 105 | of_node_put(np); |
| 106 | } |
| 107 | |
| 108 | printk(KERN_INFO "Core interrupt controller initialized\n"); |
| 109 | |
| 110 | /* now we're ready for other SoC controllers */ |
| 111 | megamod_pic_init(); |
| 112 | |
| 113 | /* Clear all general IRQ flags */ |
| 114 | set_creg(ICR, 0xfff0); |
| 115 | } |
| 116 | |
| 117 | void ack_bad_irq(int irq) |
| 118 | { |
| 119 | printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq); |
| 120 | irq_err_count++; |
| 121 | } |
| 122 | |
| 123 | int arch_show_interrupts(struct seq_file *p, int prec) |
| 124 | { |
| 125 | seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); |
| 126 | return 0; |
| 127 | } |