| Thomas Gleixner | f50a7f3 | 2019-05-28 09:57:18 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 2 | /* |
| 3 | * at91sam9g35.dtsi - Device Tree Include file for AT91SAM9G35 SoC |
| 4 | * |
| 5 | * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 6 | */ |
| 7 | |
| Jean-Christophe PLAGNIOL-VILLARD | 6db64d2 | 2013-05-15 01:21:50 +0800 | [diff] [blame] | 8 | #include "at91sam9x5.dtsi" |
| Boris Brezillon | c052a72a | 2014-07-31 09:36:10 +0200 | [diff] [blame] | 9 | #include "at91sam9x5_lcd.dtsi" |
| Boris BREZILLON | d195608 | 2013-08-07 12:14:26 +0200 | [diff] [blame] | 10 | #include "at91sam9x5_macb0.dtsi" |
| Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 11 | |
| 12 | / { |
| 13 | model = "Atmel AT91SAM9G35 SoC"; |
| Nicolas Ferre | 2a5a461 | 2013-03-21 18:01:42 +0100 | [diff] [blame] | 14 | compatible = "atmel,at91sam9g35", "atmel,at91sam9x5"; |
| Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 15 | |
| 16 | ahb { |
| 17 | apb { |
| 18 | pinctrl@fffff400 { |
| 19 | atmel,mux-mask = < |
| 20 | /* A B C */ |
| 21 | 0xffffffff 0xffe0399f 0xc000000c /* pioA */ |
| 22 | 0x000406ff 0x00047e3f 0x00000000 /* pioB */ |
| 23 | 0xfdffffff 0x00000000 0xb83fffff /* pioC */ |
| 24 | 0x003fffff 0x003f8000 0x00000000 /* pioD */ |
| 25 | >; |
| 26 | }; |
| Alexandre Belloni | 6cf8f82 | 2018-07-16 11:24:17 +0200 | [diff] [blame] | 27 | |
| 28 | pmc: pmc@fffffc00 { |
| 29 | compatible = "atmel,at91sam9g35-pmc", "atmel,at91sam9x5-pmc", "syscon"; |
| 30 | }; |
| Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 31 | }; |
| 32 | }; |
| 33 | }; |