blob: b865b1e2b103441233b5bda688275023ff613b90 [file] [log] [blame]
Andrew Lunn10fa5bf2017-05-26 01:03:20 +02001/*
2 * Marvell 88e6xxx Ethernet switch PHY and PPU support
3 *
4 * Copyright (c) 2008 Marvell Semiconductor
5 *
6 * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/mdio.h>
15#include <linux/module.h>
16#include <net/dsa.h>
17
18#include "mv88e6xxx.h"
19#include "phy.h"
20
21int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
22 int addr, int reg, u16 *val)
23{
24 return mv88e6xxx_read(chip, addr, reg, val);
25}
26
27int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
28 int addr, int reg, u16 val)
29{
30 return mv88e6xxx_write(chip, addr, reg, val);
31}
32
33int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val)
34{
35 int addr = phy; /* PHY devices addresses start at 0x0 */
36 struct mii_bus *bus;
37
38 bus = mv88e6xxx_default_mdio_bus(chip);
39 if (!bus)
40 return -EOPNOTSUPP;
41
42 if (!chip->info->ops->phy_read)
43 return -EOPNOTSUPP;
44
45 return chip->info->ops->phy_read(chip, bus, addr, reg, val);
46}
47
48int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
49{
50 int addr = phy; /* PHY devices addresses start at 0x0 */
51 struct mii_bus *bus;
52
53 bus = mv88e6xxx_default_mdio_bus(chip);
54 if (!bus)
55 return -EOPNOTSUPP;
56
57 if (!chip->info->ops->phy_write)
58 return -EOPNOTSUPP;
59
60 return chip->info->ops->phy_write(chip, bus, addr, reg, val);
61}
62
63static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
64{
Andrew Lunn10fa5bf2017-05-26 01:03:20 +020065 return mv88e6xxx_phy_write(chip, phy, PHY_PAGE, page);
66}
67
68static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
69{
70 int err;
71
72 /* Restore PHY page Copper 0x0 for access via the registered
73 * MDIO bus
74 */
75 err = mv88e6xxx_phy_write(chip, phy, PHY_PAGE, PHY_PAGE_COPPER);
76 if (unlikely(err)) {
77 dev_err(chip->dev,
78 "failed to restore PHY %d page Copper (%d)\n",
79 phy, err);
80 }
81}
82
83int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
84 u8 page, int reg, u16 *val)
85{
86 int err;
87
88 /* There is no paging for registers 22 */
89 if (reg == PHY_PAGE)
90 return -EINVAL;
91
92 err = mv88e6xxx_phy_page_get(chip, phy, page);
93 if (!err) {
94 err = mv88e6xxx_phy_read(chip, phy, reg, val);
95 mv88e6xxx_phy_page_put(chip, phy);
96 }
97
98 return err;
99}
100
101int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
102 u8 page, int reg, u16 val)
103{
104 int err;
105
106 /* There is no paging for registers 22 */
107 if (reg == PHY_PAGE)
108 return -EINVAL;
109
110 err = mv88e6xxx_phy_page_get(chip, phy, page);
111 if (!err) {
112 err = mv88e6xxx_phy_write(chip, phy, PHY_PAGE, page);
113 mv88e6xxx_phy_page_put(chip, phy);
114 }
115
116 return err;
117}
118
119static int mv88e6xxx_ppu_disable(struct mv88e6xxx_chip *chip)
120{
121 if (!chip->info->ops->ppu_disable)
122 return 0;
123
124 return chip->info->ops->ppu_disable(chip);
125}
126
Vivien Didelot1b17aed2017-05-26 18:03:05 -0400127static int mv88e6xxx_ppu_enable(struct mv88e6xxx_chip *chip)
Andrew Lunn10fa5bf2017-05-26 01:03:20 +0200128{
129 if (!chip->info->ops->ppu_enable)
130 return 0;
131
132 return chip->info->ops->ppu_enable(chip);
133}
134
135static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly)
136{
137 struct mv88e6xxx_chip *chip;
138
139 chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);
140
141 mutex_lock(&chip->reg_lock);
142
143 if (mutex_trylock(&chip->ppu_mutex)) {
144 if (mv88e6xxx_ppu_enable(chip) == 0)
145 chip->ppu_disabled = 0;
146 mutex_unlock(&chip->ppu_mutex);
147 }
148
149 mutex_unlock(&chip->reg_lock);
150}
151
152static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps)
153{
154 struct mv88e6xxx_chip *chip = (void *)_ps;
155
156 schedule_work(&chip->ppu_work);
157}
158
159static int mv88e6xxx_ppu_access_get(struct mv88e6xxx_chip *chip)
160{
161 int ret;
162
163 mutex_lock(&chip->ppu_mutex);
164
165 /* If the PHY polling unit is enabled, disable it so that
166 * we can access the PHY registers. If it was already
167 * disabled, cancel the timer that is going to re-enable
168 * it.
169 */
170 if (!chip->ppu_disabled) {
171 ret = mv88e6xxx_ppu_disable(chip);
172 if (ret < 0) {
173 mutex_unlock(&chip->ppu_mutex);
174 return ret;
175 }
176 chip->ppu_disabled = 1;
177 } else {
178 del_timer(&chip->ppu_timer);
179 ret = 0;
180 }
181
182 return ret;
183}
184
185static void mv88e6xxx_ppu_access_put(struct mv88e6xxx_chip *chip)
186{
187 /* Schedule a timer to re-enable the PHY polling unit. */
188 mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
189 mutex_unlock(&chip->ppu_mutex);
190}
191
192static void mv88e6xxx_ppu_state_init(struct mv88e6xxx_chip *chip)
193{
194 mutex_init(&chip->ppu_mutex);
195 INIT_WORK(&chip->ppu_work, mv88e6xxx_ppu_reenable_work);
196 setup_timer(&chip->ppu_timer, mv88e6xxx_ppu_reenable_timer,
197 (unsigned long)chip);
198}
199
200static void mv88e6xxx_ppu_state_destroy(struct mv88e6xxx_chip *chip)
201{
202 del_timer_sync(&chip->ppu_timer);
203}
204
205int mv88e6xxx_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
206 int addr, int reg, u16 *val)
207{
208 int err;
209
210 err = mv88e6xxx_ppu_access_get(chip);
211 if (!err) {
212 err = mv88e6xxx_read(chip, addr, reg, val);
213 mv88e6xxx_ppu_access_put(chip);
214 }
215
216 return err;
217}
218
219int mv88e6xxx_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
220 int addr, int reg, u16 val)
221{
222 int err;
223
224 err = mv88e6xxx_ppu_access_get(chip);
225 if (!err) {
226 err = mv88e6xxx_write(chip, addr, reg, val);
227 mv88e6xxx_ppu_access_put(chip);
228 }
229
230 return err;
231}
232
233void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
234{
235 if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
236 mv88e6xxx_ppu_state_init(chip);
237}
238
239void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
240{
241 if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
242 mv88e6xxx_ppu_state_destroy(chip);
243}
Vivien Didelot1b17aed2017-05-26 18:03:05 -0400244
245int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)
246{
247 return mv88e6xxx_ppu_enable(chip);
248}