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Thierry Redingf6b8a572012-08-22 10:01:24 +02001/*
2 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
3 * JZ4740 platform PWM support
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * You should have received a copy of the GNU General Public License along
11 * with this program; if not, write to the Free Software Foundation, Inc.,
12 * 675 Mass Ave, Cambridge, MA 02139, USA.
13 *
14 */
15
16#include <linux/clk.h>
17#include <linux/err.h>
18#include <linux/gpio.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
Paul Cercueilcc201732018-01-06 17:58:42 +010021#include <linux/of_device.h>
Thierry Redingf6b8a572012-08-22 10:01:24 +020022#include <linux/platform_device.h>
23#include <linux/pwm.h>
24
Thierry Redingf6b8a572012-08-22 10:01:24 +020025#include <asm/mach-jz4740/timer.h>
26
27#define NUM_PWM 8
28
Thierry Redingf6b8a572012-08-22 10:01:24 +020029struct jz4740_pwm_chip {
30 struct pwm_chip chip;
31 struct clk *clk;
32};
33
34static inline struct jz4740_pwm_chip *to_jz4740(struct pwm_chip *chip)
35{
36 return container_of(chip, struct jz4740_pwm_chip, chip);
37}
38
39static int jz4740_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
40{
Thierry Redingf6b8a572012-08-22 10:01:24 +020041 /*
42 * Timers 0 and 1 are used for system tasks, so they are unavailable
43 * for use as PWMs.
44 */
45 if (pwm->hwpwm < 2)
46 return -EBUSY;
47
Thierry Redingf6b8a572012-08-22 10:01:24 +020048 jz4740_timer_start(pwm->hwpwm);
49
50 return 0;
51}
52
53static void jz4740_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
54{
Thierry Redingf6b8a572012-08-22 10:01:24 +020055 jz4740_timer_set_ctrl(pwm->hwpwm, 0);
56
Thierry Redingf6b8a572012-08-22 10:01:24 +020057 jz4740_timer_stop(pwm->hwpwm);
58}
59
60static int jz4740_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
61{
62 uint32_t ctrl = jz4740_timer_get_ctrl(pwm->pwm);
63
64 ctrl |= JZ_TIMER_CTRL_PWM_ENABLE;
65 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
66 jz4740_timer_enable(pwm->hwpwm);
67
68 return 0;
69}
70
71static void jz4740_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
72{
73 uint32_t ctrl = jz4740_timer_get_ctrl(pwm->hwpwm);
74
Maarten ter Huurnedf56b172018-01-06 17:58:40 +010075 /* Disable PWM output.
76 * In TCU2 mode (channel 1/2 on JZ4750+), this must be done before the
77 * counter is stopped, while in TCU1 mode the order does not matter.
78 */
Thierry Redingf6b8a572012-08-22 10:01:24 +020079 ctrl &= ~JZ_TIMER_CTRL_PWM_ENABLE;
Thierry Redingf6b8a572012-08-22 10:01:24 +020080 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
Maarten ter Huurnedf56b172018-01-06 17:58:40 +010081
82 /* Stop counter */
83 jz4740_timer_disable(pwm->hwpwm);
Thierry Redingf6b8a572012-08-22 10:01:24 +020084}
85
Paul Cercueil1ac99c52019-06-07 17:44:07 +020086static int jz4740_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
87 struct pwm_state *state)
Thierry Redingf6b8a572012-08-22 10:01:24 +020088{
89 struct jz4740_pwm_chip *jz4740 = to_jz4740(pwm->chip);
90 unsigned long long tmp;
91 unsigned long period, duty;
92 unsigned int prescaler = 0;
93 uint16_t ctrl;
Thierry Redingf6b8a572012-08-22 10:01:24 +020094
Paul Cercueil1ac99c52019-06-07 17:44:07 +020095 tmp = (unsigned long long)clk_get_rate(jz4740->clk) * state->period;
Thierry Redingf6b8a572012-08-22 10:01:24 +020096 do_div(tmp, 1000000000);
97 period = tmp;
98
99 while (period > 0xffff && prescaler < 6) {
100 period >>= 2;
101 ++prescaler;
102 }
103
104 if (prescaler == 6)
105 return -EINVAL;
106
Paul Cercueil1ac99c52019-06-07 17:44:07 +0200107 tmp = (unsigned long long)period * state->duty_cycle;
108 do_div(tmp, state->period);
Thierry Redingf6b8a572012-08-22 10:01:24 +0200109 duty = period - tmp;
110
111 if (duty >= period)
112 duty = period - 1;
113
Paul Cercueil1ac99c52019-06-07 17:44:07 +0200114 jz4740_pwm_disable(chip, pwm);
Thierry Redingf6b8a572012-08-22 10:01:24 +0200115
116 jz4740_timer_set_count(pwm->hwpwm, 0);
117 jz4740_timer_set_duty(pwm->hwpwm, duty);
118 jz4740_timer_set_period(pwm->hwpwm, period);
119
120 ctrl = JZ_TIMER_CTRL_PRESCALER(prescaler) | JZ_TIMER_CTRL_SRC_EXT |
121 JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN;
122
123 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
124
Paul Cercueil1ac99c52019-06-07 17:44:07 +0200125 switch (state->polarity) {
Paul Cercueil174dcc82018-01-06 17:58:41 +0100126 case PWM_POLARITY_NORMAL:
127 ctrl &= ~JZ_TIMER_CTRL_PWM_ACTIVE_LOW;
128 break;
129 case PWM_POLARITY_INVERSED:
130 ctrl |= JZ_TIMER_CTRL_PWM_ACTIVE_LOW;
131 break;
132 }
133
134 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
Paul Cercueil1ac99c52019-06-07 17:44:07 +0200135
136 if (state->enabled)
137 jz4740_pwm_enable(chip, pwm);
138
Paul Cercueil174dcc82018-01-06 17:58:41 +0100139 return 0;
140}
141
Thierry Redingf6b8a572012-08-22 10:01:24 +0200142static const struct pwm_ops jz4740_pwm_ops = {
143 .request = jz4740_pwm_request,
144 .free = jz4740_pwm_free,
Paul Cercueil1ac99c52019-06-07 17:44:07 +0200145 .apply = jz4740_pwm_apply,
Thierry Redingf6b8a572012-08-22 10:01:24 +0200146 .owner = THIS_MODULE,
147};
148
Bill Pemberton3e9fe832012-11-19 13:23:14 -0500149static int jz4740_pwm_probe(struct platform_device *pdev)
Thierry Redingf6b8a572012-08-22 10:01:24 +0200150{
151 struct jz4740_pwm_chip *jz4740;
Thierry Redingf6b8a572012-08-22 10:01:24 +0200152
153 jz4740 = devm_kzalloc(&pdev->dev, sizeof(*jz4740), GFP_KERNEL);
154 if (!jz4740)
155 return -ENOMEM;
156
Lars-Peter Clausen0dc11352013-12-07 18:13:16 +0100157 jz4740->clk = devm_clk_get(&pdev->dev, "ext");
Thierry Redingf6b8a572012-08-22 10:01:24 +0200158 if (IS_ERR(jz4740->clk))
159 return PTR_ERR(jz4740->clk);
160
161 jz4740->chip.dev = &pdev->dev;
162 jz4740->chip.ops = &jz4740_pwm_ops;
163 jz4740->chip.npwm = NUM_PWM;
164 jz4740->chip.base = -1;
Paul Cercueilcc201732018-01-06 17:58:42 +0100165 jz4740->chip.of_xlate = of_pwm_xlate_with_flags;
166 jz4740->chip.of_pwm_n_cells = 3;
Thierry Redingf6b8a572012-08-22 10:01:24 +0200167
Thierry Redingf6b8a572012-08-22 10:01:24 +0200168 platform_set_drvdata(pdev, jz4740);
169
Lars-Peter Clausen0dc11352013-12-07 18:13:16 +0100170 return pwmchip_add(&jz4740->chip);
Thierry Redingf6b8a572012-08-22 10:01:24 +0200171}
172
Bill Pemberton77f37912012-11-19 13:26:09 -0500173static int jz4740_pwm_remove(struct platform_device *pdev)
Thierry Redingf6b8a572012-08-22 10:01:24 +0200174{
175 struct jz4740_pwm_chip *jz4740 = platform_get_drvdata(pdev);
Thierry Redingf6b8a572012-08-22 10:01:24 +0200176
Lars-Peter Clausen0dc11352013-12-07 18:13:16 +0100177 return pwmchip_remove(&jz4740->chip);
Thierry Redingf6b8a572012-08-22 10:01:24 +0200178}
179
Paul Cercueilcc201732018-01-06 17:58:42 +0100180#ifdef CONFIG_OF
181static const struct of_device_id jz4740_pwm_dt_ids[] = {
182 { .compatible = "ingenic,jz4740-pwm", },
Paul Cercueilcc201732018-01-06 17:58:42 +0100183 {},
184};
185MODULE_DEVICE_TABLE(of, jz4740_pwm_dt_ids);
186#endif
187
Thierry Redingf6b8a572012-08-22 10:01:24 +0200188static struct platform_driver jz4740_pwm_driver = {
189 .driver = {
190 .name = "jz4740-pwm",
Paul Cercueilcc201732018-01-06 17:58:42 +0100191 .of_match_table = of_match_ptr(jz4740_pwm_dt_ids),
Thierry Redingf6b8a572012-08-22 10:01:24 +0200192 },
193 .probe = jz4740_pwm_probe,
Bill Pembertonfd109112012-11-19 13:21:28 -0500194 .remove = jz4740_pwm_remove,
Thierry Redingf6b8a572012-08-22 10:01:24 +0200195};
196module_platform_driver(jz4740_pwm_driver);
197
198MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
199MODULE_DESCRIPTION("Ingenic JZ4740 PWM driver");
200MODULE_ALIAS("platform:jz4740-pwm");
201MODULE_LICENSE("GPL");