blob: caf8aed78fea29beea96b3d68c94abdf45d599c6 [file] [log] [blame]
Kuninori Morimoto199d0352018-12-18 15:00:24 +09001// SPDX-License-Identifier: GPL-2.0
Kuninori Morimoto2761ba62016-11-08 01:00:57 +00002/*
3 * dw-hdmi-i2s-audio.c
4 *
Kuninori Morimoto81aa3682017-08-07 04:09:41 +00005 * Copyright (c) 2017 Renesas Solutions Corp.
6 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Kuninori Morimoto2761ba62016-11-08 01:00:57 +00007 */
Sam Ravnborg428747a2019-01-08 20:29:33 +01008
9#include <linux/dma-mapping.h>
10#include <linux/module.h>
11
Kuninori Morimoto2761ba62016-11-08 01:00:57 +000012#include <drm/bridge/dw_hdmi.h>
13
14#include <sound/hdmi-codec.h>
15
16#include "dw-hdmi.h"
17#include "dw-hdmi-audio.h"
18
19#define DRIVER_NAME "dw-hdmi-i2s-audio"
20
21static inline void hdmi_write(struct dw_hdmi_i2s_audio_data *audio,
22 u8 val, int offset)
23{
24 struct dw_hdmi *hdmi = audio->hdmi;
25
26 audio->write(hdmi, val, offset);
27}
28
29static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)
30{
31 struct dw_hdmi *hdmi = audio->hdmi;
32
33 return audio->read(hdmi, offset);
34}
35
36static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
37 struct hdmi_codec_daifmt *fmt,
38 struct hdmi_codec_params *hparms)
39{
40 struct dw_hdmi_i2s_audio_data *audio = data;
41 struct dw_hdmi *hdmi = audio->hdmi;
42 u8 conf0 = 0;
43 u8 conf1 = 0;
44 u8 inputclkfs = 0;
45
46 /* it cares I2S only */
Jerome Brunet8067f622019-08-12 14:07:19 +020047 if (fmt->bit_clk_master | fmt->frame_clk_master) {
48 dev_err(dev, "unsupported clock settings\n");
Kuninori Morimoto2761ba62016-11-08 01:00:57 +000049 return -EINVAL;
50 }
51
52 inputclkfs = HDMI_AUD_INPUTCLKFS_64FS;
53 conf0 = HDMI_AUD_CONF0_I2S_ALL_ENABLE;
54
55 switch (hparms->sample_width) {
56 case 16:
57 conf1 = HDMI_AUD_CONF1_WIDTH_16;
58 break;
59 case 24:
60 case 32:
61 conf1 = HDMI_AUD_CONF1_WIDTH_24;
62 break;
63 }
64
Jerome Brunet8067f622019-08-12 14:07:19 +020065 switch (fmt->fmt) {
66 case HDMI_I2S:
67 conf1 |= HDMI_AUD_CONF1_MODE_I2S;
68 break;
69 case HDMI_RIGHT_J:
70 conf1 |= HDMI_AUD_CONF1_MODE_RIGHT_J;
71 break;
72 case HDMI_LEFT_J:
73 conf1 |= HDMI_AUD_CONF1_MODE_LEFT_J;
74 break;
75 case HDMI_DSP_A:
76 conf1 |= HDMI_AUD_CONF1_MODE_BURST_1;
77 break;
78 case HDMI_DSP_B:
79 conf1 |= HDMI_AUD_CONF1_MODE_BURST_2;
80 break;
81 default:
82 dev_err(dev, "unsupported format\n");
83 return -EINVAL;
84 }
85
Kuninori Morimoto2761ba62016-11-08 01:00:57 +000086 dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
Jerome Brunet17a1e552019-08-12 14:07:22 +020087 dw_hdmi_set_channel_count(hdmi, hparms->channels);
Kuninori Morimoto2761ba62016-11-08 01:00:57 +000088
89 hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
90 hdmi_write(audio, conf0, HDMI_AUD_CONF0);
91 hdmi_write(audio, conf1, HDMI_AUD_CONF1);
92
93 dw_hdmi_audio_enable(hdmi);
94
95 return 0;
96}
97
98static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data)
99{
100 struct dw_hdmi_i2s_audio_data *audio = data;
101 struct dw_hdmi *hdmi = audio->hdmi;
102
103 dw_hdmi_audio_disable(hdmi);
104
105 hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
106}
107
Kuninori Morimotoe3839bd2017-06-19 00:39:29 +0000108static int dw_hdmi_i2s_get_dai_id(struct snd_soc_component *component,
109 struct device_node *endpoint)
110{
111 struct of_endpoint of_ep;
112 int ret;
113
114 ret = of_graph_parse_endpoint(endpoint, &of_ep);
115 if (ret < 0)
116 return ret;
117
118 /*
119 * HDMI sound should be located as reg = <2>
120 * Then, it is sound port 0
121 */
122 if (of_ep.port == 2)
123 return 0;
124
125 return -EINVAL;
126}
127
Kuninori Morimoto2761ba62016-11-08 01:00:57 +0000128static struct hdmi_codec_ops dw_hdmi_i2s_ops = {
129 .hw_params = dw_hdmi_i2s_hw_params,
130 .audio_shutdown = dw_hdmi_i2s_audio_shutdown,
Kuninori Morimotoe3839bd2017-06-19 00:39:29 +0000131 .get_dai_id = dw_hdmi_i2s_get_dai_id,
Kuninori Morimoto2761ba62016-11-08 01:00:57 +0000132};
133
134static int snd_dw_hdmi_probe(struct platform_device *pdev)
135{
136 struct dw_hdmi_i2s_audio_data *audio = pdev->dev.platform_data;
137 struct platform_device_info pdevinfo;
138 struct hdmi_codec_pdata pdata;
139 struct platform_device *platform;
140
141 pdata.ops = &dw_hdmi_i2s_ops;
142 pdata.i2s = 1;
Jerome Brunet17a1e552019-08-12 14:07:22 +0200143 pdata.max_i2s_channels = 8;
Kuninori Morimoto2761ba62016-11-08 01:00:57 +0000144 pdata.data = audio;
145
146 memset(&pdevinfo, 0, sizeof(pdevinfo));
147 pdevinfo.parent = pdev->dev.parent;
148 pdevinfo.id = PLATFORM_DEVID_AUTO;
149 pdevinfo.name = HDMI_CODEC_DRV_NAME;
150 pdevinfo.data = &pdata;
151 pdevinfo.size_data = sizeof(pdata);
152 pdevinfo.dma_mask = DMA_BIT_MASK(32);
153
154 platform = platform_device_register_full(&pdevinfo);
155 if (IS_ERR(platform))
156 return PTR_ERR(platform);
157
158 dev_set_drvdata(&pdev->dev, platform);
159
160 return 0;
161}
162
163static int snd_dw_hdmi_remove(struct platform_device *pdev)
164{
165 struct platform_device *platform = dev_get_drvdata(&pdev->dev);
166
167 platform_device_unregister(platform);
168
169 return 0;
170}
171
172static struct platform_driver snd_dw_hdmi_driver = {
173 .probe = snd_dw_hdmi_probe,
174 .remove = snd_dw_hdmi_remove,
175 .driver = {
176 .name = DRIVER_NAME,
Kuninori Morimoto2761ba62016-11-08 01:00:57 +0000177 },
178};
179module_platform_driver(snd_dw_hdmi_driver);
180
181MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
182MODULE_DESCRIPTION("Synopsis Designware HDMI I2S ALSA SoC interface");
183MODULE_LICENSE("GPL v2");
184MODULE_ALIAS("platform:" DRIVER_NAME);