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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Generic Generic NCR5380 driver
3 *
4 * Copyright 1993, Drew Eckhardt
5 * Visionary Computing
6 * (Unix and Linux consulting and custom programming)
7 * drew@colorado.edu
8 * +1 (303) 440-4894
9 *
10 * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
11 * K.Lentin@cs.monash.edu.au
12 *
13 * NCR53C400A extensions (c) 1996, Ingmar Baumgart
14 * ingmar@gonzo.schwaben.de
15 *
16 * DTC3181E extensions (c) 1997, Ronald van Cuijlenborg
17 * ronald.van.cuijlenborg@tip.nl or nutty@dds.nl
18 *
19 * Added ISAPNP support for DTC436 adapters,
20 * Thomas Sailer, sailer@ife.ee.ethz.ch
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 *
Finn Thain9c41ab22016-03-23 21:10:28 +110022 * See Documentation/scsi/g_NCR5380.txt for more info.
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 */
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/blkdev.h>
Finn Thain161c0052016-01-03 16:05:46 +110027#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <scsi/scsi_host.h>
29#include "g_NCR5380.h"
30#include "NCR5380.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#include <linux/init.h>
32#include <linux/ioport.h>
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020033#include <linux/isa.h>
34#include <linux/pnp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <linux/interrupt.h>
36
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020037#define MAX_CARDS 8
38
39/* old-style parameters for compatibility */
Finn Thainc0965e62016-01-03 16:05:05 +110040static int ncr_irq;
Finn Thainc0965e62016-01-03 16:05:05 +110041static int ncr_addr;
42static int ncr_5380;
43static int ncr_53c400;
44static int ncr_53c400a;
45static int dtc_3181e;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +110046static int hp_c2502;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020047module_param(ncr_irq, int, 0);
48module_param(ncr_addr, int, 0);
49module_param(ncr_5380, int, 0);
50module_param(ncr_53c400, int, 0);
51module_param(ncr_53c400a, int, 0);
52module_param(dtc_3181e, int, 0);
53module_param(hp_c2502, int, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -070054
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020055static int irq[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
56module_param_array(irq, int, NULL, 0);
57MODULE_PARM_DESC(irq, "IRQ number(s)");
58
59static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
60module_param_array(base, int, NULL, 0);
61MODULE_PARM_DESC(base, "base address(es)");
62
63static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
64module_param_array(card, int, NULL, 0);
65MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)");
66
Ondrej Zaryb61bacb2016-10-10 00:46:52 -040067MODULE_ALIAS("g_NCR5380_mmio");
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020068MODULE_LICENSE("GPL");
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
Ondrej Zary906e4a3c2016-12-05 01:07:20 -050070static void g_NCR5380_trigger_irq(struct Scsi_Host *instance)
71{
72 struct NCR5380_hostdata *hostdata = shost_priv(instance);
73
74 /*
75 * An interrupt is triggered whenever BSY = false, SEL = true
76 * and a bit set in the SELECT_ENABLE_REG is asserted on the
77 * SCSI bus.
78 *
79 * Note that the bus is only driven when the phase control signals
80 * (I/O, C/D, and MSG) match those in the TCR.
81 */
82 NCR5380_write(TARGET_COMMAND_REG,
83 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
84 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
85 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
86 NCR5380_write(INITIATOR_COMMAND_REG,
87 ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL);
88
89 msleep(1);
90
91 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
92 NCR5380_write(SELECT_ENABLE_REG, 0);
93 NCR5380_write(TARGET_COMMAND_REG, 0);
94}
95
96/**
97 * g_NCR5380_probe_irq - find the IRQ of a NCR5380 or equivalent
98 * @instance: SCSI host instance
99 *
100 * Autoprobe for the IRQ line used by the card by triggering an IRQ
101 * and then looking to see what interrupt actually turned up.
102 */
103
104static int g_NCR5380_probe_irq(struct Scsi_Host *instance)
105{
106 struct NCR5380_hostdata *hostdata = shost_priv(instance);
107 int irq_mask, irq;
108
109 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
110 irq_mask = probe_irq_on();
111 g_NCR5380_trigger_irq(instance);
112 irq = probe_irq_off(irq_mask);
113 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
114
115 if (irq <= 0)
116 return NO_IRQ;
117 return irq;
118}
119
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100120/*
121 * Configure I/O address of 53C400A or DTC436 by writing magic numbers
122 * to ports 0x779 and 0x379.
123 */
124static void magic_configure(int idx, u8 irq, u8 magic[])
125{
126 u8 cfg = 0;
127
128 outb(magic[0], 0x779);
129 outb(magic[1], 0x379);
130 outb(magic[2], 0x379);
131 outb(magic[3], 0x379);
132 outb(magic[4], 0x379);
133
Finn Thain145c3ae4c2016-12-05 01:07:20 -0500134 if (irq == 9)
135 irq = 2;
136
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100137 if (idx >= 0 && idx <= 7)
138 cfg = 0x80 | idx | (irq << 4);
139 outb(cfg, 0x379);
140}
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400141
Finn Thain145c3ae4c2016-12-05 01:07:20 -0500142static irqreturn_t legacy_empty_irq_handler(int irq, void *dev_id)
143{
144 return IRQ_HANDLED;
145}
146
147static int legacy_find_free_irq(int *irq_table)
148{
149 while (*irq_table != -1) {
150 if (!request_irq(*irq_table, legacy_empty_irq_handler,
151 IRQF_PROBE_SHARED, "Test IRQ",
152 (void *)irq_table)) {
153 free_irq(*irq_table, (void *) irq_table);
154 return *irq_table;
155 }
156 irq_table++;
157 }
158 return -1;
159}
160
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400161static unsigned int ncr_53c400a_ports[] = {
162 0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0
163};
164static unsigned int dtc_3181e_ports[] = {
165 0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0
166};
167static u8 ncr_53c400a_magic[] = { /* 53C400A & DTC436 */
168 0x59, 0xb9, 0xc5, 0xae, 0xa6
169};
170static u8 hp_c2502_magic[] = { /* HP C2502 */
171 0x0f, 0x22, 0xf0, 0x20, 0x80
172};
Finn Thain145c3ae4c2016-12-05 01:07:20 -0500173static int hp_c2502_irqs[] = {
174 9, 5, 7, 3, 4, -1
175};
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100176
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200177static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
178 struct device *pdev, int base, int irq, int board)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179{
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400180 bool is_pmio = base <= 0xffff;
181 int ret;
182 int flags = 0;
183 unsigned int *ports = NULL;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100184 u8 *magic = NULL;
Ondrej Zary702a98c2010-08-10 18:01:16 -0700185 int i;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100186 int port_idx = -1;
Finn Thain9d376402016-03-23 21:10:10 +1100187 unsigned long region_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188 struct Scsi_Host *instance;
Ondrej Zary12150792016-01-03 16:06:15 +1100189 struct NCR5380_hostdata *hostdata;
Finn Thain820682b2016-10-10 00:46:53 -0400190 u8 __iomem *iomem;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200192 switch (board) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200193 case BOARD_NCR5380:
194 flags = FLAG_NO_PSEUDO_DMA | FLAG_DMA_FIXUP;
195 break;
196 case BOARD_NCR53C400A:
197 ports = ncr_53c400a_ports;
198 magic = ncr_53c400a_magic;
199 break;
200 case BOARD_HP_C2502:
201 ports = ncr_53c400a_ports;
202 magic = hp_c2502_magic;
203 break;
204 case BOARD_DTC3181E:
205 ports = dtc_3181e_ports;
206 magic = ncr_53c400a_magic;
207 break;
208 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400210 if (is_pmio && ports && magic) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200211 /* wakeup sequence for the NCR53C400A and DTC3181E */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200213 /* Disable the adapter and look for a free io port */
214 magic_configure(-1, 0, magic);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200216 region_size = 16;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200217 if (base)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200218 for (i = 0; ports[i]; i++) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200219 if (base == ports[i]) { /* index found */
220 if (!request_region(ports[i],
221 region_size,
222 "ncr53c80"))
223 return -EBUSY;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200224 break;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200225 }
226 }
227 else
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200228 for (i = 0; ports[i]; i++) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200229 if (!request_region(ports[i], region_size,
230 "ncr53c80"))
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200231 continue;
232 if (inb(ports[i]) == 0xff)
233 break;
234 release_region(ports[i], region_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200236 if (ports[i]) {
237 /* At this point we have our region reserved */
238 magic_configure(i, 0, magic); /* no IRQ yet */
Ondrej Zary7b93ca42016-11-11 10:00:20 +1100239 base = ports[i];
240 outb(0xc0, base + 9);
241 if (inb(base + 9) != 0x80) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200242 ret = -ENODEV;
243 goto out_release;
244 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200245 port_idx = i;
246 } else
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200247 return -EINVAL;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400248 } else if (is_pmio) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200249 /* NCR5380 - no configuration, just grab */
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200250 region_size = 8;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200251 if (!base || !request_region(base, region_size, "ncr5380"))
252 return -EBUSY;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400253 } else { /* MMIO */
254 region_size = NCR53C400_region_size;
255 if (!request_mem_region(base, region_size, "ncr5380"))
256 return -EBUSY;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200257 }
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400258
259 if (is_pmio)
260 iomem = ioport_map(base, region_size);
261 else
262 iomem = ioremap(base, region_size);
263
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200264 if (!iomem) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200265 ret = -ENOMEM;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200266 goto out_release;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200267 }
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400268
269 instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata));
270 if (instance == NULL) {
271 ret = -ENOMEM;
272 goto out_unmap;
273 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200274 hostdata = shost_priv(instance);
275
Finn Thain820682b2016-10-10 00:46:53 -0400276 hostdata->io = iomem;
277 hostdata->region_size = region_size;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400278
279 if (is_pmio) {
Finn Thain820682b2016-10-10 00:46:53 -0400280 hostdata->io_port = base;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400281 hostdata->io_width = 1; /* 8-bit PDMA by default */
282 hostdata->offset = 0;
283
284 /*
285 * On NCR53C400 boards, NCR5380 registers are mapped 8 past
286 * the base address.
287 */
288 switch (board) {
289 case BOARD_NCR53C400:
Finn Thain820682b2016-10-10 00:46:53 -0400290 hostdata->io_port += 8;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400291 hostdata->c400_ctl_status = 0;
292 hostdata->c400_blk_cnt = 1;
293 hostdata->c400_host_buf = 4;
294 break;
295 case BOARD_DTC3181E:
296 hostdata->io_width = 2; /* 16-bit PDMA */
297 /* fall through */
298 case BOARD_NCR53C400A:
299 case BOARD_HP_C2502:
300 hostdata->c400_ctl_status = 9;
301 hostdata->c400_blk_cnt = 10;
302 hostdata->c400_host_buf = 8;
303 break;
304 }
305 } else {
Finn Thain820682b2016-10-10 00:46:53 -0400306 hostdata->base = base;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400307 hostdata->offset = NCR53C400_mem_base;
308 switch (board) {
309 case BOARD_NCR53C400:
310 hostdata->c400_ctl_status = 0x100;
311 hostdata->c400_blk_cnt = 0x101;
312 hostdata->c400_host_buf = 0x104;
313 break;
314 case BOARD_DTC3181E:
315 case BOARD_NCR53C400A:
316 case BOARD_HP_C2502:
317 pr_err(DRV_MODULE_NAME ": unknown register offsets\n");
318 ret = -EINVAL;
319 goto out_unregister;
320 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200321 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200322
Ondrej Zary89fa9b52016-12-05 01:07:19 -0500323 /* Check for vacant slot */
324 NCR5380_write(MODE_REG, 0);
325 if (NCR5380_read(MODE_REG) != 0) {
326 ret = -ENODEV;
327 goto out_unregister;
328 }
329
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200330 ret = NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP);
331 if (ret)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200332 goto out_unregister;
333
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200334 switch (board) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200335 case BOARD_NCR53C400:
336 case BOARD_DTC3181E:
337 case BOARD_NCR53C400A:
338 case BOARD_HP_C2502:
339 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
340 }
341
342 NCR5380_maybe_reset_bus(instance);
343
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200344 /* Compatibility with documented NCR5380 kernel parameters */
Finn Thain145c3ae4c2016-12-05 01:07:20 -0500345 if (irq == 255 || irq == 0)
346 irq = NO_IRQ;
347
348 if (board == BOARD_HP_C2502) {
349 int *irq_table = hp_c2502_irqs;
350 int board_irq = -1;
351
352 switch (irq) {
353 case NO_IRQ:
354 board_irq = 0;
355 break;
356 case IRQ_AUTO:
357 board_irq = legacy_find_free_irq(irq_table);
358 break;
359 default:
360 while (*irq_table != -1)
361 if (*irq_table++ == irq)
362 board_irq = irq;
363 }
364
365 if (board_irq <= 0) {
366 board_irq = 0;
367 irq = NO_IRQ;
368 }
369
370 magic_configure(port_idx, board_irq, magic);
371 }
372
373 if (irq == IRQ_AUTO)
374 instance->irq = g_NCR5380_probe_irq(instance);
375 else
376 instance->irq = irq;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200377
378 if (instance->irq != NO_IRQ) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200379 if (request_irq(instance->irq, generic_NCR5380_intr,
380 0, "NCR5380", instance)) {
381 printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq);
382 instance->irq = NO_IRQ;
383 }
384 }
385
386 if (instance->irq == NO_IRQ) {
387 printk(KERN_INFO "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no);
388 printk(KERN_INFO "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no);
389 }
390
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200391 ret = scsi_add_host(instance, pdev);
392 if (ret)
393 goto out_free_irq;
394 scsi_scan_host(instance);
395 dev_set_drvdata(pdev, instance);
396 return 0;
Finn Thain0ad0eff2016-01-03 16:05:21 +1100397
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200398out_free_irq:
399 if (instance->irq != NO_IRQ)
400 free_irq(instance->irq, instance);
401 NCR5380_exit(instance);
Finn Thain0ad0eff2016-01-03 16:05:21 +1100402out_unregister:
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200403 scsi_host_put(instance);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400404out_unmap:
Finn Thain0ad0eff2016-01-03 16:05:21 +1100405 iounmap(iomem);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400406out_release:
407 if (is_pmio)
408 release_region(base, region_size);
409 else
410 release_mem_region(base, region_size);
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200411 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412}
413
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200414static void generic_NCR5380_release_resources(struct Scsi_Host *instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415{
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400416 struct NCR5380_hostdata *hostdata = shost_priv(instance);
Finn Thain820682b2016-10-10 00:46:53 -0400417 void __iomem *iomem = hostdata->io;
418 unsigned long io_port = hostdata->io_port;
419 unsigned long base = hostdata->base;
420 unsigned long region_size = hostdata->region_size;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400421
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200422 scsi_remove_host(instance);
Finn Thain22f5f102014-11-12 16:11:56 +1100423 if (instance->irq != NO_IRQ)
Jeff Garzik1e641662007-11-11 19:52:05 -0500424 free_irq(instance->irq, instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425 NCR5380_exit(instance);
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200426 scsi_host_put(instance);
Finn Thain820682b2016-10-10 00:46:53 -0400427 iounmap(iomem);
428 if (io_port)
429 release_region(io_port, region_size);
430 else
431 release_mem_region(base, region_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432}
433
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434/**
Finn Thain6c4b88c2016-03-23 21:10:17 +1100435 * generic_NCR5380_pread - pseudo DMA read
Finn Thain4a98f892016-10-10 00:46:53 -0400436 * @hostdata: scsi host private data
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437 * @dst: buffer to read into
438 * @len: buffer length
439 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300440 * Perform a pseudo DMA mode read from an NCR53C400 or equivalent
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441 * controller
442 */
443
Finn Thain4a98f892016-10-10 00:46:53 -0400444static inline int generic_NCR5380_pread(struct NCR5380_hostdata *hostdata,
Finn Thain6c4b88c2016-03-23 21:10:17 +1100445 unsigned char *dst, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446{
447 int blocks = len / 128;
448 int start = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449
Ondrej Zary12150792016-01-03 16:06:15 +1100450 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR);
451 NCR5380_write(hostdata->c400_blk_cnt, blocks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700452 while (1) {
Ondrej Zary12150792016-01-03 16:06:15 +1100453 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454 break;
Ondrej Zary12150792016-01-03 16:06:15 +1100455 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456 printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
457 return -1;
458 }
Ondrej Zary12150792016-01-03 16:06:15 +1100459 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
460 ; /* FIXME - no timeout */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461
Finn Thain820682b2016-10-10 00:46:53 -0400462 if (hostdata->io_port && hostdata->io_width == 2)
463 insw(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100464 dst + start, 64);
Finn Thain820682b2016-10-10 00:46:53 -0400465 else if (hostdata->io_port)
466 insb(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100467 dst + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400468 else
469 memcpy_fromio(dst + start,
Finn Thain820682b2016-10-10 00:46:53 -0400470 hostdata->io + NCR53C400_host_buffer, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400471
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472 start += 128;
473 blocks--;
474 }
475
476 if (blocks) {
Ondrej Zary12150792016-01-03 16:06:15 +1100477 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
478 ; /* FIXME - no timeout */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479
Finn Thain820682b2016-10-10 00:46:53 -0400480 if (hostdata->io_port && hostdata->io_width == 2)
481 insw(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100482 dst + start, 64);
Finn Thain820682b2016-10-10 00:46:53 -0400483 else if (hostdata->io_port)
484 insb(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100485 dst + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400486 else
487 memcpy_fromio(dst + start,
Finn Thain820682b2016-10-10 00:46:53 -0400488 hostdata->io + NCR53C400_host_buffer, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400489
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490 start += 128;
491 blocks--;
492 }
493
Ondrej Zary12150792016-01-03 16:06:15 +1100494 if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495 printk("53C400r: no 53C80 gated irq after transfer");
496
Ondrej Zary42fc6372016-01-03 16:06:18 +1100497 /* wait for 53C80 registers to be available */
498 while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499 ;
Ondrej Zary42fc6372016-01-03 16:06:18 +1100500
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER))
502 printk(KERN_ERR "53C400r: no end dma signal\n");
503
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504 return 0;
505}
506
507/**
Finn Thain6c4b88c2016-03-23 21:10:17 +1100508 * generic_NCR5380_pwrite - pseudo DMA write
Finn Thain4a98f892016-10-10 00:46:53 -0400509 * @hostdata: scsi host private data
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510 * @dst: buffer to read into
511 * @len: buffer length
512 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300513 * Perform a pseudo DMA mode read from an NCR53C400 or equivalent
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514 * controller
515 */
516
Finn Thain4a98f892016-10-10 00:46:53 -0400517static inline int generic_NCR5380_pwrite(struct NCR5380_hostdata *hostdata,
Finn Thain6c4b88c2016-03-23 21:10:17 +1100518 unsigned char *src, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700519{
520 int blocks = len / 128;
521 int start = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700522
Ondrej Zary12150792016-01-03 16:06:15 +1100523 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
524 NCR5380_write(hostdata->c400_blk_cnt, blocks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 while (1) {
Ondrej Zary12150792016-01-03 16:06:15 +1100526 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700527 printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
528 return -1;
529 }
530
Ondrej Zary12150792016-01-03 16:06:15 +1100531 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532 break;
Ondrej Zary12150792016-01-03 16:06:15 +1100533 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700534 ; // FIXME - timeout
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400535
Finn Thain820682b2016-10-10 00:46:53 -0400536 if (hostdata->io_port && hostdata->io_width == 2)
537 outsw(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100538 src + start, 64);
Finn Thain820682b2016-10-10 00:46:53 -0400539 else if (hostdata->io_port)
540 outsb(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100541 src + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400542 else
Finn Thain820682b2016-10-10 00:46:53 -0400543 memcpy_toio(hostdata->io + NCR53C400_host_buffer,
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400544 src + start, 128);
545
Linus Torvalds1da177e2005-04-16 15:20:36 -0700546 start += 128;
547 blocks--;
548 }
549 if (blocks) {
Ondrej Zary12150792016-01-03 16:06:15 +1100550 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 ; // FIXME - no timeout
552
Finn Thain820682b2016-10-10 00:46:53 -0400553 if (hostdata->io_port && hostdata->io_width == 2)
554 outsw(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100555 src + start, 64);
Finn Thain820682b2016-10-10 00:46:53 -0400556 else if (hostdata->io_port)
557 outsb(hostdata->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100558 src + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400559 else
Finn Thain820682b2016-10-10 00:46:53 -0400560 memcpy_toio(hostdata->io + NCR53C400_host_buffer,
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400561 src + start, 128);
562
Linus Torvalds1da177e2005-04-16 15:20:36 -0700563 start += 128;
564 blocks--;
565 }
566
Ondrej Zary42fc6372016-01-03 16:06:18 +1100567 /* wait for 53C80 registers to be available */
568 while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) {
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100569 udelay(4); /* DTC436 chip hangs without this */
570 /* FIXME - no timeout */
571 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572
Linus Torvalds1da177e2005-04-16 15:20:36 -0700573 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) {
574 printk(KERN_ERR "53C400w: no end dma signal\n");
575 }
Ondrej Zary42fc6372016-01-03 16:06:18 +1100576
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577 while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
578 ; // TIMEOUT
579 return 0;
580}
Finn Thainff3d4572016-01-03 16:05:25 +1100581
Finn Thain4a98f892016-10-10 00:46:53 -0400582static int generic_NCR5380_dma_xfer_len(struct NCR5380_hostdata *hostdata,
Finn Thain7e9ec8d2016-03-23 21:10:11 +1100583 struct scsi_cmnd *cmd)
Finn Thainff3d4572016-01-03 16:05:25 +1100584{
585 int transfersize = cmd->transfersize;
586
Finn Thain7e9ec8d2016-03-23 21:10:11 +1100587 if (hostdata->flags & FLAG_NO_PSEUDO_DMA)
588 return 0;
589
Finn Thainff3d4572016-01-03 16:05:25 +1100590 /* Limit transfers to 32K, for xx400 & xx406
591 * pseudoDMA that transfers in 128 bytes blocks.
592 */
593 if (transfersize > 32 * 1024 && cmd->SCp.this_residual &&
594 !(cmd->SCp.this_residual % transfersize))
595 transfersize = 32 * 1024;
596
Ondrej Zaryf0394622016-01-03 16:06:14 +1100597 /* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
598 if (transfersize % 128)
599 transfersize = 0;
600
Finn Thainff3d4572016-01-03 16:05:25 +1100601 return transfersize;
602}
603
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604/*
605 * Include the NCR5380 core code that we build our driver around
606 */
607
608#include "NCR5380.c"
609
Christoph Hellwigd0be4a7d2005-10-31 18:31:40 +0100610static struct scsi_host_template driver_template = {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200611 .module = THIS_MODULE,
Finn Thainaa2e2cb12016-01-03 16:05:48 +1100612 .proc_name = DRV_MODULE_NAME,
Finn Thainaa2e2cb12016-01-03 16:05:48 +1100613 .name = "Generic NCR5380/NCR53C400 SCSI",
Finn Thainaa2e2cb12016-01-03 16:05:48 +1100614 .info = generic_NCR5380_info,
615 .queuecommand = generic_NCR5380_queue_command,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616 .eh_abort_handler = generic_NCR5380_abort,
617 .eh_bus_reset_handler = generic_NCR5380_bus_reset,
Finn Thainaa2e2cb12016-01-03 16:05:48 +1100618 .can_queue = 16,
619 .this_id = 7,
620 .sg_tablesize = SG_ALL,
621 .cmd_per_lun = 2,
622 .use_clustering = DISABLE_CLUSTERING,
Finn Thain32b26a12016-01-03 16:05:58 +1100623 .cmd_size = NCR5380_CMD_SIZE,
Finn Thain0a4e3612016-01-03 16:06:07 +1100624 .max_sectors = 128,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700625};
Finn Thain161c0052016-01-03 16:05:46 +1100626
Linus Torvalds1da177e2005-04-16 15:20:36 -0700627
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200628static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev)
629{
630 int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev],
631 irq[ndev], card[ndev]);
632 if (ret) {
633 if (base[ndev])
634 printk(KERN_WARNING "Card not found at address 0x%03x\n",
635 base[ndev]);
636 return 0;
637 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700638
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200639 return 1;
640}
641
642static int generic_NCR5380_isa_remove(struct device *pdev,
643 unsigned int ndev)
644{
645 generic_NCR5380_release_resources(dev_get_drvdata(pdev));
646 dev_set_drvdata(pdev, NULL);
647 return 0;
648}
649
650static struct isa_driver generic_NCR5380_isa_driver = {
651 .match = generic_NCR5380_isa_match,
652 .remove = generic_NCR5380_isa_remove,
653 .driver = {
654 .name = DRV_MODULE_NAME
655 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700656};
657
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400658#ifdef CONFIG_PNP
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200659static struct pnp_device_id generic_NCR5380_pnp_ids[] = {
660 { .id = "DTC436e", .driver_data = BOARD_DTC3181E },
661 { .id = "" }
662};
663MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids);
664
665static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev,
666 const struct pnp_device_id *id)
667{
668 int base, irq;
669
670 if (pnp_activate_dev(pdev) < 0)
671 return -EBUSY;
672
673 base = pnp_port_start(pdev, 0);
674 irq = pnp_irq(pdev, 0);
675
676 return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq,
677 id->driver_data);
678}
679
680static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev)
681{
682 generic_NCR5380_release_resources(pnp_get_drvdata(pdev));
683 pnp_set_drvdata(pdev, NULL);
684}
685
686static struct pnp_driver generic_NCR5380_pnp_driver = {
687 .name = DRV_MODULE_NAME,
688 .id_table = generic_NCR5380_pnp_ids,
689 .probe = generic_NCR5380_pnp_probe,
690 .remove = generic_NCR5380_pnp_remove,
691};
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400692#endif /* defined(CONFIG_PNP) */
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200693
694static int pnp_registered, isa_registered;
695
696static int __init generic_NCR5380_init(void)
697{
698 int ret = 0;
699
700 /* compatibility with old-style parameters */
701 if (irq[0] == 0 && base[0] == 0 && card[0] == -1) {
702 irq[0] = ncr_irq;
703 base[0] = ncr_addr;
704 if (ncr_5380)
705 card[0] = BOARD_NCR5380;
706 if (ncr_53c400)
707 card[0] = BOARD_NCR53C400;
708 if (ncr_53c400a)
709 card[0] = BOARD_NCR53C400A;
710 if (dtc_3181e)
711 card[0] = BOARD_DTC3181E;
712 if (hp_c2502)
713 card[0] = BOARD_HP_C2502;
714 }
715
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400716#ifdef CONFIG_PNP
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200717 if (!pnp_register_driver(&generic_NCR5380_pnp_driver))
718 pnp_registered = 1;
Ondrej Zary702a98c2010-08-10 18:01:16 -0700719#endif
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200720 ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS);
721 if (!ret)
722 isa_registered = 1;
723
724 return (pnp_registered || isa_registered) ? 0 : ret;
725}
726
727static void __exit generic_NCR5380_exit(void)
728{
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400729#ifdef CONFIG_PNP
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200730 if (pnp_registered)
731 pnp_unregister_driver(&generic_NCR5380_pnp_driver);
732#endif
733 if (isa_registered)
734 isa_unregister_driver(&generic_NCR5380_isa_driver);
735}
736
737module_init(generic_NCR5380_init);
738module_exit(generic_NCR5380_exit);