Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Generic Generic NCR5380 driver |
| 3 | * |
| 4 | * Copyright 1993, Drew Eckhardt |
| 5 | * Visionary Computing |
| 6 | * (Unix and Linux consulting and custom programming) |
| 7 | * drew@colorado.edu |
| 8 | * +1 (303) 440-4894 |
| 9 | * |
| 10 | * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin |
| 11 | * K.Lentin@cs.monash.edu.au |
| 12 | * |
| 13 | * NCR53C400A extensions (c) 1996, Ingmar Baumgart |
| 14 | * ingmar@gonzo.schwaben.de |
| 15 | * |
| 16 | * DTC3181E extensions (c) 1997, Ronald van Cuijlenborg |
| 17 | * ronald.van.cuijlenborg@tip.nl or nutty@dds.nl |
| 18 | * |
| 19 | * Added ISAPNP support for DTC436 adapters, |
| 20 | * Thomas Sailer, sailer@ife.ee.ethz.ch |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | * |
Finn Thain | 9c41ab2 | 2016-03-23 21:10:28 +1100 | [diff] [blame] | 22 | * See Documentation/scsi/g_NCR5380.txt for more info. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | */ |
| 24 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <linux/blkdev.h> |
Finn Thain | 161c005 | 2016-01-03 16:05:46 +1100 | [diff] [blame] | 27 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | #include <scsi/scsi_host.h> |
| 29 | #include "g_NCR5380.h" |
| 30 | #include "NCR5380.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #include <linux/init.h> |
| 32 | #include <linux/ioport.h> |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 33 | #include <linux/isa.h> |
| 34 | #include <linux/pnp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <linux/interrupt.h> |
| 36 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 37 | #define MAX_CARDS 8 |
| 38 | |
| 39 | /* old-style parameters for compatibility */ |
Finn Thain | c0965e6 | 2016-01-03 16:05:05 +1100 | [diff] [blame] | 40 | static int ncr_irq; |
Finn Thain | c0965e6 | 2016-01-03 16:05:05 +1100 | [diff] [blame] | 41 | static int ncr_addr; |
| 42 | static int ncr_5380; |
| 43 | static int ncr_53c400; |
| 44 | static int ncr_53c400a; |
| 45 | static int dtc_3181e; |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 46 | static int hp_c2502; |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 47 | module_param(ncr_irq, int, 0); |
| 48 | module_param(ncr_addr, int, 0); |
| 49 | module_param(ncr_5380, int, 0); |
| 50 | module_param(ncr_53c400, int, 0); |
| 51 | module_param(ncr_53c400a, int, 0); |
| 52 | module_param(dtc_3181e, int, 0); |
| 53 | module_param(hp_c2502, int, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 55 | static int irq[] = { 0, 0, 0, 0, 0, 0, 0, 0 }; |
| 56 | module_param_array(irq, int, NULL, 0); |
| 57 | MODULE_PARM_DESC(irq, "IRQ number(s)"); |
| 58 | |
| 59 | static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 }; |
| 60 | module_param_array(base, int, NULL, 0); |
| 61 | MODULE_PARM_DESC(base, "base address(es)"); |
| 62 | |
| 63 | static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 }; |
| 64 | module_param_array(card, int, NULL, 0); |
| 65 | MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)"); |
| 66 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 67 | MODULE_ALIAS("g_NCR5380_mmio"); |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 68 | MODULE_LICENSE("GPL"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | |
Ondrej Zary | 906e4a3c | 2016-12-05 01:07:20 -0500 | [diff] [blame] | 70 | static void g_NCR5380_trigger_irq(struct Scsi_Host *instance) |
| 71 | { |
| 72 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
| 73 | |
| 74 | /* |
| 75 | * An interrupt is triggered whenever BSY = false, SEL = true |
| 76 | * and a bit set in the SELECT_ENABLE_REG is asserted on the |
| 77 | * SCSI bus. |
| 78 | * |
| 79 | * Note that the bus is only driven when the phase control signals |
| 80 | * (I/O, C/D, and MSG) match those in the TCR. |
| 81 | */ |
| 82 | NCR5380_write(TARGET_COMMAND_REG, |
| 83 | PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); |
| 84 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
| 85 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); |
| 86 | NCR5380_write(INITIATOR_COMMAND_REG, |
| 87 | ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL); |
| 88 | |
| 89 | msleep(1); |
| 90 | |
| 91 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
| 92 | NCR5380_write(SELECT_ENABLE_REG, 0); |
| 93 | NCR5380_write(TARGET_COMMAND_REG, 0); |
| 94 | } |
| 95 | |
| 96 | /** |
| 97 | * g_NCR5380_probe_irq - find the IRQ of a NCR5380 or equivalent |
| 98 | * @instance: SCSI host instance |
| 99 | * |
| 100 | * Autoprobe for the IRQ line used by the card by triggering an IRQ |
| 101 | * and then looking to see what interrupt actually turned up. |
| 102 | */ |
| 103 | |
| 104 | static int g_NCR5380_probe_irq(struct Scsi_Host *instance) |
| 105 | { |
| 106 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
| 107 | int irq_mask, irq; |
| 108 | |
| 109 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); |
| 110 | irq_mask = probe_irq_on(); |
| 111 | g_NCR5380_trigger_irq(instance); |
| 112 | irq = probe_irq_off(irq_mask); |
| 113 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); |
| 114 | |
| 115 | if (irq <= 0) |
| 116 | return NO_IRQ; |
| 117 | return irq; |
| 118 | } |
| 119 | |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 120 | /* |
| 121 | * Configure I/O address of 53C400A or DTC436 by writing magic numbers |
| 122 | * to ports 0x779 and 0x379. |
| 123 | */ |
| 124 | static void magic_configure(int idx, u8 irq, u8 magic[]) |
| 125 | { |
| 126 | u8 cfg = 0; |
| 127 | |
| 128 | outb(magic[0], 0x779); |
| 129 | outb(magic[1], 0x379); |
| 130 | outb(magic[2], 0x379); |
| 131 | outb(magic[3], 0x379); |
| 132 | outb(magic[4], 0x379); |
| 133 | |
Finn Thain | 145c3ae4c | 2016-12-05 01:07:20 -0500 | [diff] [blame^] | 134 | if (irq == 9) |
| 135 | irq = 2; |
| 136 | |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 137 | if (idx >= 0 && idx <= 7) |
| 138 | cfg = 0x80 | idx | (irq << 4); |
| 139 | outb(cfg, 0x379); |
| 140 | } |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 141 | |
Finn Thain | 145c3ae4c | 2016-12-05 01:07:20 -0500 | [diff] [blame^] | 142 | static irqreturn_t legacy_empty_irq_handler(int irq, void *dev_id) |
| 143 | { |
| 144 | return IRQ_HANDLED; |
| 145 | } |
| 146 | |
| 147 | static int legacy_find_free_irq(int *irq_table) |
| 148 | { |
| 149 | while (*irq_table != -1) { |
| 150 | if (!request_irq(*irq_table, legacy_empty_irq_handler, |
| 151 | IRQF_PROBE_SHARED, "Test IRQ", |
| 152 | (void *)irq_table)) { |
| 153 | free_irq(*irq_table, (void *) irq_table); |
| 154 | return *irq_table; |
| 155 | } |
| 156 | irq_table++; |
| 157 | } |
| 158 | return -1; |
| 159 | } |
| 160 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 161 | static unsigned int ncr_53c400a_ports[] = { |
| 162 | 0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0 |
| 163 | }; |
| 164 | static unsigned int dtc_3181e_ports[] = { |
| 165 | 0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0 |
| 166 | }; |
| 167 | static u8 ncr_53c400a_magic[] = { /* 53C400A & DTC436 */ |
| 168 | 0x59, 0xb9, 0xc5, 0xae, 0xa6 |
| 169 | }; |
| 170 | static u8 hp_c2502_magic[] = { /* HP C2502 */ |
| 171 | 0x0f, 0x22, 0xf0, 0x20, 0x80 |
| 172 | }; |
Finn Thain | 145c3ae4c | 2016-12-05 01:07:20 -0500 | [diff] [blame^] | 173 | static int hp_c2502_irqs[] = { |
| 174 | 9, 5, 7, 3, 4, -1 |
| 175 | }; |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 176 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 177 | static int generic_NCR5380_init_one(struct scsi_host_template *tpnt, |
| 178 | struct device *pdev, int base, int irq, int board) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | { |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 180 | bool is_pmio = base <= 0xffff; |
| 181 | int ret; |
| 182 | int flags = 0; |
| 183 | unsigned int *ports = NULL; |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 184 | u8 *magic = NULL; |
Ondrej Zary | 702a98c | 2010-08-10 18:01:16 -0700 | [diff] [blame] | 185 | int i; |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 186 | int port_idx = -1; |
Finn Thain | 9d37640 | 2016-03-23 21:10:10 +1100 | [diff] [blame] | 187 | unsigned long region_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | struct Scsi_Host *instance; |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 189 | struct NCR5380_hostdata *hostdata; |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 190 | u8 __iomem *iomem; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 192 | switch (board) { |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 193 | case BOARD_NCR5380: |
| 194 | flags = FLAG_NO_PSEUDO_DMA | FLAG_DMA_FIXUP; |
| 195 | break; |
| 196 | case BOARD_NCR53C400A: |
| 197 | ports = ncr_53c400a_ports; |
| 198 | magic = ncr_53c400a_magic; |
| 199 | break; |
| 200 | case BOARD_HP_C2502: |
| 201 | ports = ncr_53c400a_ports; |
| 202 | magic = hp_c2502_magic; |
| 203 | break; |
| 204 | case BOARD_DTC3181E: |
| 205 | ports = dtc_3181e_ports; |
| 206 | magic = ncr_53c400a_magic; |
| 207 | break; |
| 208 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 210 | if (is_pmio && ports && magic) { |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 211 | /* wakeup sequence for the NCR53C400A and DTC3181E */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 213 | /* Disable the adapter and look for a free io port */ |
| 214 | magic_configure(-1, 0, magic); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 215 | |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 216 | region_size = 16; |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 217 | if (base) |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 218 | for (i = 0; ports[i]; i++) { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 219 | if (base == ports[i]) { /* index found */ |
| 220 | if (!request_region(ports[i], |
| 221 | region_size, |
| 222 | "ncr53c80")) |
| 223 | return -EBUSY; |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 224 | break; |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 225 | } |
| 226 | } |
| 227 | else |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 228 | for (i = 0; ports[i]; i++) { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 229 | if (!request_region(ports[i], region_size, |
| 230 | "ncr53c80")) |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 231 | continue; |
| 232 | if (inb(ports[i]) == 0xff) |
| 233 | break; |
| 234 | release_region(ports[i], region_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 235 | } |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 236 | if (ports[i]) { |
| 237 | /* At this point we have our region reserved */ |
| 238 | magic_configure(i, 0, magic); /* no IRQ yet */ |
Ondrej Zary | 7b93ca4 | 2016-11-11 10:00:20 +1100 | [diff] [blame] | 239 | base = ports[i]; |
| 240 | outb(0xc0, base + 9); |
| 241 | if (inb(base + 9) != 0x80) { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 242 | ret = -ENODEV; |
| 243 | goto out_release; |
| 244 | } |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 245 | port_idx = i; |
| 246 | } else |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 247 | return -EINVAL; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 248 | } else if (is_pmio) { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 249 | /* NCR5380 - no configuration, just grab */ |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 250 | region_size = 8; |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 251 | if (!base || !request_region(base, region_size, "ncr5380")) |
| 252 | return -EBUSY; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 253 | } else { /* MMIO */ |
| 254 | region_size = NCR53C400_region_size; |
| 255 | if (!request_mem_region(base, region_size, "ncr5380")) |
| 256 | return -EBUSY; |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 257 | } |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 258 | |
| 259 | if (is_pmio) |
| 260 | iomem = ioport_map(base, region_size); |
| 261 | else |
| 262 | iomem = ioremap(base, region_size); |
| 263 | |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 264 | if (!iomem) { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 265 | ret = -ENOMEM; |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 266 | goto out_release; |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 267 | } |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 268 | |
| 269 | instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata)); |
| 270 | if (instance == NULL) { |
| 271 | ret = -ENOMEM; |
| 272 | goto out_unmap; |
| 273 | } |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 274 | hostdata = shost_priv(instance); |
| 275 | |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 276 | hostdata->io = iomem; |
| 277 | hostdata->region_size = region_size; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 278 | |
| 279 | if (is_pmio) { |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 280 | hostdata->io_port = base; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 281 | hostdata->io_width = 1; /* 8-bit PDMA by default */ |
| 282 | hostdata->offset = 0; |
| 283 | |
| 284 | /* |
| 285 | * On NCR53C400 boards, NCR5380 registers are mapped 8 past |
| 286 | * the base address. |
| 287 | */ |
| 288 | switch (board) { |
| 289 | case BOARD_NCR53C400: |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 290 | hostdata->io_port += 8; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 291 | hostdata->c400_ctl_status = 0; |
| 292 | hostdata->c400_blk_cnt = 1; |
| 293 | hostdata->c400_host_buf = 4; |
| 294 | break; |
| 295 | case BOARD_DTC3181E: |
| 296 | hostdata->io_width = 2; /* 16-bit PDMA */ |
| 297 | /* fall through */ |
| 298 | case BOARD_NCR53C400A: |
| 299 | case BOARD_HP_C2502: |
| 300 | hostdata->c400_ctl_status = 9; |
| 301 | hostdata->c400_blk_cnt = 10; |
| 302 | hostdata->c400_host_buf = 8; |
| 303 | break; |
| 304 | } |
| 305 | } else { |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 306 | hostdata->base = base; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 307 | hostdata->offset = NCR53C400_mem_base; |
| 308 | switch (board) { |
| 309 | case BOARD_NCR53C400: |
| 310 | hostdata->c400_ctl_status = 0x100; |
| 311 | hostdata->c400_blk_cnt = 0x101; |
| 312 | hostdata->c400_host_buf = 0x104; |
| 313 | break; |
| 314 | case BOARD_DTC3181E: |
| 315 | case BOARD_NCR53C400A: |
| 316 | case BOARD_HP_C2502: |
| 317 | pr_err(DRV_MODULE_NAME ": unknown register offsets\n"); |
| 318 | ret = -EINVAL; |
| 319 | goto out_unregister; |
| 320 | } |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 321 | } |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 322 | |
Ondrej Zary | 89fa9b5 | 2016-12-05 01:07:19 -0500 | [diff] [blame] | 323 | /* Check for vacant slot */ |
| 324 | NCR5380_write(MODE_REG, 0); |
| 325 | if (NCR5380_read(MODE_REG) != 0) { |
| 326 | ret = -ENODEV; |
| 327 | goto out_unregister; |
| 328 | } |
| 329 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 330 | ret = NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP); |
| 331 | if (ret) |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 332 | goto out_unregister; |
| 333 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 334 | switch (board) { |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 335 | case BOARD_NCR53C400: |
| 336 | case BOARD_DTC3181E: |
| 337 | case BOARD_NCR53C400A: |
| 338 | case BOARD_HP_C2502: |
| 339 | NCR5380_write(hostdata->c400_ctl_status, CSR_BASE); |
| 340 | } |
| 341 | |
| 342 | NCR5380_maybe_reset_bus(instance); |
| 343 | |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 344 | /* Compatibility with documented NCR5380 kernel parameters */ |
Finn Thain | 145c3ae4c | 2016-12-05 01:07:20 -0500 | [diff] [blame^] | 345 | if (irq == 255 || irq == 0) |
| 346 | irq = NO_IRQ; |
| 347 | |
| 348 | if (board == BOARD_HP_C2502) { |
| 349 | int *irq_table = hp_c2502_irqs; |
| 350 | int board_irq = -1; |
| 351 | |
| 352 | switch (irq) { |
| 353 | case NO_IRQ: |
| 354 | board_irq = 0; |
| 355 | break; |
| 356 | case IRQ_AUTO: |
| 357 | board_irq = legacy_find_free_irq(irq_table); |
| 358 | break; |
| 359 | default: |
| 360 | while (*irq_table != -1) |
| 361 | if (*irq_table++ == irq) |
| 362 | board_irq = irq; |
| 363 | } |
| 364 | |
| 365 | if (board_irq <= 0) { |
| 366 | board_irq = 0; |
| 367 | irq = NO_IRQ; |
| 368 | } |
| 369 | |
| 370 | magic_configure(port_idx, board_irq, magic); |
| 371 | } |
| 372 | |
| 373 | if (irq == IRQ_AUTO) |
| 374 | instance->irq = g_NCR5380_probe_irq(instance); |
| 375 | else |
| 376 | instance->irq = irq; |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 377 | |
| 378 | if (instance->irq != NO_IRQ) { |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 379 | if (request_irq(instance->irq, generic_NCR5380_intr, |
| 380 | 0, "NCR5380", instance)) { |
| 381 | printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq); |
| 382 | instance->irq = NO_IRQ; |
| 383 | } |
| 384 | } |
| 385 | |
| 386 | if (instance->irq == NO_IRQ) { |
| 387 | printk(KERN_INFO "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no); |
| 388 | printk(KERN_INFO "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no); |
| 389 | } |
| 390 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 391 | ret = scsi_add_host(instance, pdev); |
| 392 | if (ret) |
| 393 | goto out_free_irq; |
| 394 | scsi_scan_host(instance); |
| 395 | dev_set_drvdata(pdev, instance); |
| 396 | return 0; |
Finn Thain | 0ad0eff | 2016-01-03 16:05:21 +1100 | [diff] [blame] | 397 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 398 | out_free_irq: |
| 399 | if (instance->irq != NO_IRQ) |
| 400 | free_irq(instance->irq, instance); |
| 401 | NCR5380_exit(instance); |
Finn Thain | 0ad0eff | 2016-01-03 16:05:21 +1100 | [diff] [blame] | 402 | out_unregister: |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 403 | scsi_host_put(instance); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 404 | out_unmap: |
Finn Thain | 0ad0eff | 2016-01-03 16:05:21 +1100 | [diff] [blame] | 405 | iounmap(iomem); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 406 | out_release: |
| 407 | if (is_pmio) |
| 408 | release_region(base, region_size); |
| 409 | else |
| 410 | release_mem_region(base, region_size); |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 411 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 412 | } |
| 413 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 414 | static void generic_NCR5380_release_resources(struct Scsi_Host *instance) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 415 | { |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 416 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 417 | void __iomem *iomem = hostdata->io; |
| 418 | unsigned long io_port = hostdata->io_port; |
| 419 | unsigned long base = hostdata->base; |
| 420 | unsigned long region_size = hostdata->region_size; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 421 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 422 | scsi_remove_host(instance); |
Finn Thain | 22f5f10 | 2014-11-12 16:11:56 +1100 | [diff] [blame] | 423 | if (instance->irq != NO_IRQ) |
Jeff Garzik | 1e64166 | 2007-11-11 19:52:05 -0500 | [diff] [blame] | 424 | free_irq(instance->irq, instance); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 425 | NCR5380_exit(instance); |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 426 | scsi_host_put(instance); |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 427 | iounmap(iomem); |
| 428 | if (io_port) |
| 429 | release_region(io_port, region_size); |
| 430 | else |
| 431 | release_mem_region(base, region_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 432 | } |
| 433 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 434 | /** |
Finn Thain | 6c4b88c | 2016-03-23 21:10:17 +1100 | [diff] [blame] | 435 | * generic_NCR5380_pread - pseudo DMA read |
Finn Thain | 4a98f89 | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 436 | * @hostdata: scsi host private data |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 437 | * @dst: buffer to read into |
| 438 | * @len: buffer length |
| 439 | * |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 440 | * Perform a pseudo DMA mode read from an NCR53C400 or equivalent |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | * controller |
| 442 | */ |
| 443 | |
Finn Thain | 4a98f89 | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 444 | static inline int generic_NCR5380_pread(struct NCR5380_hostdata *hostdata, |
Finn Thain | 6c4b88c | 2016-03-23 21:10:17 +1100 | [diff] [blame] | 445 | unsigned char *dst, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 446 | { |
| 447 | int blocks = len / 128; |
| 448 | int start = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 450 | NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR); |
| 451 | NCR5380_write(hostdata->c400_blk_cnt, blocks); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | while (1) { |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 453 | if (NCR5380_read(hostdata->c400_blk_cnt) == 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 454 | break; |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 455 | if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks); |
| 457 | return -1; |
| 458 | } |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 459 | while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) |
| 460 | ; /* FIXME - no timeout */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 462 | if (hostdata->io_port && hostdata->io_width == 2) |
| 463 | insw(hostdata->io_port + hostdata->c400_host_buf, |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 464 | dst + start, 64); |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 465 | else if (hostdata->io_port) |
| 466 | insb(hostdata->io_port + hostdata->c400_host_buf, |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 467 | dst + start, 128); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 468 | else |
| 469 | memcpy_fromio(dst + start, |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 470 | hostdata->io + NCR53C400_host_buffer, 128); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 471 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 472 | start += 128; |
| 473 | blocks--; |
| 474 | } |
| 475 | |
| 476 | if (blocks) { |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 477 | while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) |
| 478 | ; /* FIXME - no timeout */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 480 | if (hostdata->io_port && hostdata->io_width == 2) |
| 481 | insw(hostdata->io_port + hostdata->c400_host_buf, |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 482 | dst + start, 64); |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 483 | else if (hostdata->io_port) |
| 484 | insb(hostdata->io_port + hostdata->c400_host_buf, |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 485 | dst + start, 128); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 486 | else |
| 487 | memcpy_fromio(dst + start, |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 488 | hostdata->io + NCR53C400_host_buffer, 128); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 489 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 490 | start += 128; |
| 491 | blocks--; |
| 492 | } |
| 493 | |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 494 | if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 495 | printk("53C400r: no 53C80 gated irq after transfer"); |
| 496 | |
Ondrej Zary | 42fc637 | 2016-01-03 16:06:18 +1100 | [diff] [blame] | 497 | /* wait for 53C80 registers to be available */ |
| 498 | while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | ; |
Ondrej Zary | 42fc637 | 2016-01-03 16:06:18 +1100 | [diff] [blame] | 500 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) |
| 502 | printk(KERN_ERR "53C400r: no end dma signal\n"); |
| 503 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | return 0; |
| 505 | } |
| 506 | |
| 507 | /** |
Finn Thain | 6c4b88c | 2016-03-23 21:10:17 +1100 | [diff] [blame] | 508 | * generic_NCR5380_pwrite - pseudo DMA write |
Finn Thain | 4a98f89 | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 509 | * @hostdata: scsi host private data |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | * @dst: buffer to read into |
| 511 | * @len: buffer length |
| 512 | * |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 513 | * Perform a pseudo DMA mode read from an NCR53C400 or equivalent |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 514 | * controller |
| 515 | */ |
| 516 | |
Finn Thain | 4a98f89 | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 517 | static inline int generic_NCR5380_pwrite(struct NCR5380_hostdata *hostdata, |
Finn Thain | 6c4b88c | 2016-03-23 21:10:17 +1100 | [diff] [blame] | 518 | unsigned char *src, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 519 | { |
| 520 | int blocks = len / 128; |
| 521 | int start = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 523 | NCR5380_write(hostdata->c400_ctl_status, CSR_BASE); |
| 524 | NCR5380_write(hostdata->c400_blk_cnt, blocks); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 525 | while (1) { |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 526 | if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks); |
| 528 | return -1; |
| 529 | } |
| 530 | |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 531 | if (NCR5380_read(hostdata->c400_blk_cnt) == 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 532 | break; |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 533 | while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 534 | ; // FIXME - timeout |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 535 | |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 536 | if (hostdata->io_port && hostdata->io_width == 2) |
| 537 | outsw(hostdata->io_port + hostdata->c400_host_buf, |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 538 | src + start, 64); |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 539 | else if (hostdata->io_port) |
| 540 | outsb(hostdata->io_port + hostdata->c400_host_buf, |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 541 | src + start, 128); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 542 | else |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 543 | memcpy_toio(hostdata->io + NCR53C400_host_buffer, |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 544 | src + start, 128); |
| 545 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | start += 128; |
| 547 | blocks--; |
| 548 | } |
| 549 | if (blocks) { |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 550 | while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 551 | ; // FIXME - no timeout |
| 552 | |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 553 | if (hostdata->io_port && hostdata->io_width == 2) |
| 554 | outsw(hostdata->io_port + hostdata->c400_host_buf, |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 555 | src + start, 64); |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 556 | else if (hostdata->io_port) |
| 557 | outsb(hostdata->io_port + hostdata->c400_host_buf, |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 558 | src + start, 128); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 559 | else |
Finn Thain | 820682b | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 560 | memcpy_toio(hostdata->io + NCR53C400_host_buffer, |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 561 | src + start, 128); |
| 562 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 563 | start += 128; |
| 564 | blocks--; |
| 565 | } |
| 566 | |
Ondrej Zary | 42fc637 | 2016-01-03 16:06:18 +1100 | [diff] [blame] | 567 | /* wait for 53C80 registers to be available */ |
| 568 | while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) { |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 569 | udelay(4); /* DTC436 chip hangs without this */ |
| 570 | /* FIXME - no timeout */ |
| 571 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) { |
| 574 | printk(KERN_ERR "53C400w: no end dma signal\n"); |
| 575 | } |
Ondrej Zary | 42fc637 | 2016-01-03 16:06:18 +1100 | [diff] [blame] | 576 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT)) |
| 578 | ; // TIMEOUT |
| 579 | return 0; |
| 580 | } |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 581 | |
Finn Thain | 4a98f89 | 2016-10-10 00:46:53 -0400 | [diff] [blame] | 582 | static int generic_NCR5380_dma_xfer_len(struct NCR5380_hostdata *hostdata, |
Finn Thain | 7e9ec8d | 2016-03-23 21:10:11 +1100 | [diff] [blame] | 583 | struct scsi_cmnd *cmd) |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 584 | { |
| 585 | int transfersize = cmd->transfersize; |
| 586 | |
Finn Thain | 7e9ec8d | 2016-03-23 21:10:11 +1100 | [diff] [blame] | 587 | if (hostdata->flags & FLAG_NO_PSEUDO_DMA) |
| 588 | return 0; |
| 589 | |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 590 | /* Limit transfers to 32K, for xx400 & xx406 |
| 591 | * pseudoDMA that transfers in 128 bytes blocks. |
| 592 | */ |
| 593 | if (transfersize > 32 * 1024 && cmd->SCp.this_residual && |
| 594 | !(cmd->SCp.this_residual % transfersize)) |
| 595 | transfersize = 32 * 1024; |
| 596 | |
Ondrej Zary | f039462 | 2016-01-03 16:06:14 +1100 | [diff] [blame] | 597 | /* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */ |
| 598 | if (transfersize % 128) |
| 599 | transfersize = 0; |
| 600 | |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 601 | return transfersize; |
| 602 | } |
| 603 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 604 | /* |
| 605 | * Include the NCR5380 core code that we build our driver around |
| 606 | */ |
| 607 | |
| 608 | #include "NCR5380.c" |
| 609 | |
Christoph Hellwig | d0be4a7d | 2005-10-31 18:31:40 +0100 | [diff] [blame] | 610 | static struct scsi_host_template driver_template = { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 611 | .module = THIS_MODULE, |
Finn Thain | aa2e2cb1 | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 612 | .proc_name = DRV_MODULE_NAME, |
Finn Thain | aa2e2cb1 | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 613 | .name = "Generic NCR5380/NCR53C400 SCSI", |
Finn Thain | aa2e2cb1 | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 614 | .info = generic_NCR5380_info, |
| 615 | .queuecommand = generic_NCR5380_queue_command, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | .eh_abort_handler = generic_NCR5380_abort, |
| 617 | .eh_bus_reset_handler = generic_NCR5380_bus_reset, |
Finn Thain | aa2e2cb1 | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 618 | .can_queue = 16, |
| 619 | .this_id = 7, |
| 620 | .sg_tablesize = SG_ALL, |
| 621 | .cmd_per_lun = 2, |
| 622 | .use_clustering = DISABLE_CLUSTERING, |
Finn Thain | 32b26a1 | 2016-01-03 16:05:58 +1100 | [diff] [blame] | 623 | .cmd_size = NCR5380_CMD_SIZE, |
Finn Thain | 0a4e361 | 2016-01-03 16:06:07 +1100 | [diff] [blame] | 624 | .max_sectors = 128, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | }; |
Finn Thain | 161c005 | 2016-01-03 16:05:46 +1100 | [diff] [blame] | 626 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 628 | static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev) |
| 629 | { |
| 630 | int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev], |
| 631 | irq[ndev], card[ndev]); |
| 632 | if (ret) { |
| 633 | if (base[ndev]) |
| 634 | printk(KERN_WARNING "Card not found at address 0x%03x\n", |
| 635 | base[ndev]); |
| 636 | return 0; |
| 637 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 638 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 639 | return 1; |
| 640 | } |
| 641 | |
| 642 | static int generic_NCR5380_isa_remove(struct device *pdev, |
| 643 | unsigned int ndev) |
| 644 | { |
| 645 | generic_NCR5380_release_resources(dev_get_drvdata(pdev)); |
| 646 | dev_set_drvdata(pdev, NULL); |
| 647 | return 0; |
| 648 | } |
| 649 | |
| 650 | static struct isa_driver generic_NCR5380_isa_driver = { |
| 651 | .match = generic_NCR5380_isa_match, |
| 652 | .remove = generic_NCR5380_isa_remove, |
| 653 | .driver = { |
| 654 | .name = DRV_MODULE_NAME |
| 655 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 656 | }; |
| 657 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 658 | #ifdef CONFIG_PNP |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 659 | static struct pnp_device_id generic_NCR5380_pnp_ids[] = { |
| 660 | { .id = "DTC436e", .driver_data = BOARD_DTC3181E }, |
| 661 | { .id = "" } |
| 662 | }; |
| 663 | MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids); |
| 664 | |
| 665 | static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev, |
| 666 | const struct pnp_device_id *id) |
| 667 | { |
| 668 | int base, irq; |
| 669 | |
| 670 | if (pnp_activate_dev(pdev) < 0) |
| 671 | return -EBUSY; |
| 672 | |
| 673 | base = pnp_port_start(pdev, 0); |
| 674 | irq = pnp_irq(pdev, 0); |
| 675 | |
| 676 | return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq, |
| 677 | id->driver_data); |
| 678 | } |
| 679 | |
| 680 | static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev) |
| 681 | { |
| 682 | generic_NCR5380_release_resources(pnp_get_drvdata(pdev)); |
| 683 | pnp_set_drvdata(pdev, NULL); |
| 684 | } |
| 685 | |
| 686 | static struct pnp_driver generic_NCR5380_pnp_driver = { |
| 687 | .name = DRV_MODULE_NAME, |
| 688 | .id_table = generic_NCR5380_pnp_ids, |
| 689 | .probe = generic_NCR5380_pnp_probe, |
| 690 | .remove = generic_NCR5380_pnp_remove, |
| 691 | }; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 692 | #endif /* defined(CONFIG_PNP) */ |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 693 | |
| 694 | static int pnp_registered, isa_registered; |
| 695 | |
| 696 | static int __init generic_NCR5380_init(void) |
| 697 | { |
| 698 | int ret = 0; |
| 699 | |
| 700 | /* compatibility with old-style parameters */ |
| 701 | if (irq[0] == 0 && base[0] == 0 && card[0] == -1) { |
| 702 | irq[0] = ncr_irq; |
| 703 | base[0] = ncr_addr; |
| 704 | if (ncr_5380) |
| 705 | card[0] = BOARD_NCR5380; |
| 706 | if (ncr_53c400) |
| 707 | card[0] = BOARD_NCR53C400; |
| 708 | if (ncr_53c400a) |
| 709 | card[0] = BOARD_NCR53C400A; |
| 710 | if (dtc_3181e) |
| 711 | card[0] = BOARD_DTC3181E; |
| 712 | if (hp_c2502) |
| 713 | card[0] = BOARD_HP_C2502; |
| 714 | } |
| 715 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 716 | #ifdef CONFIG_PNP |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 717 | if (!pnp_register_driver(&generic_NCR5380_pnp_driver)) |
| 718 | pnp_registered = 1; |
Ondrej Zary | 702a98c | 2010-08-10 18:01:16 -0700 | [diff] [blame] | 719 | #endif |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 720 | ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS); |
| 721 | if (!ret) |
| 722 | isa_registered = 1; |
| 723 | |
| 724 | return (pnp_registered || isa_registered) ? 0 : ret; |
| 725 | } |
| 726 | |
| 727 | static void __exit generic_NCR5380_exit(void) |
| 728 | { |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame] | 729 | #ifdef CONFIG_PNP |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 730 | if (pnp_registered) |
| 731 | pnp_unregister_driver(&generic_NCR5380_pnp_driver); |
| 732 | #endif |
| 733 | if (isa_registered) |
| 734 | isa_unregister_driver(&generic_NCR5380_isa_driver); |
| 735 | } |
| 736 | |
| 737 | module_init(generic_NCR5380_init); |
| 738 | module_exit(generic_NCR5380_exit); |