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Aswath Govindrajueffb32e2021-12-07 13:39:04 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 *
5 * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
6 */
7
8/dts-v1/;
9
10#include "k3-j721s2-som-p0.dtsi"
11#include <dt-bindings/net/ti-dp83867.h>
12
13/ {
14 compatible = "ti,j721s2-evm", "ti,j721s2";
15 model = "Texas Instruments J721S2 EVM";
16
17 chosen {
18 stdout-path = "serial10:115200n8";
19 bootargs = "console=ttyS10,115200n8 earlycon=ns16550a,mmio32,2880000";
20 };
21
22 evm_12v0: fixedregulator-evm12v0 {
23 /* main supply */
24 compatible = "regulator-fixed";
25 regulator-name = "evm_12v0";
26 regulator-min-microvolt = <12000000>;
27 regulator-max-microvolt = <12000000>;
28 regulator-always-on;
29 regulator-boot-on;
30 };
31
32 vsys_3v3: fixedregulator-vsys3v3 {
33 /* Output of LM5140 */
34 compatible = "regulator-fixed";
35 regulator-name = "vsys_3v3";
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
38 vin-supply = <&evm_12v0>;
39 regulator-always-on;
40 regulator-boot-on;
41 };
42
43 vsys_5v0: fixedregulator-vsys5v0 {
44 /* Output of LM5140 */
45 compatible = "regulator-fixed";
46 regulator-name = "vsys_5v0";
47 regulator-min-microvolt = <5000000>;
48 regulator-max-microvolt = <5000000>;
49 vin-supply = <&evm_12v0>;
50 regulator-always-on;
51 regulator-boot-on;
52 };
53
54 vdd_mmc1: fixedregulator-sd {
55 /* Output of TPS22918 */
56 compatible = "regulator-fixed";
57 regulator-name = "vdd_mmc1";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 regulator-boot-on;
61 enable-active-high;
62 vin-supply = <&vsys_3v3>;
63 gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
64 };
65
66 vdd_sd_dv: gpio-regulator-TLV71033 {
67 /* Output of TLV71033 */
68 compatible = "regulator-gpio";
69 regulator-name = "tlv71033";
70 pinctrl-names = "default";
71 pinctrl-0 = <&vdd_sd_dv_pins_default>;
72 regulator-min-microvolt = <1800000>;
73 regulator-max-microvolt = <3300000>;
74 regulator-boot-on;
75 vin-supply = <&vsys_5v0>;
76 gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>;
77 states = <1800000 0x0>,
78 <3300000 0x1>;
79 };
80
81 transceiver1: can-phy1 {
82 compatible = "ti,tcan1043";
83 #phy-cells = <0>;
84 max-bitrate = <5000000>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
87 standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>;
88 enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
89 };
90
91 transceiver2: can-phy2 {
92 compatible = "ti,tcan1042";
93 #phy-cells = <0>;
94 max-bitrate = <5000000>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
97 standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
98 };
99
100};
101
102&main_pmx0 {
103 main_uart8_pins_default: main-uart8-pins-default {
104 pinctrl-single,pins = <
105 J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */
106 J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
107 J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
108 J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
109 >;
110 };
111
112 main_i2c3_pins_default: main-i2c3-pins-default {
113 pinctrl-single,pins = <
114 J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */
115 J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */
116 >;
117 };
118
119 main_mmc1_pins_default: main-mmc1-pins-default {
120 pinctrl-single,pins = <
121 J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
122 J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
123 J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
124 J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
125 J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
126 J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
127 J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
128 J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
129 >;
130 };
131
132 vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
133 pinctrl-single,pins = <
134 J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
135 >;
136 };
137};
138
139&wkup_pmx0 {
140 mcu_cpsw_pins_default: mcu-cpsw-pins-default {
141 pinctrl-single,pins = <
142 J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
143 J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
144 J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
145 J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
146 J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
147 J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
148 J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
149 J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
150 J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
151 J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
152 J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
153 J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
154 >;
155 };
156
157 mcu_mdio_pins_default: mcu-mdio-pins-default {
158 pinctrl-single,pins = <
159 J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
160 J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
161 >;
162 };
163
164 mcu_mcan0_pins_default: mcu-mcan0-pins-default {
165 pinctrl-single,pins = <
166 J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */
167 J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */
168 >;
169 };
170
171 mcu_mcan1_pins_default: mcu-mcan1-pins-default {
172 pinctrl-single,pins = <
173 J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */
174 J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX */
175 >;
176 };
177
178 mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
179 pinctrl-single,pins = <
180 J721S2_WKUP_IOPAD(0x0c0, PIN_INPUT, 7) /* (D26) WKUP_GPIO0_0 */
181 J721S2_WKUP_IOPAD(0x0a8, PIN_INPUT, 7) /* (B25) MCU_SPI0_D1.WKUP_GPIO0_69 */
182 >;
183 };
184
185 mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default {
186 pinctrl-single,pins = <
187 J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */
188 >;
189 };
190};
191
192&main_gpio2 {
193 status = "disabled";
194};
195
196&main_gpio4 {
197 status = "disabled";
198};
199
200&main_gpio6 {
201 status = "disabled";
202};
203
204&wkup_gpio1 {
205 status = "disabled";
206};
207
208&wkup_uart0 {
209 status = "reserved";
210};
211
212&main_uart0 {
213 status = "disabled";
214};
215
216&main_uart1 {
217 status = "disabled";
218};
219
220&main_uart2 {
221 status = "disabled";
222};
223
224&main_uart3 {
225 status = "disabled";
226};
227
228&main_uart4 {
229 status = "disabled";
230};
231
232&main_uart5 {
233 status = "disabled";
234};
235
236&main_uart6 {
237 status = "disabled";
238};
239
240&main_uart7 {
241 status = "disabled";
242};
243
244&main_uart8 {
245 pinctrl-names = "default";
246 pinctrl-0 = <&main_uart8_pins_default>;
247 /* Shared with TFA on this platform */
248 power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
249};
250
251&main_uart9 {
252 status = "disabled";
253};
254
255&main_i2c0 {
256 clock-frequency = <400000>;
257
258 exp1: gpio@20 {
259 compatible = "ti,tca6416";
260 reg = <0x20>;
261 gpio-controller;
262 #gpio-cells = <2>;
263 gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ",
264 "PCIE_2L_EP_RST_EN", "PCIE_1L_MODE_SEL", "PCIE_1L_PERSTZ",
265 "PCIE_1L_RC_RSTZ", "PCIE_1L_EP_RST_EN", "PCIE_2L_PRSNT#",
266 "PCIE_1L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3", "EXP_MUX1",
267 "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTz";
268 };
269
270 exp2: gpio@22 {
271 compatible = "ti,tca6424";
272 reg = <0x22>;
273 gpio-controller;
274 #gpio-cells = <2>;
275 gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN",
276 "USBC_MODE_SEL1", "USBC_MODE_SEL0", "MCAN0_EN", "MCAN0_STB#",
277 "MUX_SPAREMUX_SPARE", "MCASP/TRACE_MUX_S0", "MCASP/TRACE_MUX_S1",
278 "MLB_MUX_SEL", "MCAN_MUX_SEL", "MCASP2/SPI3_MUX_SEL", "PCIe_CLKREQn_MUX_SEL",
279 "CDCI2_RSTZ", "ENET_EXP_PWRDN", "ENET_EXP_RESETZ", "ENET_I2CMUX_SEL",
280 "ENET_EXP_SPARE2", "M2PCIE_RTSZ", "USER_INPUT1", "USER_LED1", "USER_LED2";
281 };
282};
283
284&main_i2c1 {
285 status = "disabled";
286};
287
288&main_i2c2 {
289 status = "disabled";
290};
291
292&main_i2c3 {
293 status = "disabled";
294};
295
296&main_i2c4 {
297 status = "disabled";
298};
299
300&main_i2c5 {
301 status = "disabled";
302};
303
304&main_i2c6 {
305 status = "disabled";
306};
307
308&main_sdhci0 {
309 /* eMMC */
310 non-removable;
311 ti,driver-strength-ohm = <50>;
312 disable-wp;
313};
314
315&main_sdhci1 {
316 /* SD card */
317 pinctrl-0 = <&main_mmc1_pins_default>;
318 pinctrl-names = "default";
319 disable-wp;
320 vmmc-supply = <&vdd_mmc1>;
321 vqmmc-supply = <&vdd_sd_dv>;
322};
323
324&mcu_cpsw {
325 pinctrl-names = "default";
326 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
327};
328
329&davinci_mdio {
330 phy0: ethernet-phy@0 {
331 reg = <0>;
332 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
333 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
334 ti,min-output-impedance;
335 };
336};
337
338&cpsw_port1 {
339 phy-mode = "rgmii-rxid";
340 phy-handle = <&phy0>;
341};
342
343&mcu_mcan0 {
344 pinctrl-names = "default";
345 pinctrl-0 = <&mcu_mcan0_pins_default>;
346 phys = <&transceiver1>;
347};
348
349&mcu_mcan1 {
350 pinctrl-names = "default";
351 pinctrl-0 = <&mcu_mcan1_pins_default>;
352 phys = <&transceiver2>;
353};
354
355&main_mcan0 {
356 status = "disabled";
357};
358
359&main_mcan1 {
360 status = "disabled";
361};
362
363&main_mcan2 {
364 status = "disabled";
365};
366
367&main_mcan3 {
368 status = "disabled";
369};
370
371&main_mcan4 {
372 status = "disabled";
373};
374
375&main_mcan5 {
376 status = "disabled";
377};
378
379&main_mcan6 {
380 status = "disabled";
381};
382
383&main_mcan7 {
384 status = "disabled";
385};
386
387&main_mcan8 {
388 status = "disabled";
389};
390
391&main_mcan9 {
392 status = "disabled";
393};
394
395&main_mcan10 {
396 status = "disabled";
397};
398
399&main_mcan11 {
400 status = "disabled";
401};
402
403&main_mcan12 {
404 status = "disabled";
405};
406
407&main_mcan13 {
408 status = "disabled";
409};
410
411&main_mcan14 {
412 status = "disabled";
413};
414
415&main_mcan15 {
416 status = "disabled";
417};
418
419&main_mcan17 {
420 status = "disabled";
421};