| Maxime Ripard | 101e6fc | 2019-05-20 16:50:35 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Allwinner A31 SPI Controller Device Tree Bindings |
| 8 | |
| 9 | allOf: |
| 10 | - $ref: "spi-controller.yaml" |
| 11 | |
| 12 | maintainers: |
| 13 | - Chen-Yu Tsai <wens@csie.org> |
| Maxime Ripard | 5c7404b | 2019-12-09 10:32:48 +0100 | [diff] [blame] | 14 | - Maxime Ripard <mripard@kernel.org> |
| Maxime Ripard | 101e6fc | 2019-05-20 16:50:35 +0200 | [diff] [blame] | 15 | |
| 16 | properties: |
| 17 | "#address-cells": true |
| 18 | "#size-cells": true |
| 19 | |
| 20 | compatible: |
| Andre Przywara | e2c9e67 | 2020-01-16 23:11:48 +0000 | [diff] [blame] | 21 | oneOf: |
| 22 | - const: allwinner,sun6i-a31-spi |
| 23 | - const: allwinner,sun8i-h3-spi |
| 24 | - items: |
| Rob Herring | f516fb7 | 2020-04-20 21:24:47 -0500 | [diff] [blame] | 25 | - enum: |
| 26 | - allwinner,sun8i-r40-spi |
| 27 | - allwinner,sun50i-h6-spi |
| Andre Przywara | 6589daf | 2021-01-25 15:18:03 +0000 | [diff] [blame] | 28 | - allwinner,sun50i-h616-spi |
| Rob Herring | f516fb7 | 2020-04-20 21:24:47 -0500 | [diff] [blame] | 29 | - const: allwinner,sun8i-h3-spi |
| Maxime Ripard | 101e6fc | 2019-05-20 16:50:35 +0200 | [diff] [blame] | 30 | |
| 31 | reg: |
| 32 | maxItems: 1 |
| 33 | |
| 34 | interrupts: |
| 35 | maxItems: 1 |
| 36 | |
| 37 | clocks: |
| 38 | items: |
| 39 | - description: Bus Clock |
| 40 | - description: Module Clock |
| 41 | |
| 42 | clock-names: |
| 43 | items: |
| 44 | - const: ahb |
| 45 | - const: mod |
| 46 | |
| 47 | resets: |
| 48 | maxItems: 1 |
| 49 | |
| 50 | dmas: |
| 51 | items: |
| 52 | - description: RX DMA Channel |
| 53 | - description: TX DMA Channel |
| 54 | |
| 55 | dma-names: |
| 56 | items: |
| 57 | - const: rx |
| 58 | - const: tx |
| 59 | |
| 60 | num-cs: true |
| 61 | |
| 62 | patternProperties: |
| 63 | "^.*@[0-9a-f]+": |
| Rob Herring | 15ffef1 | 2019-07-03 14:17:06 -0600 | [diff] [blame] | 64 | type: object |
| Maxime Ripard | 101e6fc | 2019-05-20 16:50:35 +0200 | [diff] [blame] | 65 | properties: |
| 66 | reg: |
| 67 | items: |
| 68 | minimum: 0 |
| 69 | maximum: 4 |
| 70 | |
| 71 | spi-rx-bus-width: |
| 72 | const: 1 |
| 73 | |
| 74 | spi-tx-bus-width: |
| 75 | const: 1 |
| 76 | |
| 77 | required: |
| 78 | - compatible |
| 79 | - reg |
| 80 | - interrupts |
| 81 | - clocks |
| 82 | - clock-names |
| 83 | |
| 84 | additionalProperties: false |
| 85 | |
| 86 | examples: |
| 87 | - | |
| 88 | spi1: spi@1c69000 { |
| 89 | compatible = "allwinner,sun6i-a31-spi"; |
| 90 | reg = <0x01c69000 0x1000>; |
| 91 | interrupts = <0 66 4>; |
| 92 | clocks = <&ahb1_gates 21>, <&spi1_clk>; |
| 93 | clock-names = "ahb", "mod"; |
| 94 | resets = <&ahb1_rst 21>; |
| 95 | #address-cells = <1>; |
| 96 | #size-cells = <0>; |
| 97 | }; |
| 98 | |
| 99 | - | |
| 100 | spi0: spi@1c68000 { |
| 101 | compatible = "allwinner,sun8i-h3-spi"; |
| 102 | reg = <0x01c68000 0x1000>; |
| 103 | interrupts = <0 65 4>; |
| 104 | clocks = <&ccu 30>, <&ccu 82>; |
| 105 | clock-names = "ahb", "mod"; |
| 106 | dmas = <&dma 23>, <&dma 23>; |
| 107 | dma-names = "rx", "tx"; |
| 108 | resets = <&ccu 15>; |
| 109 | #address-cells = <1>; |
| 110 | #size-cells = <0>; |
| 111 | }; |
| 112 | |
| 113 | ... |