blob: 941b5459707fca6fe25bcd973676a616fb730198 [file] [log] [blame]
Sumit Semwalb7ee79a2011-01-24 06:21:54 +00001/*
2 * OMAP2plus display device setup / initialization.
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Senthilvadivu Guruswamy
6 * Sumit Semwal
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13 * kind, whether express or implied; without even the implied warranty
14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
Paul Gortmakerd44b28c2011-07-31 10:52:44 -040018#include <linux/string.h>
Sumit Semwalb7ee79a2011-01-24 06:21:54 +000019#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/clk.h>
24#include <linux/err.h>
25
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030026#include <video/omapdss.h>
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +000027#include <plat/omap_hwmod.h>
28#include <plat/omap_device.h>
Tomi Valkeinen700dee72011-05-23 15:50:47 +030029#include <plat/omap-pm.h>
Tomi Valkeinen13662dc2011-11-08 03:16:13 -070030#include <plat/common.h>
Sumit Semwalb7ee79a2011-01-24 06:21:54 +000031
Tomi Valkeinendc358352011-06-15 15:22:47 +030032#include "control.h"
33
Sumit Semwalb7ee79a2011-01-24 06:21:54 +000034static struct platform_device omap_display_device = {
35 .name = "omapdss",
36 .id = -1,
37 .dev = {
38 .platform_data = NULL,
39 },
40};
41
Archit Taneja179e0452011-04-18 09:32:13 +053042struct omap_dss_hwmod_data {
43 const char *oh_name;
44 const char *dev_name;
45 const int id;
46};
47
48static const struct omap_dss_hwmod_data omap2_dss_hwmod_data[] __initdata = {
49 { "dss_core", "omapdss_dss", -1 },
50 { "dss_dispc", "omapdss_dispc", -1 },
51 { "dss_rfbi", "omapdss_rfbi", -1 },
52 { "dss_venc", "omapdss_venc", -1 },
53};
54
55static const struct omap_dss_hwmod_data omap3_dss_hwmod_data[] __initdata = {
56 { "dss_core", "omapdss_dss", -1 },
57 { "dss_dispc", "omapdss_dispc", -1 },
58 { "dss_rfbi", "omapdss_rfbi", -1 },
59 { "dss_venc", "omapdss_venc", -1 },
Tomi Valkeinen7c68dd92011-08-03 14:00:57 +030060 { "dss_dsi1", "omapdss_dsi", 0 },
Archit Taneja179e0452011-04-18 09:32:13 +053061};
62
63static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initdata = {
64 { "dss_core", "omapdss_dss", -1 },
65 { "dss_dispc", "omapdss_dispc", -1 },
66 { "dss_rfbi", "omapdss_rfbi", -1 },
67 { "dss_venc", "omapdss_venc", -1 },
Tomi Valkeinen7c68dd92011-08-03 14:00:57 +030068 { "dss_dsi1", "omapdss_dsi", 0 },
69 { "dss_dsi2", "omapdss_dsi", 1 },
Archit Taneja179e0452011-04-18 09:32:13 +053070 { "dss_hdmi", "omapdss_hdmi", -1 },
71};
72
Tomi Valkeinendc358352011-06-15 15:22:47 +030073static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
74{
75 u32 enable_mask, enable_shift;
76 u32 pipd_mask, pipd_shift;
77 u32 reg;
78
79 if (dsi_id == 0) {
80 enable_mask = OMAP4_DSI1_LANEENABLE_MASK;
81 enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT;
82 pipd_mask = OMAP4_DSI1_PIPD_MASK;
83 pipd_shift = OMAP4_DSI1_PIPD_SHIFT;
84 } else if (dsi_id == 1) {
85 enable_mask = OMAP4_DSI2_LANEENABLE_MASK;
86 enable_shift = OMAP4_DSI2_LANEENABLE_SHIFT;
87 pipd_mask = OMAP4_DSI2_PIPD_MASK;
88 pipd_shift = OMAP4_DSI2_PIPD_SHIFT;
89 } else {
90 return -ENODEV;
91 }
92
93 reg = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
94
95 reg &= ~enable_mask;
96 reg &= ~pipd_mask;
97
98 reg |= (lanes << enable_shift) & enable_mask;
99 reg |= (lanes << pipd_shift) & pipd_mask;
100
101 omap4_ctrl_pad_writel(reg, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
102
103 return 0;
104}
105
Tomi Valkeinen5bc416c2011-06-15 15:21:12 +0300106static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
107{
Tomi Valkeinendc358352011-06-15 15:22:47 +0300108 if (cpu_is_omap44xx())
109 return omap4_dsi_mux_pads(dsi_id, lane_mask);
110
Tomi Valkeinen5bc416c2011-06-15 15:21:12 +0300111 return 0;
112}
113
114static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
115{
Tomi Valkeinendc358352011-06-15 15:22:47 +0300116 if (cpu_is_omap44xx())
117 omap4_dsi_mux_pads(dsi_id, 0);
Tomi Valkeinen5bc416c2011-06-15 15:21:12 +0300118}
119
Sumit Semwalb7ee79a2011-01-24 06:21:54 +0000120int __init omap_display_init(struct omap_dss_board_info *board_data)
121{
122 int r = 0;
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000123 struct omap_hwmod *oh;
Kevin Hilman3528c582011-07-21 13:48:45 -0700124 struct platform_device *pdev;
Archit Taneja179e0452011-04-18 09:32:13 +0530125 int i, oh_count;
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000126 struct omap_display_platform_data pdata;
Archit Taneja179e0452011-04-18 09:32:13 +0530127 const struct omap_dss_hwmod_data *curr_dss_hwmod;
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000128
129 memset(&pdata, 0, sizeof(pdata));
130
Archit Taneja179e0452011-04-18 09:32:13 +0530131 if (cpu_is_omap24xx()) {
132 curr_dss_hwmod = omap2_dss_hwmod_data;
133 oh_count = ARRAY_SIZE(omap2_dss_hwmod_data);
134 } else if (cpu_is_omap34xx()) {
135 curr_dss_hwmod = omap3_dss_hwmod_data;
136 oh_count = ARRAY_SIZE(omap3_dss_hwmod_data);
137 } else {
138 curr_dss_hwmod = omap4_dss_hwmod_data;
139 oh_count = ARRAY_SIZE(omap4_dss_hwmod_data);
140 }
Mayuresh Janorkar545376e2011-01-27 11:17:04 +0000141
Tomi Valkeinen5bc416c2011-06-15 15:21:12 +0300142 if (board_data->dsi_enable_pads == NULL)
143 board_data->dsi_enable_pads = omap_dsi_enable_pads;
144 if (board_data->dsi_disable_pads == NULL)
145 board_data->dsi_disable_pads = omap_dsi_disable_pads;
146
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000147 pdata.board_data = board_data;
Tomi Valkeinen700dee72011-05-23 15:50:47 +0300148 pdata.board_data->get_context_loss_count =
149 omap_pm_get_dev_context_loss_count;
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000150
151 for (i = 0; i < oh_count; i++) {
Archit Taneja179e0452011-04-18 09:32:13 +0530152 oh = omap_hwmod_lookup(curr_dss_hwmod[i].oh_name);
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000153 if (!oh) {
Archit Taneja179e0452011-04-18 09:32:13 +0530154 pr_err("Could not look up %s\n",
155 curr_dss_hwmod[i].oh_name);
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000156 return -ENODEV;
157 }
Semwal, Sumitfd4b34f2011-03-01 02:42:13 -0600158
Kevin Hilman3528c582011-07-21 13:48:45 -0700159 pdev = omap_device_build(curr_dss_hwmod[i].dev_name,
Archit Taneja179e0452011-04-18 09:32:13 +0530160 curr_dss_hwmod[i].id, oh, &pdata,
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000161 sizeof(struct omap_display_platform_data),
Benoit Coussonf718e2c2011-08-10 15:30:09 +0200162 NULL, 0, 0);
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000163
Kevin Hilman3528c582011-07-21 13:48:45 -0700164 if (WARN((IS_ERR(pdev)), "Could not build omap_device for %s\n",
Archit Taneja179e0452011-04-18 09:32:13 +0530165 curr_dss_hwmod[i].oh_name))
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000166 return -ENODEV;
167 }
Sumit Semwalb7ee79a2011-01-24 06:21:54 +0000168 omap_display_device.dev.platform_data = board_data;
169
170 r = platform_device_register(&omap_display_device);
171 if (r < 0)
172 printk(KERN_ERR "Unable to register OMAP-Display device\n");
173
174 return r;
175}
Tomi Valkeinen13662dc2011-11-08 03:16:13 -0700176
177#define MAX_MODULE_SOFTRESET_WAIT 10000
178int omap_dss_reset(struct omap_hwmod *oh)
179{
180 struct omap_hwmod_opt_clk *oc;
181 int c = 0;
182 int i, r;
183
184 if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
185 pr_err("dss_core: hwmod data doesn't contain reset data\n");
186 return -EINVAL;
187 }
188
189 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
190 if (oc->_clk)
191 clk_enable(oc->_clk);
192
193 omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
194 & SYSS_RESETDONE_MASK),
195 MAX_MODULE_SOFTRESET_WAIT, c);
196
197 if (c == MAX_MODULE_SOFTRESET_WAIT)
198 pr_warning("dss_core: waiting for reset to finish failed\n");
199 else
200 pr_debug("dss_core: softreset done\n");
201
202 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
203 if (oc->_clk)
204 clk_disable(oc->_clk);
205
206 r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
207
208 return r;
209}