blob: 86ffb9756e65fc4b7e415aaa8bf10c939f7fe801 [file] [log] [blame]
dea31012005-04-17 16:05:31 -05001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04003 * Fibre Channel Host Bus Adapters. *
James Smart128bdda2018-01-30 15:59:03 -08004 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
James Smartd080abe2017-02-12 13:52:39 -08005 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
James Smart50611572016-03-31 14:12:34 -07006 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04007 * EMULEX and SLI are trademarks of Emulex. *
James Smartd080abe2017-02-12 13:52:39 -08008 * www.broadcom.com *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04009 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea31012005-04-17 16:05:31 -050010 * *
11 * This program is free software; you can redistribute it and/or *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -040012 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea31012005-04-17 16:05:31 -050022 *******************************************************************/
23
James Smart2e0fef82007-06-17 19:56:36 -050024#include <scsi/scsi_host.h>
James Smart895427b2017-02-12 13:52:30 -080025#include <linux/ktime.h>
Dick Kennedyf485c182017-09-29 17:34:34 -070026#include <linux/workqueue.h>
James Smart88a2cfb2011-07-22 18:36:33 -040027
28#if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
29#define CONFIG_SCSI_LPFC_DEBUG_FS
30#endif
31
dea31012005-04-17 16:05:31 -050032struct lpfc_sli2_slim;
33
James Smart5402a312012-09-29 11:30:06 -040034#define ELX_MODEL_NAME_SIZE 80
35
James Smart3772a992009-05-22 14:50:54 -040036#define LPFC_PCI_DEV_LP 0x1
37#define LPFC_PCI_DEV_OC 0x2
38
39#define LPFC_SLI_REV2 2
40#define LPFC_SLI_REV3 3
41#define LPFC_SLI_REV4 4
42
James Smart97eab632008-04-07 10:16:05 -040043#define LPFC_MAX_TARGET 4096 /* max number of targets supported */
James Smarte17da182006-07-06 15:49:25 -040044#define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
45 requests */
46#define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
47 the NameServer before giving up. */
James.Smart@Emulex.Com445cf4f2005-11-28 11:42:38 -050048#define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
James Smart81301a92008-12-04 22:39:46 -050049#define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
James Smarte2aed292010-02-26 14:15:00 -050050#define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
51 cmnd for menlo needs nearly twice as for firmware
52 downloads using bsg */
James Smart96f70772013-04-17 20:16:15 -040053
54#define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */
55#define LPFC_MAX_SG_SLI4_SEG_CNT_DIF 128 /* sg element count per scsi cmnd */
56#define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */
James Smart81301a92008-12-04 22:39:46 -050057#define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
James Smart81e6a632017-11-20 16:00:43 -080058#define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */
James Smart09294d42013-04-17 20:16:05 -040059#define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */
60#define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */
James Smartd73154b2017-11-20 16:00:33 -080061#define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */
James Smart09294d42013-04-17 20:16:05 -040062
James Smart05580562011-05-24 11:40:48 -040063#define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
dea31012005-04-17 16:05:31 -050064#define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
James.Smart@Emulex.Com445cf4f2005-11-28 11:42:38 -050065#define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
James Smart495a7142008-06-14 22:52:59 -040066#define LPFC_VNAME_LEN 100 /* vport symbolic name length */
James Smart977b5a02008-09-07 11:52:04 -040067#define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt
68 queue depth change in millisecs */
69#define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
James Smart7dc517d2010-07-14 15:32:10 -040070#define LPFC_MIN_TGT_QDEPTH 10
James Smart977b5a02008-09-07 11:52:04 -040071#define LPFC_MAX_TGT_QDEPTH 0xFFFF
dea31012005-04-17 16:05:31 -050072
James Smartea2151b2008-09-07 11:52:10 -040073#define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
74 collection. */
James Smart92d7f7b2007-06-17 19:56:38 -050075/*
76 * Following time intervals are used of adjusting SCSI device
77 * queue depths when there are driver resource error or Firmware
78 * resource error.
79 */
James Smart256ec0d2013-04-17 20:14:58 -040080/* 1 Second */
81#define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1))
James Smart92d7f7b2007-06-17 19:56:38 -050082
83/* Number of exchanges reserved for discovery to complete */
84#define LPFC_DISC_IOCB_BUFF_COUNT 20
85
James Smart858c9f62007-06-17 19:56:39 -050086#define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
James Smart311464e2007-08-02 11:10:37 -040087#define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
James Smart858c9f62007-06-17 19:56:39 -050088
James Smartba20c852012-08-03 12:36:52 -040089#define LPFC_LOOK_AHEAD_OFF 0 /* Look ahead logic is turned off */
90
James Smart93996272008-08-24 21:50:30 -040091/* Error Attention event polling interval */
92#define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
93
dea31012005-04-17 16:05:31 -050094/* Define macros for 64 bit support */
95#define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
96#define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
97#define getPaddr(high, low) ((dma_addr_t)( \
98 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
99/* Provide maximum configuration definitions. */
100#define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
dea31012005-04-17 16:05:31 -0500101#define FC_MAX_ADPTMSG 64
102
103#define MAX_HBAEVT 32
James Smart96418b52017-03-04 09:30:31 -0800104#define MAX_HBAS_NO_RESET 16
dea31012005-04-17 16:05:31 -0500105
James Smart93996272008-08-24 21:50:30 -0400106/* Number of MSI-X vectors the driver uses */
107#define LPFC_MSIX_VECTORS 2
108
James Smart5e9d9b82008-06-14 22:52:53 -0400109/* lpfc wait event data ready flag */
James Smart2ade92a2017-03-04 09:30:38 -0800110#define LPFC_DATA_READY 0 /* bit 0 */
James Smart5e9d9b82008-06-14 22:52:53 -0400111
James Smart809c7532012-05-09 21:19:25 -0400112/* queue dump line buffer size */
113#define LPFC_LBUF_SZ 128
114
James Smart618a5232012-06-12 13:54:36 -0400115/* mailbox system shutdown options */
116#define LPFC_MBX_NO_WAIT 0
117#define LPFC_MBX_WAIT 1
118
James.Smart@Emulex.Com875fbdf2005-11-29 16:32:13 -0500119enum lpfc_polling_flags {
120 ENABLE_FCP_RING_POLLING = 0x1,
121 DISABLE_FCP_RING_INT = 0x2
122};
123
James Smart895427b2017-02-12 13:52:30 -0800124struct perf_prof {
125 uint16_t cmd_cpu[40];
126 uint16_t rsp_cpu[40];
127 uint16_t qh_cpu[40];
128 uint16_t wqidx[40];
129};
130
James Smart01649562017-02-12 13:52:32 -0800131/*
132 * Provide for FC4 TYPE x28 - NVME. The
133 * bit mask for FCP and NVME is 0x8 identically
134 * because they are 32 bit positions distance.
135 */
James Smarta0f2d3e2017-02-12 13:52:31 -0800136#define LPFC_FC4_TYPE_BITMASK 0x00000100
137
dea31012005-04-17 16:05:31 -0500138/* Provide DMA memory definitions the driver uses per port instance. */
139struct lpfc_dmabuf {
140 struct list_head list;
141 void *virt; /* virtual address ptr */
142 dma_addr_t phys; /* mapped address */
James Smart76bb24e2007-10-27 13:38:00 -0400143 uint32_t buffer_tag; /* used for tagged queue ring */
dea31012005-04-17 16:05:31 -0500144};
145
James Smart6c621a22017-05-15 15:20:45 -0700146struct lpfc_nvmet_ctxbuf {
147 struct list_head list;
148 struct lpfc_nvmet_rcv_ctx *context;
149 struct lpfc_iocbq *iocbq;
150 struct lpfc_sglq *sglq;
151};
152
dea31012005-04-17 16:05:31 -0500153struct lpfc_dma_pool {
154 struct lpfc_dmabuf *elements;
155 uint32_t max_count;
156 uint32_t current_count;
157};
158
James Smarted957682007-06-17 19:56:37 -0500159struct hbq_dmabuf {
James Smartda0436e2009-05-22 14:51:39 -0400160 struct lpfc_dmabuf hbuf;
James Smarted957682007-06-17 19:56:37 -0500161 struct lpfc_dmabuf dbuf;
James Smart895427b2017-02-12 13:52:30 -0800162 uint16_t total_size;
163 uint16_t bytes_recv;
James Smarted957682007-06-17 19:56:37 -0500164 uint32_t tag;
James Smart4d9ab992009-10-02 15:16:39 -0400165 struct lpfc_cq_event cq_event;
James Smart45ed1192009-10-02 15:17:02 -0400166 unsigned long time_stamp;
James Smart895427b2017-02-12 13:52:30 -0800167 void *context;
168};
169
170struct rqb_dmabuf {
171 struct lpfc_dmabuf hbuf;
172 struct lpfc_dmabuf dbuf;
173 uint16_t total_size;
174 uint16_t bytes_recv;
James Smarta8cf5df2017-05-15 15:20:46 -0700175 uint16_t idx;
James Smart895427b2017-02-12 13:52:30 -0800176 struct lpfc_queue *hrq; /* ptr to associated Header RQ */
177 struct lpfc_queue *drq; /* ptr to associated Data RQ */
James Smarted957682007-06-17 19:56:37 -0500178};
179
dea31012005-04-17 16:05:31 -0500180/* Priority bit. Set value to exceed low water mark in lpfc_mem. */
181#define MEM_PRI 0x100
182
183
184/****************************************************************************/
185/* Device VPD save area */
186/****************************************************************************/
187typedef struct lpfc_vpd {
188 uint32_t status; /* vpd status value */
189 uint32_t length; /* number of bytes actually returned */
190 struct {
191 uint32_t rsvd1; /* Revision numbers */
192 uint32_t biuRev;
193 uint32_t smRev;
194 uint32_t smFwRev;
195 uint32_t endecRev;
196 uint16_t rBit;
197 uint8_t fcphHigh;
198 uint8_t fcphLow;
199 uint8_t feaLevelHigh;
200 uint8_t feaLevelLow;
201 uint32_t postKernRev;
202 uint32_t opFwRev;
203 uint8_t opFwName[16];
204 uint32_t sli1FwRev;
205 uint8_t sli1FwName[16];
206 uint32_t sli2FwRev;
207 uint8_t sli2FwName[16];
208 } rev;
James Smart92d7f7b2007-06-17 19:56:38 -0500209 struct {
210#ifdef __BIG_ENDIAN_BITFIELD
James Smartda0436e2009-05-22 14:51:39 -0400211 uint32_t rsvd3 :19; /* Reserved */
212 uint32_t cdss : 1; /* Configure Data Security SLI */
213 uint32_t rsvd2 : 3; /* Reserved */
214 uint32_t cbg : 1; /* Configure BlockGuard */
James Smart92d7f7b2007-06-17 19:56:38 -0500215 uint32_t cmv : 1; /* Configure Max VPIs */
216 uint32_t ccrp : 1; /* Config Command Ring Polling */
217 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
218 uint32_t chbs : 1; /* Cofigure Host Backing store */
219 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
220 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
221 uint32_t cmx : 1; /* Configure Max XRIs */
222 uint32_t cmr : 1; /* Configure Max RPIs */
223#else /* __LITTLE_ENDIAN */
224 uint32_t cmr : 1; /* Configure Max RPIs */
225 uint32_t cmx : 1; /* Configure Max XRIs */
226 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
227 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
228 uint32_t chbs : 1; /* Cofigure Host Backing store */
229 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
230 uint32_t ccrp : 1; /* Config Command Ring Polling */
231 uint32_t cmv : 1; /* Configure Max VPIs */
James Smartda0436e2009-05-22 14:51:39 -0400232 uint32_t cbg : 1; /* Configure BlockGuard */
233 uint32_t rsvd2 : 3; /* Reserved */
234 uint32_t cdss : 1; /* Configure Data Security SLI */
235 uint32_t rsvd3 :19; /* Reserved */
James Smart92d7f7b2007-06-17 19:56:38 -0500236#endif
237 } sli3Feat;
dea31012005-04-17 16:05:31 -0500238} lpfc_vpd_t;
239
240struct lpfc_scsi_buf;
241
242
243/*
244 * lpfc stat counters
245 */
246struct lpfc_stats {
247 /* Statistics for ELS commands */
248 uint32_t elsLogiCol;
249 uint32_t elsRetryExceeded;
250 uint32_t elsXmitRetry;
251 uint32_t elsDelayRetry;
252 uint32_t elsRcvDrop;
253 uint32_t elsRcvFrame;
254 uint32_t elsRcvRSCN;
255 uint32_t elsRcvRNID;
256 uint32_t elsRcvFARP;
257 uint32_t elsRcvFARPR;
258 uint32_t elsRcvFLOGI;
259 uint32_t elsRcvPLOGI;
260 uint32_t elsRcvADISC;
261 uint32_t elsRcvPDISC;
262 uint32_t elsRcvFAN;
263 uint32_t elsRcvLOGO;
264 uint32_t elsRcvPRLO;
265 uint32_t elsRcvPRLI;
Jamie Wellnitz7bb3b132006-02-28 19:25:15 -0500266 uint32_t elsRcvLIRR;
James Smart12265f62010-10-22 11:05:53 -0400267 uint32_t elsRcvRLS;
Jamie Wellnitz7bb3b132006-02-28 19:25:15 -0500268 uint32_t elsRcvRPS;
269 uint32_t elsRcvRPL;
James Smart5ffc2662009-11-18 15:39:44 -0500270 uint32_t elsRcvRRQ;
James Smart12265f62010-10-22 11:05:53 -0400271 uint32_t elsRcvRTV;
272 uint32_t elsRcvECHO;
James Smart8b017a32015-05-21 13:55:18 -0400273 uint32_t elsRcvLCB;
James Smart86478872015-05-21 13:55:21 -0400274 uint32_t elsRcvRDP;
dea31012005-04-17 16:05:31 -0500275 uint32_t elsXmitFLOGI;
James Smart92d7f7b2007-06-17 19:56:38 -0500276 uint32_t elsXmitFDISC;
dea31012005-04-17 16:05:31 -0500277 uint32_t elsXmitPLOGI;
278 uint32_t elsXmitPRLI;
279 uint32_t elsXmitADISC;
280 uint32_t elsXmitLOGO;
281 uint32_t elsXmitSCR;
282 uint32_t elsXmitRNID;
283 uint32_t elsXmitFARP;
284 uint32_t elsXmitFARPR;
285 uint32_t elsXmitACC;
286 uint32_t elsXmitLSRJT;
287
288 uint32_t frameRcvBcast;
289 uint32_t frameRcvMulti;
290 uint32_t strayXmitCmpl;
291 uint32_t frameXmitDelay;
292 uint32_t xriCmdCmpl;
293 uint32_t xriStatErr;
294 uint32_t LinkUp;
295 uint32_t LinkDown;
296 uint32_t LinkMultiEvent;
297 uint32_t NoRcvBuf;
298 uint32_t fcpCmd;
299 uint32_t fcpCmpl;
300 uint32_t fcpRspErr;
301 uint32_t fcpRemoteStop;
302 uint32_t fcpPortRjt;
303 uint32_t fcpPortBusy;
304 uint32_t fcpError;
305 uint32_t fcpLocalErr;
306};
307
James Smart2e0fef82007-06-17 19:56:36 -0500308struct lpfc_hba;
dea31012005-04-17 16:05:31 -0500309
James Smart92d7f7b2007-06-17 19:56:38 -0500310
James Smart2e0fef82007-06-17 19:56:36 -0500311enum discovery_state {
James Smart92d7f7b2007-06-17 19:56:38 -0500312 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
313 LPFC_VPORT_FAILED = 1, /* vport has failed */
314 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
315 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
316 LPFC_FDISC = 8, /* FDISC sent for vport */
317 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
318 * configured */
319 LPFC_NS_REG = 10, /* Register with NameServer */
320 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
321 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
322 * device authentication / discovery */
323 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
324 LPFC_VPORT_READY = 32,
James Smart2e0fef82007-06-17 19:56:36 -0500325};
dea31012005-04-17 16:05:31 -0500326
James Smart2e0fef82007-06-17 19:56:36 -0500327enum hba_state {
328 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
329 LPFC_WARM_START = 1, /* HBA state after selective reset */
330 LPFC_INIT_START = 2, /* Initial state after board reset */
331 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
332 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
333 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
James Smart92d7f7b2007-06-17 19:56:38 -0500334 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
James Smart2e0fef82007-06-17 19:56:36 -0500335 * CLEAR_LA */
James Smart92d7f7b2007-06-17 19:56:38 -0500336 LPFC_HBA_READY = 32,
James Smart2e0fef82007-06-17 19:56:36 -0500337 LPFC_HBA_ERROR = -1
338};
dea31012005-04-17 16:05:31 -0500339
James Smart2e0fef82007-06-17 19:56:36 -0500340struct lpfc_vport {
James Smart2e0fef82007-06-17 19:56:36 -0500341 struct lpfc_hba *phba;
James Smart3772a992009-05-22 14:50:54 -0400342 struct list_head listentry;
James Smart2e0fef82007-06-17 19:56:36 -0500343 uint8_t port_type;
344#define LPFC_PHYSICAL_PORT 1
345#define LPFC_NPIV_PORT 2
346#define LPFC_FABRIC_PORT 3
347 enum discovery_state port_state;
dea31012005-04-17 16:05:31 -0500348
James Smart92d7f7b2007-06-17 19:56:38 -0500349 uint16_t vpi;
James Smartda0436e2009-05-22 14:51:39 -0400350 uint16_t vfi;
James Smartc8685952009-11-18 15:39:16 -0500351 uint8_t vpi_state;
352#define LPFC_VPI_REGISTERED 0x1
dea31012005-04-17 16:05:31 -0500353
dea31012005-04-17 16:05:31 -0500354 uint32_t fc_flag; /* FC flags */
James Smart2e0fef82007-06-17 19:56:36 -0500355/* Several of these flags are HBA centric and should be moved to
356 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
357 */
James Smart92d7f7b2007-06-17 19:56:38 -0500358#define FC_PT2PT 0x1 /* pt2pt with no fabric */
359#define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
360#define FC_DISC_TMO 0x4 /* Discovery timer running */
361#define FC_PUBLIC_LOOP 0x8 /* Public loop */
362#define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
363#define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
364#define FC_NLP_MORE 0x40 /* More node to process in node tbl */
365#define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
366#define FC_FABRIC 0x100 /* We are fabric attached */
James Smart4b40c592010-03-15 11:25:44 -0400367#define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
James Smart92d7f7b2007-06-17 19:56:38 -0500368#define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
James Smart4b40c592010-03-15 11:25:44 -0400369#define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
James Smart92d7f7b2007-06-17 19:56:38 -0500370#define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
371#define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
372#define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
373#define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
James Smart92d7f7b2007-06-17 19:56:38 -0500374#define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
375#define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
James Smart1c6834a2009-07-19 10:01:26 -0400376#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
James Smart695a8142010-01-26 23:08:03 -0500377#define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
378#define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
379#define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
James Smart92494142011-02-16 12:39:44 -0500380#define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
dea31012005-04-17 16:05:31 -0500381
James Smart7ee5d432007-10-27 13:37:17 -0400382 uint32_t ct_flags;
383#define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
384#define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
385#define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
386#define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
387#define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
388
James Smart685f0bf2007-04-25 09:53:08 -0400389 struct list_head fc_nodes;
dea31012005-04-17 16:05:31 -0500390
391 /* Keep counters for the number of entries in each list. */
392 uint16_t fc_plogi_cnt;
393 uint16_t fc_adisc_cnt;
394 uint16_t fc_reglogin_cnt;
395 uint16_t fc_prli_cnt;
396 uint16_t fc_unmap_cnt;
397 uint16_t fc_map_cnt;
398 uint16_t fc_npr_cnt;
399 uint16_t fc_unused_cnt;
James Smart2e0fef82007-06-17 19:56:36 -0500400 struct serv_parm fc_sparam; /* buffer for our service parameters */
401
402 uint32_t fc_myDID; /* fibre channel S_ID */
403 uint32_t fc_prevDID; /* previous fibre channel S_ID */
James Smart92494142011-02-16 12:39:44 -0500404 struct lpfc_name fabric_portname;
405 struct lpfc_name fabric_nodename;
James Smart2e0fef82007-06-17 19:56:36 -0500406
407 int32_t stopped; /* HBA has not been restarted since last ERATT */
408 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
409
James Smarta0f2d3e2017-02-12 13:52:31 -0800410 uint32_t num_disc_nodes; /* in addition to hba_state */
411 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */
James Smart2e0fef82007-06-17 19:56:36 -0500412
413 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
414 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
James Smart7f5f3d02008-02-08 18:50:14 -0500415 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
James Smart2e0fef82007-06-17 19:56:36 -0500416 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
417 struct lpfc_name fc_nodename; /* fc nodename */
418 struct lpfc_name fc_portname; /* fc portname */
419
420 struct lpfc_work_evt disc_timeout_evt;
421
422 struct timer_list fc_disctmo; /* Discovery rescue timer */
423 uint8_t fc_ns_retry; /* retries for fabric nameserver */
424 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
425
426 spinlock_t work_port_lock;
427 uint32_t work_port_events; /* Timeout to be handled */
James Smart858c9f62007-06-17 19:56:39 -0500428#define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
429#define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
James Smart92494142011-02-16 12:39:44 -0500430#define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
James Smart858c9f62007-06-17 19:56:39 -0500431
432#define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
433#define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
Joe Perchesb1c11812008-02-03 17:28:22 +0200434#define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
James Smart858c9f62007-06-17 19:56:39 -0500435#define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
436#define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
James Smart2a9bf3d2010-06-07 15:24:45 -0400437#define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
James Smart2e0fef82007-06-17 19:56:36 -0500438
James Smart2e0fef82007-06-17 19:56:36 -0500439 struct timer_list els_tmofunc;
James Smart92494142011-02-16 12:39:44 -0500440 struct timer_list delayed_disc_tmo;
James Smart2e0fef82007-06-17 19:56:36 -0500441
442 int unreg_vpi_cmpl;
443
444 uint8_t load_flag;
445#define FC_LOADING 0x1 /* HBA in process of loading drvr */
446#define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
James Smart4258e982015-12-16 18:11:58 -0500447#define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */
James Smart3de2a652007-08-02 11:09:59 -0400448 /* Vport Config Parameters */
449 uint32_t cfg_scan_down;
450 uint32_t cfg_lun_queue_depth;
451 uint32_t cfg_nodev_tmo;
452 uint32_t cfg_devloss_tmo;
453 uint32_t cfg_restrict_login;
454 uint32_t cfg_peer_port_login;
455 uint32_t cfg_fcp_class;
456 uint32_t cfg_use_adisc;
James Smart3de2a652007-08-02 11:09:59 -0400457 uint32_t cfg_discovery_threads;
James Smarte8b62012007-08-02 11:10:09 -0400458 uint32_t cfg_log_verbose;
James Smart3de2a652007-08-02 11:09:59 -0400459 uint32_t cfg_max_luns;
James Smart7ee5d432007-10-27 13:37:17 -0400460 uint32_t cfg_enable_da_id;
James Smart977b5a02008-09-07 11:52:04 -0400461 uint32_t cfg_max_scsicmpl_time;
James Smart7dc517d2010-07-14 15:32:10 -0400462 uint32_t cfg_tgt_queue_depth;
James Smart3cb01c52013-07-15 18:35:04 -0400463 uint32_t cfg_first_burst_size;
James Smart3de2a652007-08-02 11:09:59 -0400464 uint32_t dev_loss_tmo_changed;
James Smart51ef4c22007-08-02 11:10:31 -0400465
466 struct fc_vport *fc_vport;
467
James Smart923e4b62008-12-04 22:40:07 -0500468#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
James Smart51ef4c22007-08-02 11:10:31 -0400469 struct dentry *debug_disc_trc;
470 struct dentry *debug_nodelist;
James Smartbd2cdd52017-02-12 13:52:33 -0800471 struct dentry *debug_nvmestat;
472 struct dentry *debug_nvmektime;
473 struct dentry *debug_cpucheck;
James Smart51ef4c22007-08-02 11:10:31 -0400474 struct dentry *vport_debugfs_root;
475 struct lpfc_debugfs_trc *disc_trc;
476 atomic_t disc_trc_cnt;
477#endif
James Smartea2151b2008-09-07 11:52:10 -0400478 uint8_t stat_data_enabled;
479 uint8_t stat_data_blocked;
James Smartda0436e2009-05-22 14:51:39 -0400480 struct list_head rcv_buffer_list;
James Smart45ed1192009-10-02 15:17:02 -0400481 unsigned long rcv_buffer_time_stamp;
James Smartda0436e2009-05-22 14:51:39 -0400482 uint32_t vport_flag;
483#define STATIC_VPORT 1
James Smartaeb3c812017-04-21 16:05:02 -0700484#define FAWWPN_SET 2
485#define FAWWPN_PARAM_CHG 4
James Smart4258e982015-12-16 18:11:58 -0500486
487 uint16_t fdmi_num_disc;
488 uint32_t fdmi_hba_mask;
489 uint32_t fdmi_port_mask;
James Smart895427b2017-02-12 13:52:30 -0800490
491 /* There is a single nvme instance per vport. */
492 struct nvme_fc_local_port *localport;
493 uint8_t nvmei_support; /* driver supports NVME Initiator */
494 uint32_t last_fcp_wqidx;
James Smart2e0fef82007-06-17 19:56:36 -0500495};
496
James Smarted957682007-06-17 19:56:37 -0500497struct hbq_s {
498 uint16_t entry_count; /* Current number of HBQ slots */
James Smarta8adb832007-10-27 13:37:53 -0400499 uint16_t buffer_count; /* Current number of buffers posted */
James Smarted957682007-06-17 19:56:37 -0500500 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
501 uint32_t hbqPutIdx; /* HBQ slot to use */
502 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
James Smart51ef4c22007-08-02 11:10:31 -0400503 void *hbq_virt; /* Virtual ptr to this hbq */
504 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
505 /* Callback for HBQ buffer allocation */
506 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
507 /* Callback for HBQ buffer free */
508 void (*hbq_free_buffer) (struct lpfc_hba *,
509 struct hbq_dmabuf *);
James Smarted957682007-06-17 19:56:37 -0500510};
511
James Smart51ef4c22007-08-02 11:10:31 -0400512/* this matches the position in the lpfc_hbq_defs array */
James Smart92d7f7b2007-06-17 19:56:38 -0500513#define LPFC_ELS_HBQ 0
James Smart895427b2017-02-12 13:52:30 -0800514#define LPFC_MAX_HBQS 1
James Smarted957682007-06-17 19:56:37 -0500515
James Smart7af67052007-10-27 13:38:11 -0400516enum hba_temp_state {
517 HBA_NORMAL_TEMP,
518 HBA_OVER_TEMP
519};
520
James Smartdb2378e2008-02-08 18:49:51 -0500521enum intr_type_t {
522 NONE = 0,
523 INTx,
524 MSI,
525 MSIX,
526};
527
James Smart6dd9e312013-01-03 15:43:37 -0500528#define LPFC_CT_CTX_MAX 64
James Smartf1c3b0f2009-07-19 10:01:32 -0400529struct unsol_rcv_ct_ctx {
530 uint32_t ctxt_id;
531 uint32_t SID;
James Smart6dd9e312013-01-03 15:43:37 -0500532 uint32_t valid;
533#define UNSOL_INVALID 0
534#define UNSOL_VALID 1
James Smart7851fe22011-07-22 18:36:52 -0400535 uint16_t oxid;
536 uint16_t rxid;
James Smartf1c3b0f2009-07-19 10:01:32 -0400537};
538
James Smart76a95d72010-11-20 23:11:48 -0500539#define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
540#define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
541#define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
542#define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
543#define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
544#define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
545#define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
James Smartd38dd522015-08-31 16:48:17 -0400546#define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */
547#define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_32G
548#define LPFC_USER_LINK_SPEED_BITMAP ((1ULL << LPFC_USER_LINK_SPEED_32G) | \
549 (1 << LPFC_USER_LINK_SPEED_16G) | \
James Smart76a95d72010-11-20 23:11:48 -0500550 (1 << LPFC_USER_LINK_SPEED_10G) | \
551 (1 << LPFC_USER_LINK_SPEED_8G) | \
552 (1 << LPFC_USER_LINK_SPEED_4G) | \
553 (1 << LPFC_USER_LINK_SPEED_2G) | \
554 (1 << LPFC_USER_LINK_SPEED_1G) | \
555 (1 << LPFC_USER_LINK_SPEED_AUTO))
James Smartd38dd522015-08-31 16:48:17 -0400556#define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32"
James Smart76a95d72010-11-20 23:11:48 -0500557
James Smart7ad20aa2011-05-24 11:44:28 -0400558enum nemb_type {
559 nemb_mse = 1,
560 nemb_hbd
561};
562
563enum mbox_type {
564 mbox_rd = 1,
565 mbox_wr
566};
567
568enum dma_type {
569 dma_mbox = 1,
570 dma_ebuf
571};
572
573enum sta_type {
574 sta_pre_addr = 1,
575 sta_pos_addr
576};
577
578struct lpfc_mbox_ext_buf_ctx {
579 uint32_t state;
580#define LPFC_BSG_MBOX_IDLE 0
581#define LPFC_BSG_MBOX_HOST 1
582#define LPFC_BSG_MBOX_PORT 2
583#define LPFC_BSG_MBOX_DONE 3
584#define LPFC_BSG_MBOX_ABTS 4
585 enum nemb_type nembType;
586 enum mbox_type mboxType;
587 uint32_t numBuf;
588 uint32_t mbxTag;
589 uint32_t seqNum;
590 struct lpfc_dmabuf *mbx_dmabuf;
591 struct list_head ext_dmabuf_list;
592};
593
James Smart2e0fef82007-06-17 19:56:36 -0500594struct lpfc_hba {
James Smart3772a992009-05-22 14:50:54 -0400595 /* SCSI interface function jump table entries */
596 int (*lpfc_new_scsi_buf)
597 (struct lpfc_vport *, int);
598 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
James Smart19ca7602010-11-20 23:11:55 -0500599 (struct lpfc_hba *, struct lpfc_nodelist *);
James Smart3772a992009-05-22 14:50:54 -0400600 int (*lpfc_scsi_prep_dma_buf)
601 (struct lpfc_hba *, struct lpfc_scsi_buf *);
602 void (*lpfc_scsi_unprep_dma_buf)
603 (struct lpfc_hba *, struct lpfc_scsi_buf *);
604 void (*lpfc_release_scsi_buf)
605 (struct lpfc_hba *, struct lpfc_scsi_buf *);
606 void (*lpfc_rampdown_queue_depth)
607 (struct lpfc_hba *);
608 void (*lpfc_scsi_prep_cmnd)
609 (struct lpfc_vport *, struct lpfc_scsi_buf *,
610 struct lpfc_nodelist *);
James Smartacd68592012-01-18 16:25:09 -0500611
James Smart3772a992009-05-22 14:50:54 -0400612 /* IOCB interface function jump table entries */
613 int (*__lpfc_sli_issue_iocb)
614 (struct lpfc_hba *, uint32_t,
615 struct lpfc_iocbq *, uint32_t);
616 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
617 struct lpfc_iocbq *);
618 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
James Smart3772a992009-05-22 14:50:54 -0400619 IOCB_t * (*lpfc_get_iocb_from_iocbq)
620 (struct lpfc_iocbq *);
621 void (*lpfc_scsi_cmd_iocb_cmpl)
622 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
623
624 /* MBOX interface function jump table entries */
625 int (*lpfc_sli_issue_mbox)
626 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
James Smartacd68592012-01-18 16:25:09 -0500627
James Smart3772a992009-05-22 14:50:54 -0400628 /* Slow-path IOCB process function jump table entries */
629 void (*lpfc_sli_handle_slow_ring_event)
630 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
631 uint32_t mask);
James Smartacd68592012-01-18 16:25:09 -0500632
James Smart3772a992009-05-22 14:50:54 -0400633 /* INIT device interface function jump table entries */
634 int (*lpfc_sli_hbq_to_firmware)
635 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
636 int (*lpfc_sli_brdrestart)
637 (struct lpfc_hba *);
638 int (*lpfc_sli_brdready)
639 (struct lpfc_hba *, uint32_t);
640 void (*lpfc_handle_eratt)
641 (struct lpfc_hba *);
642 void (*lpfc_stop_port)
643 (struct lpfc_hba *);
James Smart84d1b002010-02-12 14:42:33 -0500644 int (*lpfc_hba_init_link)
James Smart6e7288d2010-06-07 15:23:35 -0400645 (struct lpfc_hba *, uint32_t);
James Smart84d1b002010-02-12 14:42:33 -0500646 int (*lpfc_hba_down_link)
James Smart6e7288d2010-06-07 15:23:35 -0400647 (struct lpfc_hba *, uint32_t);
James Smart7f860592011-03-11 16:05:52 -0500648 int (*lpfc_selective_reset)
649 (struct lpfc_hba *);
James Smart3772a992009-05-22 14:50:54 -0400650
James Smartacd68592012-01-18 16:25:09 -0500651 int (*lpfc_bg_scsi_prep_dma_buf)
652 (struct lpfc_hba *, struct lpfc_scsi_buf *);
653 /* Add new entries here */
654
James Smart3772a992009-05-22 14:50:54 -0400655 /* SLI4 specific HBA data structure */
656 struct lpfc_sli4_hba sli4_hba;
657
Dick Kennedyf485c182017-09-29 17:34:34 -0700658 struct workqueue_struct *wq;
659
James Smart2e0fef82007-06-17 19:56:36 -0500660 struct lpfc_sli sli;
James Smart3772a992009-05-22 14:50:54 -0400661 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
662 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
James Smarted957682007-06-17 19:56:37 -0500663 uint32_t sli3_options; /* Mask of enabled SLI3 options */
James Smart34b02dc2008-08-24 21:49:55 -0400664#define LPFC_SLI3_HBQ_ENABLED 0x01
665#define LPFC_SLI3_NPIV_ENABLED 0x02
666#define LPFC_SLI3_VPORT_TEARDOWN 0x04
667#define LPFC_SLI3_CRP_ENABLED 0x08
James Smart81301a92008-12-04 22:39:46 -0500668#define LPFC_SLI3_BG_ENABLED 0x20
James Smartda0436e2009-05-22 14:51:39 -0400669#define LPFC_SLI3_DSS_ENABLED 0x40
James Smartfedd3b72011-02-16 12:39:24 -0500670#define LPFC_SLI4_PERFH_ENABLED 0x80
671#define LPFC_SLI4_PHWQ_ENABLED 0x100
James Smarted957682007-06-17 19:56:37 -0500672 uint32_t iocb_cmd_size;
673 uint32_t iocb_rsp_size;
James Smart2e0fef82007-06-17 19:56:36 -0500674
675 enum hba_state link_state;
676 uint32_t link_flag; /* link state flags */
James Smart311464e2007-08-02 11:10:37 -0400677#define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
James Smart2e0fef82007-06-17 19:56:36 -0500678 /* This flag is set while issuing */
679 /* INIT_LINK mailbox command */
James Smart92d7f7b2007-06-17 19:56:38 -0500680#define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
James Smart1b32f6a2008-02-08 18:49:39 -0500681#define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
James Smartae9e28f2017-05-15 15:20:51 -0700682#define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */
683#define LS_MDS_LOOPBACK 0x16 /* MDS Diagnostics Link Up (Loopback) */
James Smart2e0fef82007-06-17 19:56:36 -0500684
James Smart93996272008-08-24 21:50:30 -0400685 uint32_t hba_flag; /* hba generic flags */
686#define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
James Smartda0436e2009-05-22 14:51:39 -0400687#define DEFER_ERATT 0x2 /* Deferred error attention in progress */
James Smart76a95d72010-11-20 23:11:48 -0500688#define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
James Smart45ed1192009-10-02 15:17:02 -0400689#define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
James Smartda0436e2009-05-22 14:51:39 -0400690#define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
691#define FCP_XRI_ABORT_EVENT 0x20
692#define ELS_XRI_ABORT_EVENT 0x40
693#define ASYNC_EVENT 0x80
James Smarta0c87cb2009-07-19 10:01:10 -0400694#define LINK_DISABLED 0x100 /* Link disabled by user */
James Smarta93ff372010-10-22 11:06:08 -0400695#define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
696#define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
697#define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
698#define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
699#define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
James Smart19ca7602010-11-20 23:11:55 -0500700#define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
James Smart4f2e66c2012-05-09 21:17:07 -0400701#define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */
James Smart02936352014-04-04 13:52:12 -0400702#define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */
James Smart65791f12016-07-06 12:35:56 -0700703#define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */
James Smartc6918162016-10-13 15:06:16 -0700704#define HBA_FORCED_LINK_SPEED 0x40000 /*
705 * Firmware supports Forced Link Speed
706 * capability
707 */
James Smart895427b2017-02-12 13:52:30 -0800708#define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */
709
James Smart45ed1192009-10-02 15:17:02 -0400710 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
James Smart34b02dc2008-08-24 21:49:55 -0400711 struct lpfc_dmabuf slim2p;
James Smart2e0fef82007-06-17 19:56:36 -0500712
James Smart34b02dc2008-08-24 21:49:55 -0400713 MAILBOX_t *mbox;
James Smart7a470272010-03-15 11:25:20 -0400714 uint32_t *mbox_ext;
James Smart7ad20aa2011-05-24 11:44:28 -0400715 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
James Smart93996272008-08-24 21:50:30 -0400716 uint32_t ha_copy;
James Smart34b02dc2008-08-24 21:49:55 -0400717 struct _PCB *pcb;
718 struct _IOCB *IOCBs;
719
720 struct lpfc_dmabuf hbqslimp;
James Smart2e0fef82007-06-17 19:56:36 -0500721
James Smart2e0fef82007-06-17 19:56:36 -0500722 uint16_t pci_cfg_value;
723
James Smart2e0fef82007-06-17 19:56:36 -0500724 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
725
726 uint32_t fc_eventTag; /* event tag for link attention */
James Smart4d9ab992009-10-02 15:16:39 -0400727 uint32_t link_events;
James Smart2e0fef82007-06-17 19:56:36 -0500728
James Smart2e0fef82007-06-17 19:56:36 -0500729 /* These fields used to be binfo */
730 uint32_t fc_pref_DID; /* preferred D_ID */
James Smart92d7f7b2007-06-17 19:56:38 -0500731 uint8_t fc_pref_ALPA; /* preferred AL_PA */
James Smart12265f62010-10-22 11:05:53 -0400732 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
James Smart2e0fef82007-06-17 19:56:36 -0500733 uint32_t fc_edtov; /* E_D_TOV timer value */
734 uint32_t fc_arbtov; /* ARB_TOV timer value */
735 uint32_t fc_ratov; /* R_A_TOV timer value */
736 uint32_t fc_rttov; /* R_T_TOV timer value */
737 uint32_t fc_altov; /* AL_TOV timer value */
738 uint32_t fc_crtov; /* C_R_TOV timer value */
James Smart2e0fef82007-06-17 19:56:36 -0500739
740 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
741 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
742
743 uint32_t lmt;
744
745 uint32_t fc_topology; /* link topology, from LINK INIT */
James Smarte74c03c2013-04-17 20:15:19 -0400746 uint32_t fc_topology_changed; /* link topology, from LINK INIT */
James Smart2e0fef82007-06-17 19:56:36 -0500747
748 struct lpfc_stats fc_stat;
749
dea31012005-04-17 16:05:31 -0500750 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
751 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
752
James Smart2e0fef82007-06-17 19:56:36 -0500753 uint8_t wwnn[8];
754 uint8_t wwpn[8];
dea31012005-04-17 16:05:31 -0500755 uint32_t RandomData[7];
James Smart7bdedb32016-07-06 12:36:00 -0700756 uint8_t fcp_embed_io;
James Smart895427b2017-02-12 13:52:30 -0800757 uint8_t nvme_support; /* Firmware supports NVME */
758 uint8_t nvmet_support; /* driver supports NVMET */
James Smartf358dd02017-02-12 13:52:34 -0800759#define LPFC_NVMET_MAX_PORTS 32
James Smart7bdedb32016-07-06 12:36:00 -0700760 uint8_t mds_diags_support;
James Smart0cf07f842017-06-01 21:07:10 -0700761 uint32_t initial_imax;
James Smart44fd7fe2017-08-23 16:55:47 -0700762 uint8_t bbcredit_support;
James Smartc176ffa2018-01-30 15:58:46 -0800763 uint8_t enab_exp_wqcq_pages;
dea31012005-04-17 16:05:31 -0500764
James Smart3de2a652007-08-02 11:09:59 -0400765 /* HBA Config Parameters */
dea31012005-04-17 16:05:31 -0500766 uint32_t cfg_ack0;
James Smart78b2d852007-08-02 11:10:21 -0400767 uint32_t cfg_enable_npiv;
James Smart19ca7602010-11-20 23:11:55 -0500768 uint32_t cfg_enable_rrq;
dea31012005-04-17 16:05:31 -0500769 uint32_t cfg_topology;
dea31012005-04-17 16:05:31 -0500770 uint32_t cfg_link_speed;
James Smart7d791df2011-07-22 18:37:52 -0400771#define LPFC_FCF_FOV 1 /* Fast fcf failover */
772#define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
773 uint32_t cfg_fcf_failover_policy;
James Smart49aa1432012-08-03 12:36:42 -0400774 uint32_t cfg_fcp_io_sched;
James Smarta6571c62012-10-31 14:44:42 -0400775 uint32_t cfg_fcp2_no_tgt_reset;
dea31012005-04-17 16:05:31 -0500776 uint32_t cfg_cr_delay;
777 uint32_t cfg_cr_count;
Jamie Wellnitzcf5bf972006-02-28 22:33:08 -0500778 uint32_t cfg_multi_ring_support;
James Smarta4bc3372006-12-02 13:34:16 -0500779 uint32_t cfg_multi_ring_rctl;
780 uint32_t cfg_multi_ring_type;
James.Smart@Emulex.Com875fbdf2005-11-29 16:32:13 -0500781 uint32_t cfg_poll;
782 uint32_t cfg_poll_tmo;
James Smart0c411222013-09-06 12:22:46 -0400783 uint32_t cfg_task_mgmt_tmo;
James Smart4ff43242006-12-02 13:34:56 -0500784 uint32_t cfg_use_msi;
James Smart0cf07f842017-06-01 21:07:10 -0700785 uint32_t cfg_auto_imax;
James Smartda0436e2009-05-22 14:51:39 -0400786 uint32_t cfg_fcp_imax;
James Smart7bb03bb2013-04-17 20:19:16 -0400787 uint32_t cfg_fcp_cpu_map;
James Smart67d12732012-08-03 12:36:13 -0400788 uint32_t cfg_fcp_io_channel;
James Smartf358dd02017-02-12 13:52:34 -0800789 uint32_t cfg_suppress_rsp;
James Smart895427b2017-02-12 13:52:30 -0800790 uint32_t cfg_nvme_oas;
791 uint32_t cfg_nvme_io_channel;
James Smart2d7dbc42017-02-12 13:52:35 -0800792 uint32_t cfg_nvmet_mrq;
James Smartf358dd02017-02-12 13:52:34 -0800793 uint32_t cfg_enable_nvmet;
James Smart895427b2017-02-12 13:52:30 -0800794 uint32_t cfg_nvme_enable_fb;
James Smart2d7dbc42017-02-12 13:52:35 -0800795 uint32_t cfg_nvmet_fb_size;
James Smart96f70772013-04-17 20:16:15 -0400796 uint32_t cfg_total_seg_cnt;
dea31012005-04-17 16:05:31 -0500797 uint32_t cfg_sg_seg_cnt;
James Smart4d4c4a42017-04-21 16:05:01 -0700798 uint32_t cfg_nvme_seg_cnt;
dea31012005-04-17 16:05:31 -0500799 uint32_t cfg_sg_dma_buf_size;
James Smart352e5fd2016-12-30 06:57:47 -0800800 uint64_t cfg_soft_wwnn;
801 uint64_t cfg_soft_wwpn;
James Smart3de2a652007-08-02 11:09:59 -0400802 uint32_t cfg_hba_queue_depth;
James Smart13815c82008-01-11 01:52:48 -0500803 uint32_t cfg_enable_hba_reset;
804 uint32_t cfg_enable_hba_heartbeat;
James Smart1ba981f2014-02-20 09:56:45 -0500805 uint32_t cfg_fof;
806 uint32_t cfg_EnableXLane;
807 uint8_t cfg_oas_tgt_wwpn[8];
808 uint8_t cfg_oas_vpt_wwpn[8];
809 uint32_t cfg_oas_lun_state;
810#define OAS_LUN_ENABLE 1
811#define OAS_LUN_DISABLE 0
812 uint32_t cfg_oas_lun_status;
813#define OAS_LUN_STATUS_EXISTS 0x01
814 uint32_t cfg_oas_flags;
815#define OAS_FIND_ANY_VPORT 0x01
816#define OAS_FIND_ANY_TARGET 0x02
817#define OAS_LUN_VALID 0x04
James Smartc92c8412016-07-06 12:36:05 -0700818 uint32_t cfg_oas_priority;
James Smart1ba981f2014-02-20 09:56:45 -0500819 uint32_t cfg_XLanePriority;
James Smart81301a92008-12-04 22:39:46 -0500820 uint32_t cfg_enable_bg;
James Smartb3b98b72016-10-13 15:06:06 -0700821 uint32_t cfg_prot_mask;
822 uint32_t cfg_prot_guard;
James Smart7a470272010-03-15 11:25:20 -0400823 uint32_t cfg_hostmem_hgp;
James Smartda0436e2009-05-22 14:51:39 -0400824 uint32_t cfg_log_verbose;
James Smart0d878412009-10-02 15:16:56 -0400825 uint32_t cfg_aer_support;
James Smart912e3ac2011-05-24 11:42:11 -0400826 uint32_t cfg_sriov_nr_virtfn;
James Smartc71ab862012-10-31 14:44:33 -0400827 uint32_t cfg_request_firmware_upgrade;
James Smart2a9bf3d2010-06-07 15:24:45 -0400828 uint32_t cfg_iocb_cnt;
James Smart84d1b002010-02-12 14:42:33 -0500829 uint32_t cfg_suppress_link_up;
James Smartcff261f2013-12-17 20:29:47 -0500830 uint32_t cfg_rrq_xri_bitmap_sz;
James Smart8eb8b962016-07-06 12:36:08 -0700831 uint32_t cfg_delay_discovery;
James Smart12247e82016-07-06 12:36:09 -0700832 uint32_t cfg_sli_mode;
James Smarte40a02c2010-02-26 14:13:54 -0500833#define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
834#define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
835#define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
James Smartab56dc22011-02-16 12:39:57 -0500836 uint32_t cfg_enable_dss;
James Smart4258e982015-12-16 18:11:58 -0500837 uint32_t cfg_fdmi_on;
838#define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */
839#define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */
James Smart4258e982015-12-16 18:11:58 -0500840 uint32_t cfg_enable_SmartSAN;
James Smart7bdedb32016-07-06 12:36:00 -0700841 uint32_t cfg_enable_mds_diags;
James Smart895427b2017-02-12 13:52:30 -0800842 uint32_t cfg_enable_fc4_type;
James Smart1351e692018-02-22 08:18:43 -0800843 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */
844 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */
James Smart895427b2017-02-12 13:52:30 -0800845 uint32_t cfg_xri_split;
846#define LPFC_ENABLE_FCP 1
847#define LPFC_ENABLE_NVME 2
848#define LPFC_ENABLE_BOTH 3
849 uint32_t io_channel_irqs; /* number of irqs for io channels */
James Smartf358dd02017-02-12 13:52:34 -0800850 struct nvmet_fc_target_port *targetport;
dea31012005-04-17 16:05:31 -0500851 lpfc_vpd_t vpd; /* vital product data */
852
dea31012005-04-17 16:05:31 -0500853 struct pci_dev *pcidev;
854 struct list_head work_list;
855 uint32_t work_ha; /* Host Attention Bits for WT */
856 uint32_t work_ha_mask; /* HA Bits owned by WT */
857 uint32_t work_hs; /* HS stored in case of ERRAT */
858 uint32_t work_status[2]; /* Extra status from SLIM */
dea31012005-04-17 16:05:31 -0500859
James Smart5e9d9b82008-06-14 22:52:53 -0400860 wait_queue_head_t work_waitq;
dea31012005-04-17 16:05:31 -0500861 struct task_struct *worker_thread;
James Smartd7c255b2008-08-24 21:50:00 -0400862 unsigned long data_flags;
dea31012005-04-17 16:05:31 -0500863
James Smart3163f722008-02-08 18:50:25 -0500864 uint32_t hbq_in_use; /* HBQs in use flag */
James Smarted957682007-06-17 19:56:37 -0500865 uint32_t hbq_count; /* Count of configured HBQs */
James Smart92d7f7b2007-06-17 19:56:38 -0500866 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
James Smarted957682007-06-17 19:56:37 -0500867
James Smart895427b2017-02-12 13:52:30 -0800868 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */
869 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */
James Smart8fa38512009-07-19 10:01:03 -0400870
James Smart115a4122016-07-06 12:36:11 -0700871 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */
872 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */
873 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */
dea31012005-04-17 16:05:31 -0500874 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
875 PCI BAR0 */
876 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
877 PCI BAR2 */
878
James Smart962bc512013-01-03 15:44:00 -0500879 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
880 PCI BAR0 with dual-ULP support */
881 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
882 PCI BAR2 with dual-ULP support */
883 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
884 PCI BAR4 with dual-ULP support */
885#define PCI_64BIT_BAR0 0
886#define PCI_64BIT_BAR2 2
887#define PCI_64BIT_BAR4 4
dea31012005-04-17 16:05:31 -0500888 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
889 void __iomem *HAregaddr; /* virtual address for host attn reg */
890 void __iomem *CAregaddr; /* virtual address for chip attn reg */
891 void __iomem *HSregaddr; /* virtual address for host status
892 reg */
893 void __iomem *HCregaddr; /* virtual address for host ctl reg */
894
James Smarted957682007-06-17 19:56:37 -0500895 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
James Smart34b02dc2008-08-24 21:49:55 -0400896 struct lpfc_pgp *port_gp;
James Smarted957682007-06-17 19:56:37 -0500897 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
James Smart92d7f7b2007-06-17 19:56:38 -0500898 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
James Smarted957682007-06-17 19:56:37 -0500899
dea31012005-04-17 16:05:31 -0500900 int brd_no; /* FC board number */
dea31012005-04-17 16:05:31 -0500901 char SerialNumber[32]; /* adapter Serial Number */
902 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
903 char ModelDesc[256]; /* Model Description */
904 char ModelName[80]; /* Model Name */
905 char ProgramType[256]; /* Program Type */
906 char Port[20]; /* Port No */
907 uint8_t vpd_flag; /* VPD data flag */
908
909#define VPD_MODEL_DESC 0x1 /* valid vpd model description */
910#define VPD_MODEL_NAME 0x2 /* valid vpd model name */
911#define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
912#define VPD_PORT 0x8 /* valid vpd port data */
913#define VPD_MASK 0xf /* mask for any vpd data */
914
James Smart352e5fd2016-12-30 06:57:47 -0800915 uint8_t soft_wwn_enable;
916
James.Smart@Emulex.Com875fbdf2005-11-29 16:32:13 -0500917 struct timer_list fcp_poll_timer;
James Smart93996272008-08-24 21:50:30 -0400918 struct timer_list eratt_poll;
James Smart65791f12016-07-06 12:35:56 -0700919 uint32_t eratt_poll_interval;
James.Smart@Emulex.Com875fbdf2005-11-29 16:32:13 -0500920
dea31012005-04-17 16:05:31 -0500921 /*
922 * stat counters
923 */
James Smart2cee7802017-06-01 21:07:02 -0700924 atomic_t fc4ScsiInputRequests;
925 atomic_t fc4ScsiOutputRequests;
926 atomic_t fc4ScsiControlRequests;
927 atomic_t fc4ScsiIoCmpls;
928 atomic_t fc4NvmeInputRequests;
929 atomic_t fc4NvmeOutputRequests;
930 atomic_t fc4NvmeControlRequests;
931 atomic_t fc4NvmeIoCmpls;
932 atomic_t fc4NvmeLsRequests;
933 atomic_t fc4NvmeLsCmpls;
James Smart895427b2017-02-12 13:52:30 -0800934
James Smart81301a92008-12-04 22:39:46 -0500935 uint64_t bg_guard_err_cnt;
936 uint64_t bg_apptag_err_cnt;
937 uint64_t bg_reftag_err_cnt;
dea31012005-04-17 16:05:31 -0500938
dea31012005-04-17 16:05:31 -0500939 /* fastpath list. */
James Smarta40fc5f2013-04-17 20:17:40 -0400940 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */
941 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */
942 struct list_head lpfc_scsi_buf_list_get;
943 struct list_head lpfc_scsi_buf_list_put;
dea31012005-04-17 16:05:31 -0500944 uint32_t total_scsi_bufs;
James Smart895427b2017-02-12 13:52:30 -0800945 spinlock_t nvme_buf_list_get_lock; /* NVME buf alloc list lock */
946 spinlock_t nvme_buf_list_put_lock; /* NVME buf free list lock */
947 struct list_head lpfc_nvme_buf_list_get;
948 struct list_head lpfc_nvme_buf_list_put;
949 uint32_t total_nvme_bufs;
James Smartcf1a1d32017-12-08 17:18:03 -0800950 uint32_t get_nvme_bufs;
951 uint32_t put_nvme_bufs;
dea31012005-04-17 16:05:31 -0500952 struct list_head lpfc_iocb_list;
953 uint32_t total_iocbq_bufs;
James Smart19ca7602010-11-20 23:11:55 -0500954 struct list_head active_rrq_list;
James Smart2e0fef82007-06-17 19:56:36 -0500955 spinlock_t hbalock;
dea31012005-04-17 16:05:31 -0500956
Romain Perier771db5c2017-07-06 10:13:05 +0200957 /* dma_mem_pools */
958 struct dma_pool *lpfc_sg_dma_buf_pool;
959 struct dma_pool *lpfc_mbuf_pool;
960 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
961 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
962 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
963 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
964 struct dma_pool *txrdy_payload_pool;
dea31012005-04-17 16:05:31 -0500965 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
966
967 mempool_t *mbox_mem_pool;
968 mempool_t *nlp_mem_pool;
James Smart19ca7602010-11-20 23:11:55 -0500969 mempool_t *rrq_pool;
James Smartcff261f2013-12-17 20:29:47 -0500970 mempool_t *active_rrq_pool;
James.Smart@Emulex.Comf888ba32005-08-10 15:03:01 -0400971
972 struct fc_host_statistics link_stats;
James Smartdb2378e2008-02-08 18:49:51 -0500973 enum intr_type_t intr_type;
James Smart5b75da22008-12-04 22:39:35 -0500974 uint32_t intr_mode;
975#define LPFC_INTR_ERROR 0xFFFFFFFF
James Smart2e0fef82007-06-17 19:56:36 -0500976 struct list_head port_list;
James Smart549e55c2007-08-02 11:09:51 -0400977 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
978 uint16_t max_vpi; /* Maximum virtual nports */
James Smart09372822008-01-11 01:52:54 -0500979#define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
James Smartda0436e2009-05-22 14:51:39 -0400980 uint16_t max_vports; /*
981 * For IOV HBAs max_vpi can change
982 * after a reset. max_vports is max
983 * number of vports present. This can
984 * be greater than max_vpi.
985 */
986 uint16_t vpi_base;
987 uint16_t vfi_base;
James Smart549e55c2007-08-02 11:09:51 -0400988 unsigned long *vpi_bmask; /* vpi allocation table */
James Smart6d368e52011-05-24 11:44:12 -0400989 uint16_t *vpi_ids;
990 uint16_t vpi_count;
991 struct list_head lpfc_vpi_blk_list;
James Smart92d7f7b2007-06-17 19:56:38 -0500992
993 /* Data structure used by fabric iocb scheduler */
994 struct list_head fabric_iocb_list;
995 atomic_t fabric_iocb_count;
996 struct timer_list fabric_block_timer;
997 unsigned long bit_flags;
998#define FABRIC_COMANDS_BLOCKED 0
999 atomic_t num_rsrc_err;
1000 atomic_t num_cmd_success;
1001 unsigned long last_rsrc_error_time;
1002 unsigned long last_ramp_down_time;
James Smart923e4b62008-12-04 22:40:07 -05001003#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
James Smart858c9f62007-06-17 19:56:39 -05001004 struct dentry *hba_debugfs_root;
1005 atomic_t debugfs_vport_count;
James Smart78b2d852007-08-02 11:10:21 -04001006 struct dentry *debug_hbqinfo;
James Smartc95d6c62008-01-11 01:53:23 -05001007 struct dentry *debug_dumpHostSlim;
1008 struct dentry *debug_dumpHBASlim;
James Smartf9bb2da2011-10-10 21:34:11 -04001009 struct dentry *debug_dumpData; /* BlockGuard BPL */
1010 struct dentry *debug_dumpDif; /* BlockGuard BPL */
1011 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
James Smart4ac9b222012-03-01 22:38:29 -05001012 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */
1013 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
James Smartf9bb2da2011-10-10 21:34:11 -04001014 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
1015 struct dentry *debug_writeApp; /* inject write app_tag errors */
1016 struct dentry *debug_writeRef; /* inject write ref_tag errors */
James Smartacd68592012-01-18 16:25:09 -05001017 struct dentry *debug_readGuard; /* inject read guard_tag errors */
James Smartf9bb2da2011-10-10 21:34:11 -04001018 struct dentry *debug_readApp; /* inject read app_tag errors */
1019 struct dentry *debug_readRef; /* inject read ref_tag errors */
1020
James Smartbd2cdd52017-02-12 13:52:33 -08001021 struct dentry *debug_nvmeio_trc;
1022 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
1023 atomic_t nvmeio_trc_cnt;
1024 uint32_t nvmeio_trc_size;
1025 uint32_t nvmeio_trc_output_idx;
1026
James Smartf9bb2da2011-10-10 21:34:11 -04001027 /* T10 DIF error injection */
1028 uint32_t lpfc_injerr_wgrd_cnt;
1029 uint32_t lpfc_injerr_wapp_cnt;
1030 uint32_t lpfc_injerr_wref_cnt;
James Smartacd68592012-01-18 16:25:09 -05001031 uint32_t lpfc_injerr_rgrd_cnt;
James Smartf9bb2da2011-10-10 21:34:11 -04001032 uint32_t lpfc_injerr_rapp_cnt;
1033 uint32_t lpfc_injerr_rref_cnt;
James Smart4ac9b222012-03-01 22:38:29 -05001034 uint32_t lpfc_injerr_nportid;
1035 struct lpfc_name lpfc_injerr_wwpn;
James Smartf9bb2da2011-10-10 21:34:11 -04001036 sector_t lpfc_injerr_lba;
James Smartacd68592012-01-18 16:25:09 -05001037#define LPFC_INJERR_LBA_OFF (sector_t)(-1)
James Smartf9bb2da2011-10-10 21:34:11 -04001038
James Smarta58cbd52007-08-02 11:09:43 -04001039 struct dentry *debug_slow_ring_trc;
1040 struct lpfc_debugfs_trc *slow_ring_trc;
1041 atomic_t slow_ring_trc_cnt;
James Smart2a622bf2011-02-16 12:40:06 -05001042 /* iDiag debugfs sub-directory */
1043 struct dentry *idiag_root;
1044 struct dentry *idiag_pci_cfg;
James Smartb76f2dc2011-07-22 18:37:42 -04001045 struct dentry *idiag_bar_acc;
James Smart2a622bf2011-02-16 12:40:06 -05001046 struct dentry *idiag_que_info;
James Smart86a80842011-04-16 11:03:04 -04001047 struct dentry *idiag_que_acc;
1048 struct dentry *idiag_drb_acc;
James Smartb76f2dc2011-07-22 18:37:42 -04001049 struct dentry *idiag_ctl_acc;
1050 struct dentry *idiag_mbx_acc;
1051 struct dentry *idiag_ext_acc;
James Smart07bcd982017-02-12 13:52:28 -08001052 uint8_t lpfc_idiag_last_eq;
James Smart858c9f62007-06-17 19:56:39 -05001053#endif
James Smartbd2cdd52017-02-12 13:52:33 -08001054 uint16_t nvmeio_trc_on;
James Smart858c9f62007-06-17 19:56:39 -05001055
James Smart0ff10d42008-01-11 01:52:36 -05001056 /* Used for deferred freeing of ELS data buffers */
1057 struct list_head elsbuf;
1058 int elsbuf_cnt;
1059 int elsbuf_prev_cnt;
1060
James Smart57127f12007-10-27 13:37:05 -04001061 uint8_t temp_sensor_support;
James Smart858c9f62007-06-17 19:56:39 -05001062 /* Fields used for heart beat. */
James Smart0cf07f842017-06-01 21:07:10 -07001063 unsigned long last_eqdelay_time;
James Smart858c9f62007-06-17 19:56:39 -05001064 unsigned long last_completion_time;
James Smartbc739052010-08-04 16:11:18 -04001065 unsigned long skipped_hb;
James Smart858c9f62007-06-17 19:56:39 -05001066 struct timer_list hb_tmofunc;
1067 uint8_t hb_outstanding;
James Smart19ca7602010-11-20 23:11:55 -05001068 struct timer_list rrq_tmr;
James Smart84774a42008-08-24 21:50:06 -04001069 enum hba_temp_state over_temp_state;
James Smarte47c9092008-02-08 18:49:26 -05001070 /* ndlp reference management */
1071 spinlock_t ndlp_lock;
James Smart76bb24e2007-10-27 13:38:00 -04001072 /*
1073 * Following bit will be set for all buffer tags which are not
1074 * associated with any HBQ.
1075 */
1076#define QUE_BUFTAG_BIT (1<<31)
1077 uint32_t buffer_tag_count;
James Smart84774a42008-08-24 21:50:06 -04001078 int wait_4_mlo_maint_flg;
1079 wait_queue_head_t wait_4_mlo_m_q;
James Smartea2151b2008-09-07 11:52:10 -04001080 /* data structure used for latency data collection */
1081#define LPFC_NO_BUCKET 0
1082#define LPFC_LINEAR_BUCKET 1
1083#define LPFC_POWER2_BUCKET 2
1084 uint8_t bucket_type;
1085 uint32_t bucket_base;
1086 uint32_t bucket_step;
1087
1088/* Maximum number of events that can be outstanding at any time*/
1089#define LPFC_MAX_EVT_COUNT 512
1090 atomic_t fast_event_count;
James Smart32b97932009-07-19 10:01:21 -04001091 uint32_t fcoe_eventtag;
1092 uint32_t fcoe_eventtag_at_fcf_scan;
James Smart80c17842012-03-01 22:35:45 -05001093 uint32_t fcoe_cvl_eventtag;
1094 uint32_t fcoe_cvl_eventtag_attn;
James Smartda0436e2009-05-22 14:51:39 -04001095 struct lpfc_fcf fcf;
1096 uint8_t fc_map[3];
1097 uint8_t valid_vlan;
1098 uint16_t vlan_id;
1099 struct list_head fcf_conn_rec_list;
James Smartf1c3b0f2009-07-19 10:01:32 -04001100
James Smart4fede782010-01-26 23:08:55 -05001101 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
James Smartf1c3b0f2009-07-19 10:01:32 -04001102 struct list_head ct_ev_waiters;
James Smart6dd9e312013-01-03 15:43:37 -05001103 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
James Smartf1c3b0f2009-07-19 10:01:32 -04001104 uint32_t ctx_idx;
James Smarte2aed292010-02-26 14:15:00 -05001105
1106 uint8_t menlo_flag; /* menlo generic flags */
1107#define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
James Smart2a9bf3d2010-06-07 15:24:45 -04001108 uint32_t iocb_cnt;
1109 uint32_t iocb_max;
James Smartd7c47992010-06-08 18:31:54 -04001110 atomic_t sdev_cnt;
James Smartbc739052010-08-04 16:11:18 -04001111 uint8_t fips_spec_rev;
1112 uint8_t fips_level;
James Smart1ba981f2014-02-20 09:56:45 -05001113 spinlock_t devicelock; /* lock for luns list */
1114 mempool_t *device_data_mem_pool;
1115 struct list_head luns;
James Smart310429e2016-07-06 12:35:54 -07001116#define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080
1117#define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040
1118#define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020
1119#define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010
1120#define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008
1121#define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004
1122#define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002
1123#define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001
1124#define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000
1125#define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000
1126 uint16_t sfp_alarm;
1127 uint16_t sfp_warning;
James Smartbd2cdd52017-02-12 13:52:33 -08001128
1129#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1130#define LPFC_CHECK_CPU_CNT 32
1131 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT];
1132 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT];
1133 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT];
1134 uint32_t cpucheck_ccmpl_io[LPFC_CHECK_CPU_CNT];
1135 uint16_t cpucheck_on;
1136#define LPFC_CHECK_OFF 0
1137#define LPFC_CHECK_NVME_IO 1
James Smartf358dd02017-02-12 13:52:34 -08001138#define LPFC_CHECK_NVMET_RCV 2
1139#define LPFC_CHECK_NVMET_IO 4
James Smartbd2cdd52017-02-12 13:52:33 -08001140 uint16_t ktime_on;
1141 uint64_t ktime_data_samples;
1142 uint64_t ktime_status_samples;
1143 uint64_t ktime_last_cmd;
1144 uint64_t ktime_seg1_total;
1145 uint64_t ktime_seg1_min;
1146 uint64_t ktime_seg1_max;
1147 uint64_t ktime_seg2_total;
1148 uint64_t ktime_seg2_min;
1149 uint64_t ktime_seg2_max;
1150 uint64_t ktime_seg3_total;
1151 uint64_t ktime_seg3_min;
1152 uint64_t ktime_seg3_max;
1153 uint64_t ktime_seg4_total;
1154 uint64_t ktime_seg4_min;
1155 uint64_t ktime_seg4_max;
1156 uint64_t ktime_seg5_total;
1157 uint64_t ktime_seg5_min;
1158 uint64_t ktime_seg5_max;
1159 uint64_t ktime_seg6_total;
1160 uint64_t ktime_seg6_min;
1161 uint64_t ktime_seg6_max;
1162 uint64_t ktime_seg7_total;
1163 uint64_t ktime_seg7_min;
1164 uint64_t ktime_seg7_max;
1165 uint64_t ktime_seg8_total;
1166 uint64_t ktime_seg8_min;
1167 uint64_t ktime_seg8_max;
1168 uint64_t ktime_seg9_total;
1169 uint64_t ktime_seg9_min;
1170 uint64_t ktime_seg9_max;
1171 uint64_t ktime_seg10_total;
1172 uint64_t ktime_seg10_min;
1173 uint64_t ktime_seg10_max;
1174#endif
dea31012005-04-17 16:05:31 -05001175};
1176
James Smart2e0fef82007-06-17 19:56:36 -05001177static inline struct Scsi_Host *
1178lpfc_shost_from_vport(struct lpfc_vport *vport)
1179{
1180 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
James Smart5b8bd0c2007-04-25 09:52:49 -04001181}
dea31012005-04-17 16:05:31 -05001182
James Smart2e0fef82007-06-17 19:56:36 -05001183static inline void
1184lpfc_set_loopback_flag(struct lpfc_hba *phba)
1185{
1186 if (phba->cfg_topology == FLAGS_LOCAL_LB)
1187 phba->link_flag |= LS_LOOPBACK_MODE;
1188 else
1189 phba->link_flag &= ~LS_LOOPBACK_MODE;
1190}
1191
1192static inline int
1193lpfc_is_link_up(struct lpfc_hba *phba)
1194{
1195 return phba->link_state == LPFC_LINK_UP ||
James Smart92d7f7b2007-06-17 19:56:38 -05001196 phba->link_state == LPFC_CLEAR_LA ||
1197 phba->link_state == LPFC_HBA_READY;
James Smart2e0fef82007-06-17 19:56:36 -05001198}
1199
James Smart5e9d9b82008-06-14 22:52:53 -04001200static inline void
1201lpfc_worker_wake_up(struct lpfc_hba *phba)
1202{
1203 /* Set the lpfc data pending flag */
1204 set_bit(LPFC_DATA_READY, &phba->data_flags);
1205
1206 /* Wake up worker thread */
1207 wake_up(&phba->work_waitq);
1208 return;
1209}
1210
James Smart9940b972011-03-11 16:06:12 -05001211static inline int
1212lpfc_readl(void __iomem *addr, uint32_t *data)
1213{
1214 uint32_t temp;
1215 temp = readl(addr);
1216 if (temp == 0xffffffff)
1217 return -EIO;
1218 *data = temp;
1219 return 0;
1220}
1221
1222static inline int
James Smart93996272008-08-24 21:50:30 -04001223lpfc_sli_read_hs(struct lpfc_hba *phba)
1224{
1225 /*
1226 * There was a link/board error. Read the status register to retrieve
1227 * the error event and process it.
1228 */
1229 phba->sli.slistat.err_attn_event++;
1230
James Smart9940b972011-03-11 16:06:12 -05001231 /* Save status info and check for unplug error */
1232 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1233 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1234 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1235 return -EIO;
1236 }
James Smart93996272008-08-24 21:50:30 -04001237
1238 /* Clear chip Host Attention error bit */
1239 writel(HA_ERATT, phba->HAregaddr);
1240 readl(phba->HAregaddr); /* flush */
1241 phba->pport->stopped = 1;
1242
James Smart9940b972011-03-11 16:06:12 -05001243 return 0;
James Smart93996272008-08-24 21:50:30 -04001244}
James Smart895427b2017-02-12 13:52:30 -08001245
1246static inline struct lpfc_sli_ring *
1247lpfc_phba_elsring(struct lpfc_hba *phba)
1248{
James Smart0c9c6a72017-05-15 15:20:39 -07001249 if (phba->sli_rev == LPFC_SLI_REV4) {
1250 if (phba->sli4_hba.els_wq)
1251 return phba->sli4_hba.els_wq->pring;
1252 else
1253 return NULL;
1254 }
James Smart895427b2017-02-12 13:52:30 -08001255 return &phba->sli.sli3_ring[LPFC_ELS_RING];
1256}