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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 129e96672f03cfd0181a0fb65446d61d05c2aa58 / . / arch / arm / boot / dts / imx51-zii-scu3-esb.dts
blob: e6ebac8f43e4fbfe64a18d8254ebe80d374ebf7a [file] [log] [blame]
Andrey Smirnov996b1b62018-07-10 22:07:04 -0700[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2
3/*
4 * Copyright (C) 2018 Zodiac Inflight Innovations
5 */
6
7/dts-v1/;
8
9#include "imx51.dtsi"
10
11/ {
12 model = "ZII SCU3 ESB board";
13 compatible = "zii,imx51-scu3-esb", "fsl,imx51";
14
15 chosen {
16 stdout-path = &uart1;
17 };
18
19 /* Will be filled by the bootloader */
20 memory@90000000 {
21 reg = <0x90000000 0>;
22 };
23
24 usb_vbus: regulator-usb-vbus {
25 compatible = "regulator-fixed";
26 regulator-name = "usb_vbus";
27 regulator-min-microvolt = <5000000>;
28 regulator-max-microvolt = <5000000>;
29
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_usb_mmc_reset>;
32 gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
33 startup-delay-us = <150000>;
34 };
35};
36
37&cpu {
38 cpu-supply = <&sw1_reg>;
39};
40
41&ecspi1 {
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_ecspi1>;
44 cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
45 <&gpio4 25 GPIO_ACTIVE_LOW>;
46 status = "okay";
47
48 pmic@0 {
49 compatible = "fsl,mc13892";
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_pmic>;
52 spi-max-frequency = <6000000>;
53 spi-cs-high;
54 reg = <0>;
55 interrupt-parent = <&gpio1>;
56 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
57 fsl,mc13xxx-uses-adc;
58
59 regulators {
60 sw1_reg: sw1 {
61 regulator-min-microvolt = <600000>;
62 regulator-max-microvolt = <1375000>;
63 regulator-boot-on;
64 regulator-always-on;
65 };
66
67 sw2_reg: sw2 {
68 regulator-min-microvolt = <900000>;
69 regulator-max-microvolt = <1850000>;
70 regulator-boot-on;
71 regulator-always-on;
72 };
73
74 sw3_reg: sw3 {
75 regulator-min-microvolt = <1100000>;
76 regulator-max-microvolt = <1850000>;
77 regulator-boot-on;
78 regulator-always-on;
79 };
80
81 sw4_reg: sw4 {
82 regulator-min-microvolt = <1100000>;
83 regulator-max-microvolt = <1850000>;
84 regulator-boot-on;
85 regulator-always-on;
86 };
87
88 vpll_reg: vpll {
89 regulator-min-microvolt = <1050000>;
90 regulator-max-microvolt = <1800000>;
91 regulator-boot-on;
92 regulator-always-on;
93 };
94
95 vdig_reg: vdig {
96 regulator-min-microvolt = <1650000>;
97 regulator-max-microvolt = <1650000>;
98 regulator-boot-on;
99 };
100
101 vsd_reg: vsd {
102 regulator-min-microvolt = <1800000>;
103 regulator-max-microvolt = <3150000>;
104 };
105
106 vusb_reg: vusb {
107 regulator-always-on;
108 };
109
110 vusb2_reg: vusb2 {
111 regulator-min-microvolt = <2400000>;
112 regulator-max-microvolt = <2775000>;
113 regulator-boot-on;
114 regulator-always-on;
115 };
116
117 vvideo_reg: vvideo {
118 regulator-min-microvolt = <2775000>;
119 regulator-max-microvolt = <2775000>;
120 };
121
122 vaudio_reg: vaudio {
123 regulator-min-microvolt = <2300000>;
124 regulator-max-microvolt = <3000000>;
125 };
126
127 vcam_reg: vcam {
128 regulator-min-microvolt = <2500000>;
129 regulator-max-microvolt = <3000000>;
130 };
131
132 vgen1_reg: vgen1 {
133 regulator-min-microvolt = <1200000>;
134 regulator-max-microvolt = <1200000>;
135 };
136
137 vgen2_reg: vgen2 {
138 regulator-min-microvolt = <1200000>;
139 regulator-max-microvolt = <3150000>;
140 regulator-always-on;
141 };
142
143 vgen3_reg: vgen3 {
144 regulator-min-microvolt = <1800000>;
145 regulator-max-microvolt = <2900000>;
146 regulator-always-on;
147 };
148 };
149
150 leds {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 led-control = <0x0 0x0 0x3f83f8 0x0>;
154
155 sysled3: led3@3 {
156 reg = <3>;
157 label = "system:red:power";
158 linux,default-trigger = "default-on";
159 };
160
161 sysled4: led4@4 {
162 reg = <4>;
163 label = "system:green:act";
164 linux,default-trigger = "heartbeat";
165 };
166 };
167 };
168
169 flash@1 {
170 #address-cells = <1>;
171 #size-cells = <1>;
172 compatible = "atmel,at45", "atmel,dataflash";
173 spi-max-frequency = <25000000>;
174 reg = <1>;
175 };
176};
177
178&esdhc1 {
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_esdhc1>;
181 bus-width = <8>;
182 non-removable;
183 no-1-8-v;
184 no-sdio;
185 no-sd;
186 status = "okay";
187};
188
189&esdhc4 {
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_esdhc4>;
192 bus-width = <4>;
193 no-1-8-v;
194 no-sdio;
195 cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
196 status = "okay";
197};
198
199&fec {
200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_fec>;
202 phy-mode = "mii";
203 status = "okay";
204
205 fixed-link {
206 speed = <100>;
207 full-duplex;
208 };
209
210 fec_mdio: mdio {
211 #address-cells = <1>;
212 #size-cells = <0>;
213 status = "okay";
214
215 switch@0 {
216 compatible = "marvell,mv88e6085";
217 reg = <0>;
218 dsa,member = <0 0>;
219 eeprom-length = <512>;
220 interrupt-parent = <&gpio4>;
221 interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
222 interrupt-controller;
223 #interrupt-cells = <2>;
Andrey Smirnova1a30f82018-07-13 10:30:04 -0700[diff] [blame]224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_switch>;
Andrey Smirnov996b1b62018-07-10 22:07:04 -0700[diff] [blame]226
227 ports {
228 #address-cells = <1>;
229 #size-cells = <0>;
230
231 port@0 {
232 reg = <0>;
233 label = "port1";
234 };
235
236 port@1 {
237 reg = <1>;
238 label = "port2";
239 };
240
241 port@2 {
242 reg = <2>;
243 label = "port3";
244 };
245
246 port@3 {
247 reg = <3>;
248 label = "scu2scu";
249 };
250
251 port@4 {
252 reg = <4>;
253 label = "esb2host";
254 };
255
256 port@5 {
257 reg = <5>;
258 label = "esb2mezz";
259 phy-mode = "sgmii";
260
261 fixed-link {
262 speed = <1000>;
263 full-duplex;
264 };
265 };
266
267 port@6 {
268 reg = <6>;
269 label = "cpu";
270 phy-mode = "mii";
271 ethernet = <&fec>;
272
273 fixed-link {
274 speed = <100>;
275 full-duplex;
276 };
277 };
278 };
279 };
280 };
281};
282
283&ipu {
284 status = "disabled";
285};
286
287&i2c2 {
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_i2c2>;
290 status = "okay";
291
292 eeprom@50 {
293 compatible = "atmel,24c04";
294 pagesize = <16>;
295 reg = <0x50>;
296 };
297
298 lm75@48 {
299 compatible = "national,lm75";
300 reg = <0x48>;
301 };
302};
303
304&uart1 {
305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_uart1>;
307 status = "okay";
308};
309
310&uart2 {
311 pinctrl-names = "default";
312 pinctrl-0 = <&pinctrl_uart2>;
313 status = "okay";
314};
315
316&uart3 {
317 pinctrl-names = "default";
318 pinctrl-0 = <&pinctrl_uart3>;
319 status = "okay";
320
321 rave-sp {
322 compatible = "zii,rave-sp-esb";
323 current-speed = <57600>;
324 #address-cells = <1>;
325 #size-cells = <1>;
326
327 watchdog {
Andrey Smirnov129e9662018-07-17 14:44:38 +0800[diff] [blame^]328 compatible = "zii,rave-sp-watchdog-legacy";
Andrey Smirnov996b1b62018-07-10 22:07:04 -0700[diff] [blame]329 };
330
331 eeprom@a4 {
332 compatible = "zii,rave-sp-eeprom";
333 reg = <0xa4 0x4000>;
334 #address-cells = <1>;
335 #size-cells = <1>;
336 zii,eeprom-name = "main-eeprom";
337 };
338 };
339};
340
341&usbotg {
342 dr_mode = "host";
343 disable-over-current;
344 phy_type = "utmi_wide";
345 vbus-supply = <&usb_vbus>;
346 status = "okay";
347};
348
349&usbphy0 {
350 vcc-supply = <&vusb2_reg>;
351};
352
353&wdog1 {
354 status = "disabled";
355};
356
357&iomuxc {
358 pinctrl_ecspi1: ecspi1grp {
359 fsl,pins = <
360 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
361 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
362 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
363 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
364 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
365 >;
366 };
367
368 pinctrl_esdhc1: esdhc1grp {
369 fsl,pins = <
370 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
371 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
372 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
373 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
374 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
375 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
376 MX51_PAD_SD2_DATA0__SD1_DAT4 0x20d5
377 MX51_PAD_SD2_DATA1__SD1_DAT5 0x20d5
378 MX51_PAD_SD2_DATA2__SD1_DAT6 0x20d5
379 MX51_PAD_SD2_DATA3__SD1_DAT7 0x20d5
380 >;
381 };
382
383 pinctrl_esdhc4: esdhc4grp {
384 fsl,pins = <
385 MX51_PAD_NANDF_RB1__SD4_CMD 0x400020d5
386 MX51_PAD_NANDF_CS2__SD4_CLK 0x20d5
387 MX51_PAD_NANDF_CS3__SD4_DAT0 0x20d5
388 MX51_PAD_NANDF_CS4__SD4_DAT1 0x20d5
389 MX51_PAD_NANDF_CS5__SD4_DAT2 0x20d5
390 MX51_PAD_NANDF_CS6__SD4_DAT3 0x20d5
391 MX51_PAD_NANDF_D0__GPIO4_8 0x100
392 >;
393 };
394
395 pinctrl_fec: fecgrp {
396 fsl,pins = <
397 MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x2004
398 MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x2004
399 MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x2004
400 MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x2004
401 MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x2004
402 MX51_PAD_DISP2_DAT10__FEC_COL 0x0180
403 MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x0180
404 MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x20a4
405
406 MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x2180
407 MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x2180
408 MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x0085
409 MX51_PAD_DI_GP4__FEC_RDATA2 0x0085
410 MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x0085
411 MX51_PAD_DI2_PIN2__FEC_MDC 0x2004
412 MX51_PAD_DI2_PIN3__FEC_MDIO 0x01f5
413 MX51_PAD_DI2_PIN4__FEC_CRS 0x0180
414 >;
415 };
416
417 pinctrl_i2c2: i2c2grp {
418 fsl,pins = <
419 MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
420 MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed
421 >;
422 };
423
424 pinctrl_pmic: pmicgrp {
425 fsl,pins = <
426 MX51_PAD_GPIO1_4__GPIO1_4 0x85
427 MX51_PAD_GPIO1_8__GPIO1_8 0xe5
428 >;
429 };
430
Andrey Smirnova1a30f82018-07-13 10:30:04 -0700[diff] [blame]431 pinctrl_switch: switchgrp {
432 fsl,pins = <
433 MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
434 >;
435 };
436
Andrey Smirnov996b1b62018-07-10 22:07:04 -0700[diff] [blame]437 pinctrl_uart1: uart1grp {
438 fsl,pins = <
439 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
440 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
441 MX51_PAD_UART1_RTS__UART1_RTS 0x1c5
442 MX51_PAD_UART1_CTS__UART1_CTS 0x1c5
443 >;
444 };
445
446 pinctrl_uart2: uart2grp {
447 fsl,pins = <
448 MX51_PAD_UART2_RXD__UART2_RXD 0x1c5
449 MX51_PAD_UART2_TXD__UART2_TXD 0x1c5
450 MX51_PAD_USBH1_DATA0__UART2_CTS 0x1c5
451 MX51_PAD_USBH1_DATA3__UART2_RTS 0x1c5
452 >;
453 };
454
455 pinctrl_uart3: uart3grp {
456 fsl,pins = <
457 MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
458 MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
459 >;
460 };
461
462 pinctrl_usb_mmc_reset: usbmmcgrp {
463 fsl,pins = <
464 MX51_PAD_AUD3_BB_RXD__GPIO4_19 0x100
465 >;
466 };
467};