blob: cf84d7046ad5847650b56226f5f7977f0d0c28b0 [file] [log] [blame]
Joseph Lodf205de2016-07-05 17:04:30 +08001#include "tegra186.dtsi"
2
Thierry Reding02df3f02017-02-23 18:30:48 +01003#include <dt-bindings/mfd/max77620.h>
4
Joseph Lodf205de2016-07-05 17:04:30 +08005/ {
6 model = "NVIDIA Tegra186 P3310 Processor Module";
7 compatible = "nvidia,p3310", "nvidia,tegra186";
8
9 aliases {
Thierry Reding80fdf7b2017-02-23 18:30:49 +010010 sdhci0 = "/sdhci@3460000";
11 sdhci1 = "/sdhci@3400000";
Joseph Lodf205de2016-07-05 17:04:30 +080012 serial0 = &uarta;
Thierry Redinga4c7aab2017-02-23 18:30:46 +010013 i2c0 = "/bpmp/i2c";
14 i2c1 = "/i2c@3160000";
15 i2c2 = "/i2c@c240000";
16 i2c3 = "/i2c@3180000";
17 i2c4 = "/i2c@3190000";
18 i2c5 = "/i2c@31c0000";
19 i2c6 = "/i2c@c250000";
20 i2c7 = "/i2c@31e0000";
Joseph Lodf205de2016-07-05 17:04:30 +080021 };
22
23 chosen {
24 bootargs = "earlycon console=ttyS0,115200n8";
25 stdout-path = "serial0:115200n8";
26 };
27
28 memory {
29 device_type = "memory";
30 reg = <0x0 0x80000000 0x2 0x00000000>;
31 };
32
Thierry Reding24975b82017-02-23 18:30:47 +010033 ethernet@2490000 {
34 status = "okay";
35
36 phy-reset-gpios = <&gpio TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>;
37 phy-handle = <&phy>;
38 phy-mode = "rgmii";
39
40 mdio {
41 #address-cells = <1>;
42 #size-cells = <0>;
43
44 phy: phy@0 {
45 compatible = "ethernet-phy-ieee802.3-c22";
46 reg = <0x0>;
47 interrupt-parent = <&gpio>;
48 interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_HIGH>;
49 };
50 };
51 };
52
Joseph Lodf205de2016-07-05 17:04:30 +080053 serial@3100000 {
54 status = "okay";
55 };
56
Thierry Redinga4c7aab2017-02-23 18:30:46 +010057 i2c@3160000 {
58 status = "okay";
Thierry Redingb64994d2017-02-23 18:30:50 +010059
60 power-monitor@40 {
61 compatible = "ti,ina3221";
62 reg = <0x40>;
63 };
64
65 power-monitor@41 {
66 compatible = "ti,ina3221";
67 reg = <0x41>;
68 };
Thierry Redinga4c7aab2017-02-23 18:30:46 +010069 };
70
71 i2c@3180000 {
72 status = "okay";
73 };
74
75 i2c@3190000 {
76 status = "okay";
77 };
78
79 i2c@31c0000 {
80 status = "okay";
81 };
82
83 i2c@31e0000 {
84 status = "okay";
85 };
86
Thierry Reding80fdf7b2017-02-23 18:30:49 +010087 /* SDMMC1 (SD/MMC) */
88 sdhci@3400000 {
89 cd-gpios = <&gpio TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
90 wp-gpios = <&gpio TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_LOW>;
91
92 vqmmc-supply = <&vddio_sdmmc1>;
93 };
94
95 /* SDMMC3 (SDIO) */
96 sdhci@3440000 {
97 status = "okay";
98 };
99
100 /* SDMMC4 (eMMC) */
101 sdhci@3460000 {
102 status = "okay";
103 bus-width = <8>;
104 non-removable;
105
106 vqmmc-supply = <&vdd_1v8_ap>;
107 vmmc-supply = <&vdd_3v3_sys>;
108 };
109
Joseph Lodf205de2016-07-05 17:04:30 +0800110 hsp@3c00000 {
111 status = "okay";
112 };
113
Thierry Redinga4c7aab2017-02-23 18:30:46 +0100114 i2c@c240000 {
115 status = "okay";
116 };
117
118 i2c@c250000 {
119 status = "okay";
120 };
121
Thierry Reding93dbb442017-02-23 18:30:45 +0100122 pmc@c360000 {
123 nvidia,invert-interrupt;
124 };
125
Thierry Reding0dfde132016-11-17 17:36:56 +0100126 cpus {
127 cpu@0 {
128 enable-method = "psci";
129 };
130
131 cpu@1 {
132 enable-method = "psci";
133 };
134
135 cpu@2 {
136 enable-method = "psci";
137 };
138
139 cpu@3 {
140 enable-method = "psci";
141 };
142
143 cpu@4 {
144 enable-method = "psci";
145 };
146
147 cpu@5 {
148 enable-method = "psci";
149 };
150 };
151
Joseph Lodf205de2016-07-05 17:04:30 +0800152 bpmp {
Thierry Redinga4c7aab2017-02-23 18:30:46 +0100153 i2c {
154 status = "okay";
Thierry Reding02df3f02017-02-23 18:30:48 +0100155
156 pmic: pmic@3c {
157 compatible = "maxim,max77620";
158 reg = <0x3c>;
159
160 interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
161 #interrupt-cells = <2>;
162 interrupt-controller;
163
164 #gpio-cells = <2>;
165 gpio-controller;
166
167 pinctrl-names = "default";
168 pinctrl-0 = <&max77620_default>;
169
170 max77620_default: pinmux {
171 gpio0 {
172 pins = "gpio0";
173 function = "gpio";
174 };
175
176 gpio1 {
177 pins = "gpio1";
178 function = "fps-out";
179 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
180 };
181
182 gpio2 {
183 pins = "gpio2";
184 function = "fps-out";
185 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
186 };
187
188 gpio3 {
189 pins = "gpio3";
190 function = "fps-out";
191 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
192 };
193
194 gpio4 {
195 pins = "gpio4";
196 function = "32k-out1";
197 drive-push-pull = <1>;
198 };
199
200 gpio5 {
201 pins = "gpio5";
202 function = "gpio";
203 drive-push-pull = <0>;
204 };
205
206 gpio6 {
207 pins = "gpio6";
208 function = "gpio";
209 drive-push-pull = <1>;
210 };
211
212 gpio7 {
213 pins = "gpio7";
214 function = "gpio";
215 drive-push-pull = <0>;
216 };
217 };
218
219 fps {
220 fps0 {
221 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
222 maxim,shutdown-fps-time-period-us = <640>;
223 };
224
225 fps1 {
226 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
227 maxim,shutdown-fps-time-period-us = <640>;
228 };
229
230 fps2 {
231 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
232 maxim,shutdown-fps-time-period-us = <640>;
233 };
234 };
235
236 regulators {
237 in-sd0-supply = <&vdd_5v0_sys>;
238 in-sd1-supply = <&vdd_5v0_sys>;
239 in-sd2-supply = <&vdd_5v0_sys>;
240 in-sd3-supply = <&vdd_5v0_sys>;
241
242 in-ldo0-1-supply = <&vdd_5v0_sys>;
243 in-ldo2-supply = <&vdd_5v0_sys>;
244 in-ldo3-5-supply = <&vdd_5v0_sys>;
245 in-ldo4-6-supply = <&vdd_1v8>;
246 in-ldo7-8-supply = <&avdd_dsi_csi>;
247
248 sd0 {
249 regulator-name = "VDD_DDR_1V1_PMIC";
250 regulator-min-microvolt = <1100000>;
251 regulator-max-microvolt = <1100000>;
252 regulator-always-on;
253 regulator-boot-on;
254 };
255
256 avdd_dsi_csi: sd1 {
257 regulator-name = "AVDD_DSI_CSI_1V2";
258 regulator-min-microvolt = <1200000>;
259 regulator-max-microvolt = <1200000>;
260 /* XXX */
261 regulator-always-on;
262 regulator-boot-on;
263 };
264
265 vdd_1v8: sd2 {
266 regulator-name = "VDD_1V8";
267 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <1800000>;
269 /* XXX */
270 regulator-always-on;
271 regulator-boot-on;
272 };
273
274 vdd_3v3_sys: sd3 {
275 regulator-name = "VDD_3V3_SYS";
276 regulator-min-microvolt = <3300000>;
277 regulator-max-microvolt = <3300000>;
278 /* XXX */
279 regulator-always-on;
280 regulator-boot-on;
281 };
282
283 ldo0 {
284 regulator-name = "VDD_1V8_AP_PLL";
285 regulator-min-microvolt = <1800000>;
286 regulator-max-microvolt = <1800000>;
287 /* XXX */
288 regulator-always-on;
289 regulator-boot-on;
290 };
291
292 ldo2 {
293 regulator-name = "VDDIO_3V3_AOHV";
294 regulator-min-microvolt = <3300000>;
295 regulator-max-microvolt = <3300000>;
296 /* XXX */
297 regulator-always-on;
298 regulator-boot-on;
299 };
300
301 vddio_sdmmc1: ldo3 {
302 regulator-name = "VDDIO_SDMMC1_AP";
303 regulator-min-microvolt = <1800000>;
304 regulator-max-microvolt = <3300000>;
305 };
306
307 ldo4 {
308 regulator-name = "VDD_RTC";
309 regulator-min-microvolt = <1000000>;
310 regulator-max-microvolt = <1000000>;
311 };
312
313 vddio_sdmmc3: ldo5 {
314 regulator-name = "VDDIO_SDMMC3_AP";
315 regulator-min-microvolt = <2800000>;
316 regulator-max-microvolt = <2800000>;
317 };
318
319 avdd_1v05: ldo7 {
320 regulator-name = "VDD_HDMI_1V05";
321 regulator-min-microvolt = <1050000>;
322 regulator-max-microvolt = <1050000>;
323 /* XXX */
324 regulator-always-on;
325 regulator-boot-on;
326 };
327
328 vdd_pex: ldo8 {
329 regulator-name = "VDD_PEX_1V05";
330 regulator-min-microvolt = <1050000>;
331 regulator-max-microvolt = <1050000>;
332 /* XXX */
333 regulator-always-on;
334 regulator-boot-on;
335 };
336 };
337 };
Thierry Redinga4c7aab2017-02-23 18:30:46 +0100338 };
Joseph Lodf205de2016-07-05 17:04:30 +0800339 };
Thierry Reding0dfde132016-11-17 17:36:56 +0100340
341 psci {
342 compatible = "arm,psci-1.0";
343 status = "okay";
344 method = "smc";
345 };
Thierry Reding02df3f02017-02-23 18:30:48 +0100346
347 regulators {
348 compatible = "simple-bus";
349 #address-cells = <1>;
350 #size-cells = <0>;
351
352 vdd_5v0_sys: regulator@0 {
353 compatible = "regulator-fixed";
354 reg = <0>;
355
356 regulator-name = "VDD_5V0_SYS";
357 regulator-min-microvolt = <5000000>;
358 regulator-max-microvolt = <5000000>;
359 regulator-always-on;
360 regulator-boot-on;
361 };
362
363 vdd_1v8_ap: regulator@1 {
364 compatible = "regulator-fixed";
365 reg = <1>;
366
367 regulator-name = "VDD_1V8_AP";
368 regulator-min-microvolt = <1800000>;
369 regulator-max-microvolt = <1800000>;
370
371 /* XXX */
372 regulator-always-on;
373 regulator-boot-on;
374
375 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
376 enable-active-high;
377
378 vin-supply = <&vdd_1v8>;
379 };
380 };
Joseph Lodf205de2016-07-05 17:04:30 +0800381};