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Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1	/*
				2	* linux/arch/arm/kernel/debug.S
				3	*
				4	* Copyright (C) 1994-1999 Russell King
				5	*
				6	* This program is free software; you can redistribute it and/or modify
				7	* it under the terms of the GNU General Public License version 2 as
				8	* published by the Free Software Foundation.
				9	*
				10	* 32-bit debugging code
				11	*/
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	12	#include <linux/linkage.h>
Rob Herring	6f6f6a7	2012-03-10 10:30:31 -0600	[diff] [blame]	13	#include <asm/assembler.h>
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	14
				15	.text
				16
				17	/*
				18	* Some debugging routines (useful if you've got MM problems and
				19	* printk isn't working). For DEBUGGING ONLY!!! Do not leave
				20	* references to these in a production kernel!
				21	*/
				22
Rob Herring	91a9fec	2012-08-31 00:03:46 -0500	[diff] [blame]	23	#if !defined(CONFIG_DEBUG_SEMIHOSTING)
				24	#include CONFIG_DEBUG_LL_INCLUDE
				25	#endif
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	26
Jeremy Kerr	0ea1293	2010-07-06 18:30:06 +0800	[diff] [blame]	27	#ifdef CONFIG_MMU
				28	.macro addruart_current, rx, tmp1, tmp2
Nicolas Pitre	639da5e	2011-08-31 22:55:46 -0400	[diff] [blame]	29	addruart \tmp1, \tmp2, \rx
Jeremy Kerr	0ea1293	2010-07-06 18:30:06 +0800	[diff] [blame]	30	mrc p15, 0, \rx, c1, c0
				31	tst \rx, #1
				32	moveq \rx, \tmp1
				33	movne \rx, \tmp2
				34	.endm
				35
				36	#else /* !CONFIG_MMU */
				37	.macro addruart_current, rx, tmp1, tmp2
Stefan Agner	7505f04	2015-05-20 00:03:50 +0200	[diff] [blame]	38	addruart \rx, \tmp1, \tmp2
Jeremy Kerr	0ea1293	2010-07-06 18:30:06 +0800	[diff] [blame]	39	.endm
				40
				41	#endif /* CONFIG_MMU */
				42
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	43	/*
				44	* Useful debugging routines
				45	*/
				46	ENTRY(printhex8)
				47	mov r1, #8
				48	b printhex
Catalin Marinas	93ed397	2008-08-28 11:22:32 +0100	[diff] [blame]	49	ENDPROC(printhex8)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	50
				51	ENTRY(printhex4)
				52	mov r1, #4
				53	b printhex
Catalin Marinas	93ed397	2008-08-28 11:22:32 +0100	[diff] [blame]	54	ENDPROC(printhex4)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	55
				56	ENTRY(printhex2)
				57	mov r1, #2
				58	printhex: adr r2, hexbuf
				59	add r3, r2, r1
				60	mov r1, #0
				61	strb r1, [r3]
				62	1: and r1, r0, #15
				63	mov r0, r0, lsr #4
				64	cmp r1, #10
				65	addlt r1, r1, #'0'
				66	addge r1, r1, #'a' - 10
				67	strb r1, [r3, #-1]!
				68	teq r3, r2
				69	bne 1b
				70	mov r0, r2
				71	b printascii
Catalin Marinas	93ed397	2008-08-28 11:22:32 +0100	[diff] [blame]	72	ENDPROC(printhex2)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	73
Afzal Mohammed	b55fa18	2011-10-20 19:32:07 +0100	[diff] [blame]	74	hexbuf: .space 16
				75
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	76	.ltorg
				77
Nicolas Pitre	9b5a146	2012-02-22 21:58:03 +0100	[diff] [blame]	78	#ifndef CONFIG_DEBUG_SEMIHOSTING
				79
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	80	ENTRY(printascii)
Jeremy Kerr	0ea1293	2010-07-06 18:30:06 +0800	[diff] [blame]	81	addruart_current r3, r1, r2
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	82	b 2f
				83	1: waituart r2, r3
				84	senduart r1, r3
				85	busyuart r2, r3
				86	teq r1, #'\n'
				87	moveq r1, #'\r'
				88	beq 1b
				89	2: teq r0, #0
				90	ldrneb r1, [r0], #1
				91	teqne r1, #0
				92	bne 1b
Russell King	6ebbf2c	2014-06-30 16:29:12 +0100	[diff] [blame]	93	ret lr
Catalin Marinas	93ed397	2008-08-28 11:22:32 +0100	[diff] [blame]	94	ENDPROC(printascii)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	95
				96	ENTRY(printch)
Jeremy Kerr	0ea1293	2010-07-06 18:30:06 +0800	[diff] [blame]	97	addruart_current r3, r1, r2
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	98	mov r1, r0
				99	mov r0, #0
				100	b 1b
Catalin Marinas	93ed397	2008-08-28 11:22:32 +0100	[diff] [blame]	101	ENDPROC(printch)
Nicolas Pitre	9b5a146	2012-02-22 21:58:03 +0100	[diff] [blame]	102
Uwe Kleine-König	a73b59c	2013-01-16 15:32:06 +0100	[diff] [blame]	103	#ifdef CONFIG_MMU
Rob Herring	e5c5f2a	2012-10-22 11:42:54 -0600	[diff] [blame]	104	ENTRY(debug_ll_addr)
				105	addruart r2, r3, ip
				106	str r2, [r0]
				107	str r3, [r1]
Russell King	6ebbf2c	2014-06-30 16:29:12 +0100	[diff] [blame]	108	ret lr
Rob Herring	e5c5f2a	2012-10-22 11:42:54 -0600	[diff] [blame]	109	ENDPROC(debug_ll_addr)
Uwe Kleine-König	a73b59c	2013-01-16 15:32:06 +0100	[diff] [blame]	110	#endif
Rob Herring	e5c5f2a	2012-10-22 11:42:54 -0600	[diff] [blame]	111
Nicolas Pitre	9b5a146	2012-02-22 21:58:03 +0100	[diff] [blame]	112	#else
				113
				114	ENTRY(printascii)
				115	mov r1, r0
				116	mov r0, #0x04 @ SYS_WRITE0
				117	ARM( svc #0x123456 )
				118	THUMB( svc #0xab )
Russell King	6ebbf2c	2014-06-30 16:29:12 +0100	[diff] [blame]	119	ret lr
Nicolas Pitre	9b5a146	2012-02-22 21:58:03 +0100	[diff] [blame]	120	ENDPROC(printascii)
				121
				122	ENTRY(printch)
				123	adr r1, hexbuf
				124	strb r0, [r1]
				125	mov r0, #0x03 @ SYS_WRITEC
				126	ARM( svc #0x123456 )
				127	THUMB( svc #0xab )
Russell King	6ebbf2c	2014-06-30 16:29:12 +0100	[diff] [blame]	128	ret lr
Nicolas Pitre	9b5a146	2012-02-22 21:58:03 +0100	[diff] [blame]	129	ENDPROC(printch)
				130
Rob Herring	e5c5f2a	2012-10-22 11:42:54 -0600	[diff] [blame]	131	ENTRY(debug_ll_addr)
				132	mov r2, #0
				133	str r2, [r0]
				134	str r2, [r1]
Russell King	6ebbf2c	2014-06-30 16:29:12 +0100	[diff] [blame]	135	ret lr
Rob Herring	e5c5f2a	2012-10-22 11:42:54 -0600	[diff] [blame]	136	ENDPROC(debug_ll_addr)
				137
Nicolas Pitre	9b5a146	2012-02-22 21:58:03 +0100	[diff] [blame]	138	#endif